rt2800: initialize BBP_R104 on proper subroutines
[linux/fpc-iii.git] / drivers / media / tuners / mxl5005s.h
blobae8db885ad87a1cfb22603910bc2bc04e360717f
1 /*
2 MaxLinear MXL5005S VSB/QAM/DVBT tuner driver
4 Copyright (C) 2008 MaxLinear
5 Copyright (C) 2008 Steven Toth <stoth@linuxtv.org>
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #ifndef __MXL5005S_H
24 #define __MXL5005S_H
26 #include <linux/kconfig.h>
28 #include <linux/i2c.h>
29 #include "dvb_frontend.h"
31 struct mxl5005s_config {
33 /* 7 bit i2c address */
34 u8 i2c_address;
36 #define IF_FREQ_4570000HZ 4570000
37 #define IF_FREQ_4571429HZ 4571429
38 #define IF_FREQ_5380000HZ 5380000
39 #define IF_FREQ_36000000HZ 36000000
40 #define IF_FREQ_36125000HZ 36125000
41 #define IF_FREQ_36166667HZ 36166667
42 #define IF_FREQ_44000000HZ 44000000
43 u32 if_freq;
45 #define CRYSTAL_FREQ_4000000HZ 4000000
46 #define CRYSTAL_FREQ_16000000HZ 16000000
47 #define CRYSTAL_FREQ_25000000HZ 25000000
48 #define CRYSTAL_FREQ_28800000HZ 28800000
49 u32 xtal_freq;
51 #define MXL_DUAL_AGC 0
52 #define MXL_SINGLE_AGC 1
53 u8 agc_mode;
55 #define MXL_TF_DEFAULT 0
56 #define MXL_TF_OFF 1
57 #define MXL_TF_C 2
58 #define MXL_TF_C_H 3
59 #define MXL_TF_D 4
60 #define MXL_TF_D_L 5
61 #define MXL_TF_E 6
62 #define MXL_TF_F 7
63 #define MXL_TF_E_2 8
64 #define MXL_TF_E_NA 9
65 #define MXL_TF_G 10
66 u8 tracking_filter;
68 #define MXL_RSSI_DISABLE 0
69 #define MXL_RSSI_ENABLE 1
70 u8 rssi_enable;
72 #define MXL_CAP_SEL_DISABLE 0
73 #define MXL_CAP_SEL_ENABLE 1
74 u8 cap_select;
76 #define MXL_DIV_OUT_1 0
77 #define MXL_DIV_OUT_4 1
78 u8 div_out;
80 #define MXL_CLOCK_OUT_DISABLE 0
81 #define MXL_CLOCK_OUT_ENABLE 1
82 u8 clock_out;
84 #define MXL5005S_IF_OUTPUT_LOAD_200_OHM 200
85 #define MXL5005S_IF_OUTPUT_LOAD_300_OHM 300
86 u32 output_load;
88 #define MXL5005S_TOP_5P5 55
89 #define MXL5005S_TOP_7P2 72
90 #define MXL5005S_TOP_9P2 92
91 #define MXL5005S_TOP_11P0 110
92 #define MXL5005S_TOP_12P9 129
93 #define MXL5005S_TOP_14P7 147
94 #define MXL5005S_TOP_16P8 168
95 #define MXL5005S_TOP_19P4 194
96 #define MXL5005S_TOP_21P2 212
97 #define MXL5005S_TOP_23P2 232
98 #define MXL5005S_TOP_25P2 252
99 #define MXL5005S_TOP_27P1 271
100 #define MXL5005S_TOP_29P2 292
101 #define MXL5005S_TOP_31P7 317
102 #define MXL5005S_TOP_34P9 349
103 u32 top;
105 #define MXL_ANALOG_MODE 0
106 #define MXL_DIGITAL_MODE 1
107 u8 mod_mode;
109 #define MXL_ZERO_IF 0
110 #define MXL_LOW_IF 1
111 u8 if_mode;
113 /* Some boards need to override the built-in logic for determining
114 the gain when in QAM mode (the HVR-1600 is one such case) */
115 u8 qam_gain;
117 /* Stuff I don't know what to do with */
118 u8 AgcMasterByte;
121 #if IS_ENABLED(CONFIG_MEDIA_TUNER_MXL5005S)
122 extern struct dvb_frontend *mxl5005s_attach(struct dvb_frontend *fe,
123 struct i2c_adapter *i2c,
124 struct mxl5005s_config *config);
125 #else
126 static inline struct dvb_frontend *mxl5005s_attach(struct dvb_frontend *fe,
127 struct i2c_adapter *i2c,
128 struct mxl5005s_config *config)
130 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
131 return NULL;
133 #endif /* CONFIG_DVB_TUNER_MXL5005S */
135 #endif /* __MXL5005S_H */