cfg80211: make nl80211_send_mlme_timeout() static
[linux/fpc-iii.git] / drivers / ide / alim15x3.c
blob537da1cde16d6aa00c21d5b51d9c73aa6a7c71fa
1 /*
2 * Copyright (C) 1998-2000 Michel Aubry, Maintainer
3 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
4 * Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer
6 * Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org)
7 * May be copied or modified under the terms of the GNU General Public License
8 * Copyright (C) 2002 Alan Cox
9 * ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw>
10 * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com>
11 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
13 * (U)DMA capable version of ali 1533/1543(C), 1535(D)
15 **********************************************************************
16 * 9/7/99 --Parts from the above author are included and need to be
17 * converted into standard interface, once I finish the thought.
19 * Recent changes
20 * Don't use LBA48 mode on ALi <= 0xC4
21 * Don't poke 0x79 with a non ALi northbridge
22 * Don't flip undefined bits on newer chipsets (fix Fujitsu laptop hang)
23 * Allow UDMA6 on revisions > 0xC4
25 * Documentation
26 * Chipset documentation available under NDA only
30 #include <linux/module.h>
31 #include <linux/types.h>
32 #include <linux/kernel.h>
33 #include <linux/pci.h>
34 #include <linux/ide.h>
35 #include <linux/init.h>
36 #include <linux/dmi.h>
38 #include <asm/io.h>
40 #define DRV_NAME "alim15x3"
43 * Allow UDMA on M1543C-E chipset for WDC disks that ignore CRC checking
44 * (this is DANGEROUS and could result in data corruption).
46 static int wdc_udma;
48 module_param(wdc_udma, bool, 0);
49 MODULE_PARM_DESC(wdc_udma,
50 "allow UDMA on M1543C-E chipset for WDC disks (DANGEROUS)");
53 * ALi devices are not plug in. Otherwise these static values would
54 * need to go. They ought to go away anyway
57 static u8 m5229_revision;
58 static u8 chip_is_1543c_e;
59 static struct pci_dev *isa_dev;
61 /**
62 * ali_set_pio_mode - set host controller for PIO mode
63 * @drive: drive
64 * @pio: PIO mode number
66 * Program the controller for the given PIO mode.
69 static void ali_set_pio_mode(ide_drive_t *drive, const u8 pio)
71 ide_hwif_t *hwif = drive->hwif;
72 struct pci_dev *dev = to_pci_dev(hwif->dev);
73 struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
74 int s_time = t->setup, a_time = t->active, c_time = t->cycle;
75 u8 s_clc, a_clc, r_clc;
76 unsigned long flags;
77 int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
78 int port = hwif->channel ? 0x5c : 0x58;
79 int portFIFO = hwif->channel ? 0x55 : 0x54;
80 u8 cd_dma_fifo = 0, unit = drive->dn & 1;
82 if ((s_clc = (s_time * bus_speed + 999) / 1000) >= 8)
83 s_clc = 0;
84 if ((a_clc = (a_time * bus_speed + 999) / 1000) >= 8)
85 a_clc = 0;
87 if (!(r_clc = (c_time * bus_speed + 999) / 1000 - a_clc - s_clc)) {
88 r_clc = 1;
89 } else {
90 if (r_clc >= 16)
91 r_clc = 0;
93 local_irq_save(flags);
95 /*
96 * PIO mode => ATA FIFO on, ATAPI FIFO off
98 pci_read_config_byte(dev, portFIFO, &cd_dma_fifo);
99 if (drive->media==ide_disk) {
100 if (unit) {
101 pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0x0F) | 0x50);
102 } else {
103 pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0xF0) | 0x05);
105 } else {
106 if (unit) {
107 pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0x0F);
108 } else {
109 pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0xF0);
113 pci_write_config_byte(dev, port, s_clc);
114 pci_write_config_byte(dev, port + unit + 2, (a_clc << 4) | r_clc);
115 local_irq_restore(flags);
119 * ali_udma_filter - compute UDMA mask
120 * @drive: IDE device
122 * Return available UDMA modes.
124 * The actual rules for the ALi are:
125 * No UDMA on revisions <= 0x20
126 * Disk only for revisions < 0xC2
127 * Not WDC drives on M1543C-E (?)
130 static u8 ali_udma_filter(ide_drive_t *drive)
132 if (m5229_revision > 0x20 && m5229_revision < 0xC2) {
133 if (drive->media != ide_disk)
134 return 0;
135 if (wdc_udma == 0 && chip_is_1543c_e &&
136 strstr((char *)&drive->id[ATA_ID_PROD], "WDC "))
137 return 0;
140 return drive->hwif->ultra_mask;
144 * ali_set_dma_mode - set host controller for DMA mode
145 * @drive: drive
146 * @speed: DMA mode
148 * Configure the hardware for the desired IDE transfer mode.
151 static void ali_set_dma_mode(ide_drive_t *drive, const u8 speed)
153 ide_hwif_t *hwif = drive->hwif;
154 struct pci_dev *dev = to_pci_dev(hwif->dev);
155 u8 speed1 = speed;
156 u8 unit = drive->dn & 1;
157 u8 tmpbyte = 0x00;
158 int m5229_udma = (hwif->channel) ? 0x57 : 0x56;
160 if (speed == XFER_UDMA_6)
161 speed1 = 0x47;
163 if (speed < XFER_UDMA_0) {
164 u8 ultra_enable = (unit) ? 0x7f : 0xf7;
166 * clear "ultra enable" bit
168 pci_read_config_byte(dev, m5229_udma, &tmpbyte);
169 tmpbyte &= ultra_enable;
170 pci_write_config_byte(dev, m5229_udma, tmpbyte);
173 * FIXME: Oh, my... DMA timings are never set.
175 } else {
176 pci_read_config_byte(dev, m5229_udma, &tmpbyte);
177 tmpbyte &= (0x0f << ((1-unit) << 2));
179 * enable ultra dma and set timing
181 tmpbyte |= ((0x08 | ((4-speed1)&0x07)) << (unit << 2));
182 pci_write_config_byte(dev, m5229_udma, tmpbyte);
183 if (speed >= XFER_UDMA_3) {
184 pci_read_config_byte(dev, 0x4b, &tmpbyte);
185 tmpbyte |= 1;
186 pci_write_config_byte(dev, 0x4b, tmpbyte);
192 * ali_dma_check - DMA check
193 * @drive: target device
194 * @cmd: command
196 * Returns 1 if the DMA cannot be performed, zero on success.
199 static int ali_dma_check(ide_drive_t *drive, struct ide_cmd *cmd)
201 if (m5229_revision < 0xC2 && drive->media != ide_disk) {
202 if (cmd->tf_flags & IDE_TFLAG_WRITE)
203 return 1; /* try PIO instead of DMA */
205 return 0;
209 * init_chipset_ali15x3 - Initialise an ALi IDE controller
210 * @dev: PCI device
212 * This function initializes the ALI IDE controller and where
213 * appropriate also sets up the 1533 southbridge.
216 static int init_chipset_ali15x3(struct pci_dev *dev)
218 unsigned long flags;
219 u8 tmpbyte;
220 struct pci_dev *north = pci_get_slot(dev->bus, PCI_DEVFN(0,0));
222 m5229_revision = dev->revision;
224 isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
226 local_irq_save(flags);
228 if (m5229_revision < 0xC2) {
230 * revision 0x20 (1543-E, 1543-F)
231 * revision 0xC0, 0xC1 (1543C-C, 1543C-D, 1543C-E)
232 * clear CD-ROM DMA write bit, m5229, 0x4b, bit 7
234 pci_read_config_byte(dev, 0x4b, &tmpbyte);
236 * clear bit 7
238 pci_write_config_byte(dev, 0x4b, tmpbyte & 0x7F);
240 * check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010
242 if (m5229_revision >= 0x20 && isa_dev) {
243 pci_read_config_byte(isa_dev, 0x5e, &tmpbyte);
244 chip_is_1543c_e = ((tmpbyte & 0x1e) == 0x12) ? 1: 0;
246 goto out;
250 * 1543C-B?, 1535, 1535D, 1553
251 * Note 1: not all "motherboard" support this detection
252 * Note 2: if no udma 66 device, the detection may "error".
253 * but in this case, we will not set the device to
254 * ultra 66, the detection result is not important
258 * enable "Cable Detection", m5229, 0x4b, bit3
260 pci_read_config_byte(dev, 0x4b, &tmpbyte);
261 pci_write_config_byte(dev, 0x4b, tmpbyte | 0x08);
264 * We should only tune the 1533 enable if we are using an ALi
265 * North bridge. We might have no north found on some zany
266 * box without a device at 0:0.0. The ALi bridge will be at
267 * 0:0.0 so if we didn't find one we know what is cooking.
269 if (north && north->vendor != PCI_VENDOR_ID_AL)
270 goto out;
272 if (m5229_revision < 0xC5 && isa_dev)
275 * set south-bridge's enable bit, m1533, 0x79
278 pci_read_config_byte(isa_dev, 0x79, &tmpbyte);
279 if (m5229_revision == 0xC2) {
281 * 1543C-B0 (m1533, 0x79, bit 2)
283 pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x04);
284 } else if (m5229_revision >= 0xC3) {
286 * 1553/1535 (m1533, 0x79, bit 1)
288 pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x02);
292 out:
294 * CD_ROM DMA on (m5229, 0x53, bit0)
295 * Enable this bit even if we want to use PIO.
296 * PIO FIFO off (m5229, 0x53, bit1)
297 * The hardware will use 0x54h and 0x55h to control PIO FIFO.
298 * (Not on later devices it seems)
300 * 0x53 changes meaning on later revs - we must no touch
301 * bit 1 on them. Need to check if 0x20 is the right break.
303 if (m5229_revision >= 0x20) {
304 pci_read_config_byte(dev, 0x53, &tmpbyte);
306 if (m5229_revision <= 0x20)
307 tmpbyte = (tmpbyte & (~0x02)) | 0x01;
308 else if (m5229_revision == 0xc7 || m5229_revision == 0xc8)
309 tmpbyte |= 0x03;
310 else
311 tmpbyte |= 0x01;
313 pci_write_config_byte(dev, 0x53, tmpbyte);
315 pci_dev_put(north);
316 pci_dev_put(isa_dev);
317 local_irq_restore(flags);
318 return 0;
322 * Cable special cases
325 static const struct dmi_system_id cable_dmi_table[] = {
327 .ident = "HP Pavilion N5430",
328 .matches = {
329 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
330 DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
334 .ident = "Toshiba Satellite S1800-814",
335 .matches = {
336 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
337 DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"),
343 static int ali_cable_override(struct pci_dev *pdev)
345 /* Fujitsu P2000 */
346 if (pdev->subsystem_vendor == 0x10CF &&
347 pdev->subsystem_device == 0x10AF)
348 return 1;
350 /* Mitac 8317 (Winbook-A) and relatives */
351 if (pdev->subsystem_vendor == 0x1071 &&
352 pdev->subsystem_device == 0x8317)
353 return 1;
355 /* Systems by DMI */
356 if (dmi_check_system(cable_dmi_table))
357 return 1;
359 return 0;
363 * ali_cable_detect - cable detection
364 * @hwif: IDE interface
366 * This checks if the controller and the cable are capable
367 * of UDMA66 transfers. It doesn't check the drives.
368 * But see note 2 below!
370 * FIXME: frobs bits that are not defined on newer ALi devicea
373 static u8 ali_cable_detect(ide_hwif_t *hwif)
375 struct pci_dev *dev = to_pci_dev(hwif->dev);
376 unsigned long flags;
377 u8 cbl = ATA_CBL_PATA40, tmpbyte;
379 local_irq_save(flags);
381 if (m5229_revision >= 0xC2) {
383 * m5229 80-pin cable detection (from Host View)
385 * 0x4a bit0 is 0 => primary channel has 80-pin
386 * 0x4a bit1 is 0 => secondary channel has 80-pin
388 * Certain laptops use short but suitable cables
389 * and don't implement the detect logic.
391 if (ali_cable_override(dev))
392 cbl = ATA_CBL_PATA40_SHORT;
393 else {
394 pci_read_config_byte(dev, 0x4a, &tmpbyte);
395 if ((tmpbyte & (1 << hwif->channel)) == 0)
396 cbl = ATA_CBL_PATA80;
400 local_irq_restore(flags);
402 return cbl;
405 #if !defined(CONFIG_SPARC64) && !defined(CONFIG_PPC)
407 * init_hwif_ali15x3 - Initialize the ALI IDE x86 stuff
408 * @hwif: interface to configure
410 * Obtain the IRQ tables for an ALi based IDE solution on the PC
411 * class platforms. This part of the code isn't applicable to the
412 * Sparc and PowerPC systems.
415 static void __devinit init_hwif_ali15x3 (ide_hwif_t *hwif)
417 struct pci_dev *dev = to_pci_dev(hwif->dev);
418 u8 ideic, inmir;
419 s8 irq_routing_table[] = { -1, 9, 3, 10, 4, 5, 7, 6,
420 1, 11, 0, 12, 0, 14, 0, 15 };
421 int irq = -1;
423 if (dev->device == PCI_DEVICE_ID_AL_M5229)
424 hwif->irq = hwif->channel ? 15 : 14;
426 if (isa_dev) {
428 * read IDE interface control
430 pci_read_config_byte(isa_dev, 0x58, &ideic);
432 /* bit0, bit1 */
433 ideic = ideic & 0x03;
435 /* get IRQ for IDE Controller */
436 if ((hwif->channel && ideic == 0x03) ||
437 (!hwif->channel && !ideic)) {
439 * get SIRQ1 routing table
441 pci_read_config_byte(isa_dev, 0x44, &inmir);
442 inmir = inmir & 0x0f;
443 irq = irq_routing_table[inmir];
444 } else if (hwif->channel && !(ideic & 0x01)) {
446 * get SIRQ2 routing table
448 pci_read_config_byte(isa_dev, 0x75, &inmir);
449 inmir = inmir & 0x0f;
450 irq = irq_routing_table[inmir];
452 if(irq >= 0)
453 hwif->irq = irq;
456 #else
457 #define init_hwif_ali15x3 NULL
458 #endif /* !defined(CONFIG_SPARC64) && !defined(CONFIG_PPC) */
461 * init_dma_ali15x3 - set up DMA on ALi15x3
462 * @hwif: IDE interface
463 * @d: IDE port info
465 * Set up the DMA functionality on the ALi 15x3.
468 static int __devinit init_dma_ali15x3(ide_hwif_t *hwif,
469 const struct ide_port_info *d)
471 struct pci_dev *dev = to_pci_dev(hwif->dev);
472 unsigned long base = ide_pci_dma_base(hwif, d);
474 if (base == 0)
475 return -1;
477 hwif->dma_base = base;
479 if (ide_pci_check_simplex(hwif, d) < 0)
480 return -1;
482 if (ide_pci_set_master(dev, d->name) < 0)
483 return -1;
485 if (!hwif->channel)
486 outb(inb(base + 2) & 0x60, base + 2);
488 printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n",
489 hwif->name, base, base + 7);
491 if (ide_allocate_dma_engine(hwif))
492 return -1;
494 return 0;
497 static const struct ide_port_ops ali_port_ops = {
498 .set_pio_mode = ali_set_pio_mode,
499 .set_dma_mode = ali_set_dma_mode,
500 .udma_filter = ali_udma_filter,
501 .cable_detect = ali_cable_detect,
504 static const struct ide_dma_ops ali_dma_ops = {
505 .dma_host_set = ide_dma_host_set,
506 .dma_setup = ide_dma_setup,
507 .dma_start = ide_dma_start,
508 .dma_end = ide_dma_end,
509 .dma_test_irq = ide_dma_test_irq,
510 .dma_lost_irq = ide_dma_lost_irq,
511 .dma_check = ali_dma_check,
512 .dma_timer_expiry = ide_dma_sff_timer_expiry,
513 .dma_sff_read_status = ide_dma_sff_read_status,
516 static const struct ide_port_info ali15x3_chipset __devinitdata = {
517 .name = DRV_NAME,
518 .init_chipset = init_chipset_ali15x3,
519 .init_hwif = init_hwif_ali15x3,
520 .init_dma = init_dma_ali15x3,
521 .port_ops = &ali_port_ops,
522 .dma_ops = &sff_dma_ops,
523 .pio_mask = ATA_PIO5,
524 .swdma_mask = ATA_SWDMA2,
525 .mwdma_mask = ATA_MWDMA2,
529 * alim15x3_init_one - set up an ALi15x3 IDE controller
530 * @dev: PCI device to set up
532 * Perform the actual set up for an ALi15x3 that has been found by the
533 * hot plug layer.
536 static int __devinit alim15x3_init_one(struct pci_dev *dev, const struct pci_device_id *id)
538 struct ide_port_info d = ali15x3_chipset;
539 u8 rev = dev->revision, idx = id->driver_data;
541 /* don't use LBA48 DMA on ALi devices before rev 0xC5 */
542 if (rev <= 0xC4)
543 d.host_flags |= IDE_HFLAG_NO_LBA48_DMA;
545 if (rev >= 0x20) {
546 if (rev == 0x20)
547 d.host_flags |= IDE_HFLAG_NO_ATAPI_DMA;
549 if (rev < 0xC2)
550 d.udma_mask = ATA_UDMA2;
551 else if (rev == 0xC2 || rev == 0xC3)
552 d.udma_mask = ATA_UDMA4;
553 else if (rev == 0xC4)
554 d.udma_mask = ATA_UDMA5;
555 else
556 d.udma_mask = ATA_UDMA6;
558 d.dma_ops = &ali_dma_ops;
559 } else {
560 d.host_flags |= IDE_HFLAG_NO_DMA;
562 d.mwdma_mask = d.swdma_mask = 0;
565 if (idx == 0)
566 d.host_flags |= IDE_HFLAG_CLEAR_SIMPLEX;
568 return ide_pci_init_one(dev, &d, NULL);
572 static const struct pci_device_id alim15x3_pci_tbl[] = {
573 { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), 0 },
574 { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), 1 },
575 { 0, },
577 MODULE_DEVICE_TABLE(pci, alim15x3_pci_tbl);
579 static struct pci_driver alim15x3_pci_driver = {
580 .name = "ALI15x3_IDE",
581 .id_table = alim15x3_pci_tbl,
582 .probe = alim15x3_init_one,
583 .remove = ide_pci_remove,
584 .suspend = ide_pci_suspend,
585 .resume = ide_pci_resume,
588 static int __init ali15x3_ide_init(void)
590 return ide_pci_register_driver(&alim15x3_pci_driver);
593 static void __exit ali15x3_ide_exit(void)
595 pci_unregister_driver(&alim15x3_pci_driver);
598 module_init(ali15x3_ide_init);
599 module_exit(ali15x3_ide_exit);
601 MODULE_AUTHOR("Michael Aubry, Andrzej Krzysztofowicz, CJ, Andre Hedrick, Alan Cox");
602 MODULE_DESCRIPTION("PCI driver module for ALi 15x3 IDE");
603 MODULE_LICENSE("GPL");