2 * Copyright © 2010 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 * Jackie Li<yaodong.li@intel.com>
27 #include <linux/freezer.h>
29 #include "mdfld_dsi_output.h"
30 #include "mdfld_dsi_pkg_sender.h"
31 #include "mdfld_dsi_dpi.h"
33 #define MDFLD_DSI_READ_MAX_COUNT 5000
36 DSI_DT_GENERIC_SHORT_WRITE_0
= 0x03,
37 DSI_DT_GENERIC_SHORT_WRITE_1
= 0x13,
38 DSI_DT_GENERIC_SHORT_WRITE_2
= 0x23,
39 DSI_DT_GENERIC_READ_0
= 0x04,
40 DSI_DT_GENERIC_READ_1
= 0x14,
41 DSI_DT_GENERIC_READ_2
= 0x24,
42 DSI_DT_GENERIC_LONG_WRITE
= 0x29,
43 DSI_DT_DCS_SHORT_WRITE_0
= 0x05,
44 DSI_DT_DCS_SHORT_WRITE_1
= 0x15,
45 DSI_DT_DCS_READ
= 0x06,
46 DSI_DT_DCS_LONG_WRITE
= 0x39,
50 MDFLD_DSI_PANEL_MODE_SLEEP
= 0x1,
54 MDFLD_DSI_PKG_SENDER_FREE
= 0x0,
55 MDFLD_DSI_PKG_SENDER_BUSY
= 0x1,
58 static const char *const dsi_errors
[] = {
62 "RX Escape Mode Entry Error",
63 "RX LP TX Sync Error",
64 "RX HS Receive Timeout Error",
65 "RX False Control Error",
66 "RX ECC Single Bit Error",
67 "RX ECC Multibit Error",
69 "RX DSI Data Type Not Recognised",
70 "RX DSI VC ID Invalid",
71 "TX False Control Error",
72 "TX ECC Single Bit Error",
73 "TX ECC Multibit Error",
75 "TX DSI Data Type Not Recognised",
76 "TX DSI VC ID invalid",
82 "Turn Around ACK Timeout",
84 "RX Invalid TX Length",
86 "HS Generic Write FIFO Full",
87 "LP Generic Write FIFO Full",
88 "Generic Read Data Avail"
89 "Special Packet Sent",
93 static inline int wait_for_gen_fifo_empty(struct mdfld_dsi_pkg_sender
*sender
,
96 struct drm_device
*dev
= sender
->dev
;
97 u32 gen_fifo_stat_reg
= sender
->mipi_gen_fifo_stat_reg
;
101 if ((mask
& REG_READ(gen_fifo_stat_reg
)) == mask
)
105 DRM_ERROR("fifo is NOT empty 0x%08x\n", REG_READ(gen_fifo_stat_reg
));
109 static int wait_for_all_fifos_empty(struct mdfld_dsi_pkg_sender
*sender
)
111 return wait_for_gen_fifo_empty(sender
, (BIT(2) | BIT(10) | BIT(18) |
112 BIT(26) | BIT(27) | BIT(28)));
115 static int wait_for_lp_fifos_empty(struct mdfld_dsi_pkg_sender
*sender
)
117 return wait_for_gen_fifo_empty(sender
, (BIT(10) | BIT(26)));
120 static int wait_for_hs_fifos_empty(struct mdfld_dsi_pkg_sender
*sender
)
122 return wait_for_gen_fifo_empty(sender
, (BIT(2) | BIT(18)));
125 static int handle_dsi_error(struct mdfld_dsi_pkg_sender
*sender
, u32 mask
)
127 u32 intr_stat_reg
= sender
->mipi_intr_stat_reg
;
128 struct drm_device
*dev
= sender
->dev
;
130 dev_dbg(sender
->dev
->dev
, "Handling error 0x%08x\n", mask
);
147 dev_dbg(sender
->dev
->dev
, "No Action required\n");
150 /*wait for all fifo empty*/
151 /*wait_for_all_fifos_empty(sender)*/;
154 dev_dbg(sender
->dev
->dev
, "No Action required\n");
162 dev_dbg(sender
->dev
->dev
, "High/Low contention detected\n");
163 /*wait for contention recovery time*/
165 /*wait for all fifo empty*/
167 wait_for_all_fifos_empty(sender
);
170 dev_dbg(sender
->dev
->dev
, "No Action required\n");
173 /*wait for all fifo empty*/
174 /*wait_for_all_fifos_empty(sender);*/
183 dev_dbg(sender
->dev
->dev
, "HS Gen fifo full\n");
184 REG_WRITE(intr_stat_reg
, mask
);
185 wait_for_hs_fifos_empty(sender
);
188 dev_dbg(sender
->dev
->dev
, "LP Gen fifo full\n");
189 REG_WRITE(intr_stat_reg
, mask
);
190 wait_for_lp_fifos_empty(sender
);
195 dev_dbg(sender
->dev
->dev
, "No Action required\n");
199 if (mask
& REG_READ(intr_stat_reg
))
200 dev_dbg(sender
->dev
->dev
,
201 "Cannot clean interrupt 0x%08x\n", mask
);
205 static int dsi_error_handler(struct mdfld_dsi_pkg_sender
*sender
)
207 struct drm_device
*dev
= sender
->dev
;
208 u32 intr_stat_reg
= sender
->mipi_intr_stat_reg
;
214 intr_stat
= REG_READ(intr_stat_reg
);
216 for (i
= 0; i
< 32; i
++) {
217 mask
= (0x00000001UL
) << i
;
218 if (intr_stat
& mask
) {
219 dev_dbg(sender
->dev
->dev
, "[DSI]: %s\n", dsi_errors
[i
]);
220 err
= handle_dsi_error(sender
, mask
);
222 DRM_ERROR("Cannot handle error\n");
228 static int send_short_pkg(struct mdfld_dsi_pkg_sender
*sender
, u8 data_type
,
229 u8 cmd
, u8 param
, bool hs
)
231 struct drm_device
*dev
= sender
->dev
;
234 u8 virtual_channel
= 0;
237 ctrl_reg
= sender
->mipi_hs_gen_ctrl_reg
;
239 /* FIXME: wait_for_hs_fifos_empty(sender); */
241 ctrl_reg
= sender
->mipi_lp_gen_ctrl_reg
;
243 /* FIXME: wait_for_lp_fifos_empty(sender); */
246 val
= FLD_VAL(param
, 23, 16) | FLD_VAL(cmd
, 15, 8) |
247 FLD_VAL(virtual_channel
, 7, 6) | FLD_VAL(data_type
, 5, 0);
249 REG_WRITE(ctrl_reg
, val
);
254 static int send_long_pkg(struct mdfld_dsi_pkg_sender
*sender
, u8 data_type
,
255 u8
*data
, int len
, bool hs
)
257 struct drm_device
*dev
= sender
->dev
;
263 u8 virtual_channel
= 0;
267 ctrl_reg
= sender
->mipi_hs_gen_ctrl_reg
;
268 data_reg
= sender
->mipi_hs_gen_data_reg
;
270 /* FIXME: wait_for_hs_fifos_empty(sender); */
272 ctrl_reg
= sender
->mipi_lp_gen_ctrl_reg
;
273 data_reg
= sender
->mipi_lp_gen_data_reg
;
275 /* FIXME: wait_for_lp_fifos_empty(sender); */
279 for (i
= 0; i
< len
/ 4; i
++) {
285 REG_WRITE(data_reg
, b4
<< 24 | b3
<< 16 | b2
<< 8 | b1
);
290 b1
= 0; b2
= 0; b3
= 0;
307 REG_WRITE(data_reg
, b3
<< 16 | b2
<< 8 | b1
);
310 val
= FLD_VAL(len
, 23, 8) | FLD_VAL(virtual_channel
, 7, 6) |
311 FLD_VAL(data_type
, 5, 0);
313 REG_WRITE(ctrl_reg
, val
);
318 static int send_pkg_prepare(struct mdfld_dsi_pkg_sender
*sender
, u8 data_type
,
324 case DSI_DT_DCS_SHORT_WRITE_0
:
325 case DSI_DT_DCS_SHORT_WRITE_1
:
326 case DSI_DT_DCS_LONG_WRITE
:
333 /*this prevents other package sending while doing msleep*/
334 sender
->status
= MDFLD_DSI_PKG_SENDER_BUSY
;
336 /*wait for 120 milliseconds in case exit_sleep_mode just be sent*/
337 if (unlikely(cmd
== DCS_ENTER_SLEEP_MODE
)) {
338 /*TODO: replace it with msleep later*/
342 if (unlikely(cmd
== DCS_EXIT_SLEEP_MODE
)) {
343 /*TODO: replace it with msleep later*/
349 static int send_pkg_done(struct mdfld_dsi_pkg_sender
*sender
, u8 data_type
,
355 case DSI_DT_DCS_SHORT_WRITE_0
:
356 case DSI_DT_DCS_SHORT_WRITE_1
:
357 case DSI_DT_DCS_LONG_WRITE
:
364 /*update panel status*/
365 if (unlikely(cmd
== DCS_ENTER_SLEEP_MODE
)) {
366 sender
->panel_mode
|= MDFLD_DSI_PANEL_MODE_SLEEP
;
367 /*TODO: replace it with msleep later*/
369 } else if (unlikely(cmd
== DCS_EXIT_SLEEP_MODE
)) {
370 sender
->panel_mode
&= ~MDFLD_DSI_PANEL_MODE_SLEEP
;
371 /*TODO: replace it with msleep later*/
373 } else if (unlikely(cmd
== DCS_SOFT_RESET
)) {
374 /*TODO: replace it with msleep later*/
378 sender
->status
= MDFLD_DSI_PKG_SENDER_FREE
;
383 static int send_pkg(struct mdfld_dsi_pkg_sender
*sender
, u8 data_type
,
384 u8
*data
, u16 len
, bool hs
)
389 ret
= dsi_error_handler(sender
);
391 DRM_ERROR("Error handling failed\n");
396 if (sender
->status
== MDFLD_DSI_PKG_SENDER_BUSY
) {
397 DRM_ERROR("sender is busy\n");
401 ret
= send_pkg_prepare(sender
, data_type
, data
, len
);
403 DRM_ERROR("send_pkg_prepare error\n");
408 case DSI_DT_GENERIC_SHORT_WRITE_0
:
409 case DSI_DT_GENERIC_SHORT_WRITE_1
:
410 case DSI_DT_GENERIC_SHORT_WRITE_2
:
411 case DSI_DT_GENERIC_READ_0
:
412 case DSI_DT_GENERIC_READ_1
:
413 case DSI_DT_GENERIC_READ_2
:
414 case DSI_DT_DCS_SHORT_WRITE_0
:
415 case DSI_DT_DCS_SHORT_WRITE_1
:
416 case DSI_DT_DCS_READ
:
417 ret
= send_short_pkg(sender
, data_type
, data
[0], data
[1], hs
);
419 case DSI_DT_GENERIC_LONG_WRITE
:
420 case DSI_DT_DCS_LONG_WRITE
:
421 ret
= send_long_pkg(sender
, data_type
, data
, len
, hs
);
425 send_pkg_done(sender
, data_type
, data
, len
);
427 /*FIXME: should I query complete and fifo empty here?*/
432 int mdfld_dsi_send_mcs_long(struct mdfld_dsi_pkg_sender
*sender
, u8
*data
,
437 if (!sender
|| !data
|| !len
) {
438 DRM_ERROR("Invalid parameters\n");
442 spin_lock_irqsave(&sender
->lock
, flags
);
443 send_pkg(sender
, DSI_DT_DCS_LONG_WRITE
, data
, len
, hs
);
444 spin_unlock_irqrestore(&sender
->lock
, flags
);
449 int mdfld_dsi_send_mcs_short(struct mdfld_dsi_pkg_sender
*sender
, u8 cmd
,
450 u8 param
, u8 param_num
, bool hs
)
457 DRM_ERROR("Invalid parameter\n");
464 data_type
= DSI_DT_DCS_SHORT_WRITE_1
;
467 data_type
= DSI_DT_DCS_SHORT_WRITE_0
;
471 spin_lock_irqsave(&sender
->lock
, flags
);
472 send_pkg(sender
, data_type
, data
, sizeof(data
), hs
);
473 spin_unlock_irqrestore(&sender
->lock
, flags
);
478 int mdfld_dsi_send_gen_short(struct mdfld_dsi_pkg_sender
*sender
, u8 param0
,
479 u8 param1
, u8 param_num
, bool hs
)
485 if (!sender
|| param_num
> 2) {
486 DRM_ERROR("Invalid parameter\n");
492 data_type
= DSI_DT_GENERIC_SHORT_WRITE_0
;
497 data_type
= DSI_DT_GENERIC_SHORT_WRITE_1
;
502 data_type
= DSI_DT_GENERIC_SHORT_WRITE_2
;
508 spin_lock_irqsave(&sender
->lock
, flags
);
509 send_pkg(sender
, data_type
, data
, sizeof(data
), hs
);
510 spin_unlock_irqrestore(&sender
->lock
, flags
);
515 int mdfld_dsi_send_gen_long(struct mdfld_dsi_pkg_sender
*sender
, u8
*data
,
520 if (!sender
|| !data
|| !len
) {
521 DRM_ERROR("Invalid parameters\n");
525 spin_lock_irqsave(&sender
->lock
, flags
);
526 send_pkg(sender
, DSI_DT_GENERIC_LONG_WRITE
, data
, len
, hs
);
527 spin_unlock_irqrestore(&sender
->lock
, flags
);
532 static int __read_panel_data(struct mdfld_dsi_pkg_sender
*sender
, u8 data_type
,
533 u8
*data
, u16 len
, u32
*data_out
, u16 len_out
, bool hs
)
536 struct drm_device
*dev
= sender
->dev
;
539 int retry
= MDFLD_DSI_READ_MAX_COUNT
;
541 if (!sender
|| !data_out
|| !len_out
) {
542 DRM_ERROR("Invalid parameters\n");
548 * 0) send out generic read request
549 * 1) polling read data avail interrupt
552 spin_lock_irqsave(&sender
->lock
, flags
);
554 REG_WRITE(sender
->mipi_intr_stat_reg
, BIT(29));
556 if ((REG_READ(sender
->mipi_intr_stat_reg
) & BIT(29)))
557 DRM_ERROR("Can NOT clean read data valid interrupt\n");
559 /*send out read request*/
560 send_pkg(sender
, data_type
, data
, len
, hs
);
562 /*polling read data avail interrupt*/
563 while (retry
&& !(REG_READ(sender
->mipi_intr_stat_reg
) & BIT(29))) {
569 spin_unlock_irqrestore(&sender
->lock
, flags
);
573 REG_WRITE(sender
->mipi_intr_stat_reg
, BIT(29));
577 gen_data_reg
= sender
->mipi_hs_gen_data_reg
;
579 gen_data_reg
= sender
->mipi_lp_gen_data_reg
;
581 for (i
= 0; i
< len_out
; i
++)
582 *(data_out
+ i
) = REG_READ(gen_data_reg
);
584 spin_unlock_irqrestore(&sender
->lock
, flags
);
589 int mdfld_dsi_read_mcs(struct mdfld_dsi_pkg_sender
*sender
, u8 cmd
,
590 u32
*data
, u16 len
, bool hs
)
592 if (!sender
|| !data
|| !len
) {
593 DRM_ERROR("Invalid parameters\n");
597 return __read_panel_data(sender
, DSI_DT_DCS_READ
, &cmd
, 1,
601 int mdfld_dsi_pkg_sender_init(struct mdfld_dsi_connector
*dsi_connector
,
604 struct mdfld_dsi_pkg_sender
*pkg_sender
;
605 struct mdfld_dsi_config
*dsi_config
=
606 mdfld_dsi_get_config(dsi_connector
);
607 struct drm_device
*dev
= dsi_config
->dev
;
608 struct drm_psb_private
*dev_priv
= dev
->dev_private
;
609 const struct psb_offset
*map
= &dev_priv
->regmap
[pipe
];
612 if (!dsi_connector
) {
613 DRM_ERROR("Invalid parameter\n");
617 pkg_sender
= dsi_connector
->pkg_sender
;
619 if (!pkg_sender
|| IS_ERR(pkg_sender
)) {
620 pkg_sender
= kzalloc(sizeof(struct mdfld_dsi_pkg_sender
),
623 DRM_ERROR("Create DSI pkg sender failed\n");
626 dsi_connector
->pkg_sender
= (void *)pkg_sender
;
629 pkg_sender
->dev
= dev
;
630 pkg_sender
->dsi_connector
= dsi_connector
;
631 pkg_sender
->pipe
= pipe
;
632 pkg_sender
->pkg_num
= 0;
633 pkg_sender
->panel_mode
= 0;
634 pkg_sender
->status
= MDFLD_DSI_PKG_SENDER_FREE
;
637 /* FIXME: should just copy the regmap ptr ? */
638 pkg_sender
->dpll_reg
= map
->dpll
;
639 pkg_sender
->dspcntr_reg
= map
->cntr
;
640 pkg_sender
->pipeconf_reg
= map
->conf
;
641 pkg_sender
->dsplinoff_reg
= map
->linoff
;
642 pkg_sender
->dspsurf_reg
= map
->surf
;
643 pkg_sender
->pipestat_reg
= map
->status
;
645 pkg_sender
->mipi_intr_stat_reg
= MIPI_INTR_STAT_REG(pipe
);
646 pkg_sender
->mipi_lp_gen_data_reg
= MIPI_LP_GEN_DATA_REG(pipe
);
647 pkg_sender
->mipi_hs_gen_data_reg
= MIPI_HS_GEN_DATA_REG(pipe
);
648 pkg_sender
->mipi_lp_gen_ctrl_reg
= MIPI_LP_GEN_CTRL_REG(pipe
);
649 pkg_sender
->mipi_hs_gen_ctrl_reg
= MIPI_HS_GEN_CTRL_REG(pipe
);
650 pkg_sender
->mipi_gen_fifo_stat_reg
= MIPI_GEN_FIFO_STAT_REG(pipe
);
651 pkg_sender
->mipi_data_addr_reg
= MIPI_DATA_ADD_REG(pipe
);
652 pkg_sender
->mipi_data_len_reg
= MIPI_DATA_LEN_REG(pipe
);
653 pkg_sender
->mipi_cmd_addr_reg
= MIPI_CMD_ADD_REG(pipe
);
654 pkg_sender
->mipi_cmd_len_reg
= MIPI_CMD_LEN_REG(pipe
);
657 spin_lock_init(&pkg_sender
->lock
);
659 if (mdfld_get_panel_type(dev
, pipe
) != TC35876X
) {
661 * For video mode, don't enable DPI timing output here,
662 * will init the DPI timing output during mode setting.
664 mipi_val
= PASS_FROM_SPHY_TO_AFE
| SEL_FLOPPED_HSTX
;
669 REG_WRITE(MIPI_PORT_CONTROL(pipe
), mipi_val
);
670 REG_READ(MIPI_PORT_CONTROL(pipe
));
672 /* do dsi controller init */
673 mdfld_dsi_controller_init(dsi_config
, pipe
);
679 void mdfld_dsi_pkg_sender_destroy(struct mdfld_dsi_pkg_sender
*sender
)
681 if (!sender
|| IS_ERR(sender
))