4 The System Control Processor System (SCPSYS) has several power management
5 related tasks in the system. The tasks include thermal measurement, dynamic
6 voltage frequency scaling (DVFS), interrupt filter and lowlevel sleep control.
7 The System Power Manager (SPM) inside the SCPSYS is for the MTCMOS power
10 The driver implements the Generic PM domain bindings described in
11 power/power_domain.txt. It provides the power domains defined in
12 include/dt-bindings/power/mt8173-power.h.
15 - compatible: Must be "mediatek,mt8173-scpsys"
16 - #power-domain-cells: Must be 1
17 - reg: Address range of the SCPSYS unit
18 - infracfg: must contain a phandle to the infracfg controller
19 - clock, clock-names: clocks according to the common clock binding.
20 The clocks needed "mm", "mfg", "venc" and "venc_lt".
21 These are the clocks which hardware needs to be enabled
22 before enabling certain power domains.
25 - vdec-supply: Power supply for the vdec power domain
26 - venc-supply: Power supply for the venc power domain
27 - isp-supply: Power supply for the isp power domain
28 - mm-supply: Power supply for the mm power domain
29 - venc_lt-supply: Power supply for the venc_lt power domain
30 - audio-supply: Power supply for the audio power domain
31 - usb-supply: Power supply for the usb power domain
32 - mfg_async-supply: Power supply for the mfg_async power domain
33 - mfg_2d-supply: Power supply for the mfg_2d power domain
34 - mfg-supply: Power supply for the mfg power domain
38 scpsys: scpsys@10006000 {
39 #power-domain-cells = <1>;
40 compatible = "mediatek,mt8173-scpsys";
41 reg = <0 0x10006000 0 0x1000>;
42 infracfg = <&infracfg>;
44 <&topckgen CLK_TOP_MM_SEL>;
45 <&topckgen CLK_TOP_VENC_SEL>,
46 <&topckgen CLK_TOP_VENC_LT_SEL>;
47 clock-names = "mfg", "mm", "venc", "venc_lt";
52 afe: mt8173-afe-pcm@11220000 {
53 compatible = "mediatek,mt8173-afe-pcm";
54 power-domains = <&scpsys MT8173_POWER_DOMAIN_AUDIO>;