drivers/char/ip2/i2os.h

   1 /*******************************************************************************
   2 *
   3 *   (c) 1999 by Computone Corporation
   4 *
   5 ********************************************************************************
   6 *
   7 *
   8 *   PACKAGE:     Linux tty Device Driver for IntelliPort II family of multiport
   9 *                serial I/O controllers.
  10 *
  11 *   DESCRIPTION: Defines, definitions and includes which are heavily dependent
  12 *                on O/S, host, compiler, etc. This file is tailored for:
  13 *                 Linux v2.0.0 and later
  14 *                 Gnu gcc c2.7.2
  15 *                 80x86 architecture
  16 *
  17 *******************************************************************************/
  18
  19 #ifndef I2OS_H    /* To prevent multiple includes */
  20 #define I2OS_H 1
  21
  22 //-------------------------------------------------
  23 // Required Includes
  24 //-------------------------------------------------
  25
  26 #include "ip2types.h"
  27 #include <asm/io.h>  /* For inb, etc */
  28
  29 //------------------------------------
  30 // Defines for I/O instructions:
  31 //------------------------------------
  32
  33 #define INB(port)                inb(port)
  34 #define OUTB(port,value)         outb((value),(port))
  35 #define INW(port)                inw(port)
  36 #define OUTW(port,value)         outw((value),(port))
  37 #define OUTSW(port,addr,count)   outsw((port),(addr),(((count)+1)/2))
  38 #define OUTSB(port,addr,count)   outsb((port),(addr),(((count)+1))&-2)
  39 #define INSW(port,addr,count)    insw((port),(addr),(((count)+1)/2))
  40 #define INSB(port,addr,count)    insb((port),(addr),(((count)+1))&-2)
  41
  42 //--------------------------------------------
  43 // Interrupt control
  44 //--------------------------------------------
  45
  46 #define LOCK_INIT(a)    rwlock_init(a)
  47
  48 #define SAVE_AND_DISABLE_INTS(a,b) { \
  49         /* printk("get_lock: 0x%x,%4d,%s\n",(int)a,__LINE__,__FILE__);*/ \
  50         spin_lock_irqsave(a,b); \
  51 }
  52
  53 #define RESTORE_INTS(a,b) { \
  54         /* printk("rel_lock: 0x%x,%4d,%s\n",(int)a,__LINE__,__FILE__);*/ \
  55         spin_unlock_irqrestore(a,b); \
  56 }
  57
  58 #define READ_LOCK_IRQSAVE(a,b) { \
  59         /* printk("get_read_lock: 0x%x,%4d,%s\n",(int)a,__LINE__,__FILE__);*/ \
  60         read_lock_irqsave(a,b); \
  61 }
  62
  63 #define READ_UNLOCK_IRQRESTORE(a,b) { \
  64         /* printk("rel_read_lock: 0x%x,%4d,%s\n",(int)a,__LINE__,__FILE__);*/ \
  65         read_unlock_irqrestore(a,b); \
  66 }
  67
  68 #define WRITE_LOCK_IRQSAVE(a,b) { \
  69         /* printk("get_write_lock: 0x%x,%4d,%s\n",(int)a,__LINE__,__FILE__);*/ \
  70         write_lock_irqsave(a,b); \
  71 }
  72
  73 #define WRITE_UNLOCK_IRQRESTORE(a,b) { \
  74         /* printk("rel_write_lock: 0x%x,%4d,%s\n",(int)a,__LINE__,__FILE__);*/ \
  75         write_unlock_irqrestore(a,b); \
  76 }
  77
  78
  79 //------------------------------------------------------------------------------
  80 // Hardware-delay loop
  81 //
  82 // Probably used in only one place (see i2ellis.c) but this helps keep things
  83 // together. Note we have unwound the IN instructions. On machines with a
  84 // reasonable cache, the eight instructions (1 byte each) should fit in cache
  85 // nicely, and on un-cached machines, the code-fetch would tend not to dominate.
  86 // Note that cx is shifted so that "count" still reflects the total number of
  87 // iterations assuming no unwinding.
  88 //------------------------------------------------------------------------------
  89
  90 //#define  DELAY1MS(port,count,label)
  91
  92 //------------------------------------------------------------------------------
  93 // Macros to switch to a new stack, saving stack pointers, and to restore the
  94 // old stack (Used, for example, in i2lib.c) "heap" is the address of some
  95 // buffer which will become the new stack (working down from highest address).
  96 // The two words at the two lowest addresses in this stack are for storing the
  97 // SS and SP.
  98 //------------------------------------------------------------------------------
  99
 100 //#define  TO_NEW_STACK(heap,size)
 101 //#define  TO_OLD_STACK(heap)
 102
 103 //------------------------------------------------------------------------------
 104 // Macros to save the original IRQ vectors and masks, and to patch in new ones.
 105 //------------------------------------------------------------------------------
 106
 107 //#define  SAVE_IRQ_MASKS(dest)
 108 //#define  WRITE_IRQ_MASKS(src)
 109 //#define  SAVE_IRQ_VECTOR(value,dest)
 110 //#define  WRITE_IRQ_VECTOR(value,src)
 111
 112 //------------------------------------------------------------------------------
 113 // Macro to copy data from one far pointer to another.
 114 //------------------------------------------------------------------------------
 115
 116 #define  I2_MOVE_DATA(fpSource,fpDest,count) memmove(fpDest,fpSource,count);
 117
 118 //------------------------------------------------------------------------------
 119 // Macros to issue eoi's to host interrupt control (IBM AT 8259-style).
 120 //------------------------------------------------------------------------------
 121
 122 //#define MASTER_EOI
 123 //#define SLAVE_EOI
 124
 125 #endif   /* I2OS_H */
 126
 127