drivers/gpu/drm/nouveau/nvkm/engine/dma/user.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24 #include "user.h"
  25
  26 #include <core/client.h>
  27 #include <core/gpuobj.h>
  28 #include <subdev/fb.h>
  29 #include <subdev/instmem.h>
  30
  31 #include <nvif/class.h>
  32 #include <nvif/unpack.h>
  33
  34 static int
  35 nvkm_dmaobj_bind(struct nvkm_object *base, struct nvkm_gpuobj *gpuobj,
  36                  int align, struct nvkm_gpuobj **pgpuobj)
  37 {
  38         struct nvkm_dmaobj *dmaobj = nvkm_dmaobj(base);
  39         return dmaobj->func->bind(dmaobj, gpuobj, align, pgpuobj);
  40 }
  41
  42 static void *
  43 nvkm_dmaobj_dtor(struct nvkm_object *base)
  44 {
  45         struct nvkm_dmaobj *dmaobj = nvkm_dmaobj(base);
  46         if (!RB_EMPTY_NODE(&dmaobj->rb))
  47                 rb_erase(&dmaobj->rb, &dmaobj->object.client->dmaroot);
  48         return dmaobj;
  49 }
  50
  51 static const struct nvkm_object_func
  52 nvkm_dmaobj_func = {
  53         .dtor = nvkm_dmaobj_dtor,
  54         .bind = nvkm_dmaobj_bind,
  55 };
  56
  57 int
  58 nvkm_dmaobj_ctor(const struct nvkm_dmaobj_func *func, struct nvkm_dma *dma,
  59                  const struct nvkm_oclass *oclass, void **pdata, u32 *psize,
  60                  struct nvkm_dmaobj *dmaobj)
  61 {
  62         union {
  63                 struct nv_dma_v0 v0;
  64         } *args = *pdata;
  65         struct nvkm_device *device = dma->engine.subdev.device;
  66         struct nvkm_client *client = oclass->client;
  67         struct nvkm_object *parent = oclass->parent;
  68         struct nvkm_instmem *instmem = device->imem;
  69         struct nvkm_fb *fb = device->fb;
  70         void *data = *pdata;
  71         u32 size = *psize;
  72         int ret;
  73
  74         nvkm_object_ctor(&nvkm_dmaobj_func, oclass, &dmaobj->object);
  75         dmaobj->func = func;
  76         dmaobj->dma = dma;
  77         RB_CLEAR_NODE(&dmaobj->rb);
  78
  79         nvif_ioctl(parent, "create dma size %d\n", *psize);
  80         if (nvif_unpack(args->v0, 0, 0, true)) {
  81                 nvif_ioctl(parent, "create dma vers %d target %d access %d "
  82                                    "start %016llx limit %016llx\n",
  83                            args->v0.version, args->v0.target, args->v0.access,
  84                            args->v0.start, args->v0.limit);
  85                 dmaobj->target = args->v0.target;
  86                 dmaobj->access = args->v0.access;
  87                 dmaobj->start  = args->v0.start;
  88                 dmaobj->limit  = args->v0.limit;
  89         } else
  90                 return ret;
  91
  92         *pdata = data;
  93         *psize = size;
  94
  95         if (dmaobj->start > dmaobj->limit)
  96                 return -EINVAL;
  97
  98         switch (dmaobj->target) {
  99         case NV_DMA_V0_TARGET_VM:
 100                 dmaobj->target = NV_MEM_TARGET_VM;
 101                 break;
 102         case NV_DMA_V0_TARGET_VRAM:
 103                 if (!client->super) {
 104                         if (dmaobj->limit >= fb->ram->size - instmem->reserved)
 105                                 return -EACCES;
 106                         if (device->card_type >= NV_50)
 107                                 return -EACCES;
 108                 }
 109                 dmaobj->target = NV_MEM_TARGET_VRAM;
 110                 break;
 111         case NV_DMA_V0_TARGET_PCI:
 112                 if (!client->super)
 113                         return -EACCES;
 114                 dmaobj->target = NV_MEM_TARGET_PCI;
 115                 break;
 116         case NV_DMA_V0_TARGET_PCI_US:
 117         case NV_DMA_V0_TARGET_AGP:
 118                 if (!client->super)
 119                         return -EACCES;
 120                 dmaobj->target = NV_MEM_TARGET_PCI_NOSNOOP;
 121                 break;
 122         default:
 123                 return -EINVAL;
 124         }
 125
 126         switch (dmaobj->access) {
 127         case NV_DMA_V0_ACCESS_VM:
 128                 dmaobj->access = NV_MEM_ACCESS_VM;
 129                 break;
 130         case NV_DMA_V0_ACCESS_RD:
 131                 dmaobj->access = NV_MEM_ACCESS_RO;
 132                 break;
 133         case NV_DMA_V0_ACCESS_WR:
 134                 dmaobj->access = NV_MEM_ACCESS_WO;
 135                 break;
 136         case NV_DMA_V0_ACCESS_RDWR:
 137                 dmaobj->access = NV_MEM_ACCESS_RW;
 138                 break;
 139         default:
 140                 return -EINVAL;
 141         }
 142
 143         return ret;
 144 }