drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.h

   1 #ifndef __NV50_CLK_H__
   2 #define __NV50_CLK_H__
   3 #define nv50_clk(p) container_of((p), struct nv50_clk, base)
   4 #include "priv.h"
   5
   6 #include <subdev/bus/hwsq.h>
   7
   8 struct nv50_clk_hwsq {
   9         struct hwsq base;
  10         struct hwsq_reg r_fifo;
  11         struct hwsq_reg r_spll[2];
  12         struct hwsq_reg r_nvpll[2];
  13         struct hwsq_reg r_divs;
  14         struct hwsq_reg r_mast;
  15 };
  16
  17 struct nv50_clk {
  18         struct nvkm_clk base;
  19         struct nv50_clk_hwsq hwsq;
  20 };
  21
  22 int nv50_clk_new_(const struct nvkm_clk_func *, struct nvkm_device *, int,
  23                   bool, struct nvkm_clk **);
  24 int nv50_clk_read(struct nvkm_clk *, enum nv_clk_src);
  25 int nv50_clk_calc(struct nvkm_clk *, struct nvkm_cstate *);
  26 int nv50_clk_prog(struct nvkm_clk *);
  27 void nv50_clk_tidy(struct nvkm_clk *);
  28 #endif