2 * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
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8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
22 #define gk20a_volt(p) container_of((p), struct gk20a_volt, base)
25 #include <core/tegra.h>
37 struct nvkm_volt base
;
38 struct regulator
*vdd
;
41 const struct cvb_coef gk20a_cvb_coef
[] = {
42 /* MHz, c0, c1, c2, c3, c4, c5 */
43 /* 72 */ { 1209886, -36468, 515, 417, -13123, 203},
44 /* 108 */ { 1130804, -27659, 296, 298, -10834, 221},
45 /* 180 */ { 1162871, -27110, 247, 238, -10681, 268},
46 /* 252 */ { 1220458, -28654, 247, 179, -10376, 298},
47 /* 324 */ { 1280953, -30204, 247, 119, -9766, 304},
48 /* 396 */ { 1344547, -31777, 247, 119, -8545, 292},
49 /* 468 */ { 1420168, -34227, 269, 60, -7172, 256},
50 /* 540 */ { 1490757, -35955, 274, 60, -5188, 197},
51 /* 612 */ { 1599112, -42583, 398, 0, -1831, 119},
52 /* 648 */ { 1366986, -16459, -274, 0, -3204, 72},
53 /* 684 */ { 1391884, -17078, -274, -60, -1526, 30},
54 /* 708 */ { 1415522, -17497, -274, -60, -458, 0},
55 /* 756 */ { 1464061, -18331, -274, -119, 1831, -72},
56 /* 804 */ { 1524225, -20064, -254, -119, 4272, -155},
57 /* 852 */ { 1608418, -21643, -269, 0, 763, -48},
61 * cvb_mv = ((c2 * speedo / s_scale + c1) * speedo / s_scale + c0)
64 gk20a_volt_get_cvb_voltage(int speedo
, int s_scale
, const struct cvb_coef
*coef
)
68 mv
= DIV_ROUND_CLOSEST(coef
->c2
* speedo
, s_scale
);
69 mv
= DIV_ROUND_CLOSEST((mv
+ coef
->c1
) * speedo
, s_scale
) + coef
->c0
;
75 * ((c2 * speedo / s_scale + c1) * speedo / s_scale + c0) +
76 * ((c3 * speedo / s_scale + c4 + c5 * T / t_scale) * T / t_scale)
79 gk20a_volt_get_cvb_t_voltage(int speedo
, int temp
, int s_scale
, int t_scale
,
80 const struct cvb_coef
*coef
)
84 cvb_mv
= gk20a_volt_get_cvb_voltage(speedo
, s_scale
, coef
);
86 mv
= DIV_ROUND_CLOSEST(coef
->c3
* speedo
, s_scale
) + coef
->c4
+
87 DIV_ROUND_CLOSEST(coef
->c5
* temp
, t_scale
);
88 mv
= DIV_ROUND_CLOSEST(mv
* temp
, t_scale
) + cvb_mv
;
93 gk20a_volt_calc_voltage(const struct cvb_coef
*coef
, int speedo
)
97 mv
= gk20a_volt_get_cvb_t_voltage(speedo
, -10, 100, 10, coef
);
98 mv
= DIV_ROUND_UP(mv
, 1000);
104 gk20a_volt_vid_get(struct nvkm_volt
*base
)
106 struct gk20a_volt
*volt
= gk20a_volt(base
);
109 uv
= regulator_get_voltage(volt
->vdd
);
111 for (i
= 0; i
< volt
->base
.vid_nr
; i
++)
112 if (volt
->base
.vid
[i
].uv
>= uv
)
119 gk20a_volt_vid_set(struct nvkm_volt
*base
, u8 vid
)
121 struct gk20a_volt
*volt
= gk20a_volt(base
);
122 struct nvkm_subdev
*subdev
= &volt
->base
.subdev
;
124 nvkm_debug(subdev
, "set voltage as %duv\n", volt
->base
.vid
[vid
].uv
);
125 return regulator_set_voltage(volt
->vdd
, volt
->base
.vid
[vid
].uv
, 1200000);
129 gk20a_volt_set_id(struct nvkm_volt
*base
, u8 id
, int condition
)
131 struct gk20a_volt
*volt
= gk20a_volt(base
);
132 struct nvkm_subdev
*subdev
= &volt
->base
.subdev
;
133 int prev_uv
= regulator_get_voltage(volt
->vdd
);
134 int target_uv
= volt
->base
.vid
[id
].uv
;
137 nvkm_debug(subdev
, "prev=%d, target=%d, condition=%d\n",
138 prev_uv
, target_uv
, condition
);
140 (condition
< 0 && target_uv
< prev_uv
) ||
141 (condition
> 0 && target_uv
> prev_uv
)) {
142 ret
= gk20a_volt_vid_set(&volt
->base
, volt
->base
.vid
[id
].vid
);
150 static const struct nvkm_volt_func
152 .vid_get
= gk20a_volt_vid_get
,
153 .vid_set
= gk20a_volt_vid_set
,
154 .set_id
= gk20a_volt_set_id
,
158 gk20a_volt_new(struct nvkm_device
*device
, int index
, struct nvkm_volt
**pvolt
)
160 struct nvkm_device_tegra
*tdev
= device
->func
->tegra(device
);
161 struct gk20a_volt
*volt
;
164 if (!(volt
= kzalloc(sizeof(*volt
), GFP_KERNEL
)))
167 nvkm_volt_ctor(&gk20a_volt
, device
, index
, &volt
->base
);
168 *pvolt
= &volt
->base
;
170 uv
= regulator_get_voltage(tdev
->vdd
);
171 nvkm_info(&volt
->base
.subdev
, "The default voltage is %duV\n", uv
);
173 volt
->vdd
= tdev
->vdd
;
175 volt
->base
.vid_nr
= ARRAY_SIZE(gk20a_cvb_coef
);
176 nvkm_debug(&volt
->base
.subdev
, "%s - vid_nr = %d\n", __func__
,
178 for (i
= 0; i
< volt
->base
.vid_nr
; i
++) {
179 volt
->base
.vid
[i
].vid
= i
;
180 volt
->base
.vid
[i
].uv
=
181 gk20a_volt_calc_voltage(&gk20a_cvb_coef
[i
],
183 nvkm_debug(&volt
->base
.subdev
, "%2d: vid=%d, uv=%d\n", i
,
184 volt
->base
.vid
[i
].vid
, volt
->base
.vid
[i
].uv
);