2 * dice_stream.c - a part of driver for DICE based devices
4 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
5 * Copyright (c) 2014 Takashi Sakamoto <o-takashi@sakamocchi.jp>
7 * Licensed under the terms of the GNU General Public License, version 2.
12 #define CALLBACK_TIMEOUT 200
14 const unsigned int snd_dice_rates
[SND_DICE_RATES_COUNT
] = {
27 int snd_dice_stream_get_rate_mode(struct snd_dice
*dice
, unsigned int rate
,
32 for (i
= 0; i
< ARRAY_SIZE(snd_dice_rates
); i
++) {
33 if (!(dice
->clock_caps
& BIT(i
)))
35 if (snd_dice_rates
[i
] != rate
)
44 static void release_resources(struct snd_dice
*dice
,
45 struct fw_iso_resources
*resources
)
49 /* Reset channel number */
50 channel
= cpu_to_be32((u32
)-1);
51 if (resources
== &dice
->tx_resources
)
52 snd_dice_transaction_write_tx(dice
, TX_ISOCHRONOUS
,
55 snd_dice_transaction_write_rx(dice
, RX_ISOCHRONOUS
,
58 fw_iso_resources_free(resources
);
61 static int keep_resources(struct snd_dice
*dice
,
62 struct fw_iso_resources
*resources
,
63 unsigned int max_payload_bytes
)
68 err
= fw_iso_resources_allocate(resources
, max_payload_bytes
,
69 fw_parent_device(dice
->unit
)->max_speed
);
73 /* Set channel number */
74 channel
= cpu_to_be32(resources
->channel
);
75 if (resources
== &dice
->tx_resources
)
76 err
= snd_dice_transaction_write_tx(dice
, TX_ISOCHRONOUS
,
79 err
= snd_dice_transaction_write_rx(dice
, RX_ISOCHRONOUS
,
82 release_resources(dice
, resources
);
87 static void stop_stream(struct snd_dice
*dice
, struct amdtp_stream
*stream
)
89 amdtp_stream_pcm_abort(stream
);
90 amdtp_stream_stop(stream
);
92 if (stream
== &dice
->tx_stream
)
93 release_resources(dice
, &dice
->tx_resources
);
95 release_resources(dice
, &dice
->rx_resources
);
98 static int start_stream(struct snd_dice
*dice
, struct amdtp_stream
*stream
,
101 struct fw_iso_resources
*resources
;
102 unsigned int i
, mode
, pcm_chs
, midi_ports
;
105 err
= snd_dice_stream_get_rate_mode(dice
, rate
, &mode
);
108 if (stream
== &dice
->tx_stream
) {
109 resources
= &dice
->tx_resources
;
110 pcm_chs
= dice
->tx_channels
[mode
];
111 midi_ports
= dice
->tx_midi_ports
[mode
];
113 resources
= &dice
->rx_resources
;
114 pcm_chs
= dice
->rx_channels
[mode
];
115 midi_ports
= dice
->rx_midi_ports
[mode
];
119 * At 176.4/192.0 kHz, Dice has a quirk to transfer two PCM frames in
120 * one data block of AMDTP packet. Thus sampling transfer frequency is
121 * a half of PCM sampling frequency, i.e. PCM frames at 192.0 kHz are
122 * transferred on AMDTP packets at 96 kHz. Two successive samples of a
123 * channel are stored consecutively in the packet. This quirk is called
125 * For this quirk, blocking mode is required and PCM buffer size should
126 * be aligned to SYT_INTERVAL.
131 stream
->double_pcm_frames
= true;
133 stream
->double_pcm_frames
= false;
136 amdtp_stream_set_parameters(stream
, rate
, pcm_chs
, midi_ports
);
140 for (i
= 0; i
< pcm_chs
; i
++) {
141 stream
->pcm_positions
[i
] = i
* 2;
142 stream
->pcm_positions
[i
+ pcm_chs
] = i
* 2 + 1;
146 err
= keep_resources(dice
, resources
,
147 amdtp_stream_get_max_payload(stream
));
149 dev_err(&dice
->unit
->device
,
150 "fail to keep isochronous resources\n");
154 err
= amdtp_stream_start(stream
, resources
->channel
,
155 fw_parent_device(dice
->unit
)->max_speed
);
157 release_resources(dice
, resources
);
162 static int get_sync_mode(struct snd_dice
*dice
, enum cip_flags
*sync_mode
)
167 err
= snd_dice_transaction_get_clock_source(dice
, &source
);
172 /* So-called 'SYT Match' modes, sync_to_syt value of packets received */
173 case CLOCK_SOURCE_ARX4
: /* in 4th stream */
174 case CLOCK_SOURCE_ARX3
: /* in 3rd stream */
175 case CLOCK_SOURCE_ARX2
: /* in 2nd stream */
178 case CLOCK_SOURCE_ARX1
: /* in 1st stream, which this driver uses */
182 *sync_mode
= CIP_SYNC_TO_DEVICE
;
189 int snd_dice_stream_start_duplex(struct snd_dice
*dice
, unsigned int rate
)
191 struct amdtp_stream
*master
, *slave
;
192 unsigned int curr_rate
;
193 enum cip_flags sync_mode
;
196 if (dice
->substreams_counter
== 0)
199 err
= get_sync_mode(dice
, &sync_mode
);
202 if (sync_mode
== CIP_SYNC_TO_DEVICE
) {
203 master
= &dice
->tx_stream
;
204 slave
= &dice
->rx_stream
;
206 master
= &dice
->rx_stream
;
207 slave
= &dice
->tx_stream
;
210 /* Some packet queueing errors. */
211 if (amdtp_streaming_error(master
) || amdtp_streaming_error(slave
))
212 stop_stream(dice
, master
);
214 /* Stop stream if rate is different. */
215 err
= snd_dice_transaction_get_rate(dice
, &curr_rate
);
217 dev_err(&dice
->unit
->device
,
218 "fail to get sampling rate\n");
223 if (rate
!= curr_rate
)
224 stop_stream(dice
, master
);
226 if (!amdtp_stream_running(master
)) {
227 stop_stream(dice
, slave
);
228 snd_dice_transaction_clear_enable(dice
);
230 amdtp_stream_set_sync(sync_mode
, master
, slave
);
232 err
= snd_dice_transaction_set_rate(dice
, rate
);
234 dev_err(&dice
->unit
->device
,
235 "fail to set sampling rate\n");
239 /* Start both streams. */
240 err
= start_stream(dice
, master
, rate
);
242 dev_err(&dice
->unit
->device
,
243 "fail to start AMDTP master stream\n");
246 err
= start_stream(dice
, slave
, rate
);
248 dev_err(&dice
->unit
->device
,
249 "fail to start AMDTP slave stream\n");
250 stop_stream(dice
, master
);
253 err
= snd_dice_transaction_set_enable(dice
);
255 dev_err(&dice
->unit
->device
,
256 "fail to enable interface\n");
257 stop_stream(dice
, master
);
258 stop_stream(dice
, slave
);
262 /* Wait first callbacks */
263 if (!amdtp_stream_wait_callback(master
, CALLBACK_TIMEOUT
) ||
264 !amdtp_stream_wait_callback(slave
, CALLBACK_TIMEOUT
)) {
265 snd_dice_transaction_clear_enable(dice
);
266 stop_stream(dice
, master
);
267 stop_stream(dice
, slave
);
275 void snd_dice_stream_stop_duplex(struct snd_dice
*dice
)
277 if (dice
->substreams_counter
> 0)
280 snd_dice_transaction_clear_enable(dice
);
282 stop_stream(dice
, &dice
->tx_stream
);
283 stop_stream(dice
, &dice
->rx_stream
);
286 static int init_stream(struct snd_dice
*dice
, struct amdtp_stream
*stream
)
289 struct fw_iso_resources
*resources
;
290 enum amdtp_stream_direction dir
;
292 if (stream
== &dice
->tx_stream
) {
293 resources
= &dice
->tx_resources
;
294 dir
= AMDTP_IN_STREAM
;
296 resources
= &dice
->rx_resources
;
297 dir
= AMDTP_OUT_STREAM
;
300 err
= fw_iso_resources_init(resources
, dice
->unit
);
303 resources
->channels_mask
= 0x00000000ffffffffuLL
;
305 err
= amdtp_stream_init(stream
, dice
->unit
, dir
, CIP_BLOCKING
);
307 amdtp_stream_destroy(stream
);
308 fw_iso_resources_destroy(resources
);
315 * This function should be called before starting streams or after stopping
318 static void destroy_stream(struct snd_dice
*dice
, struct amdtp_stream
*stream
)
320 struct fw_iso_resources
*resources
;
322 if (stream
== &dice
->tx_stream
)
323 resources
= &dice
->tx_resources
;
325 resources
= &dice
->rx_resources
;
327 amdtp_stream_destroy(stream
);
328 fw_iso_resources_destroy(resources
);
331 int snd_dice_stream_init_duplex(struct snd_dice
*dice
)
335 dice
->substreams_counter
= 0;
337 err
= init_stream(dice
, &dice
->tx_stream
);
341 err
= init_stream(dice
, &dice
->rx_stream
);
343 destroy_stream(dice
, &dice
->tx_stream
);
348 void snd_dice_stream_destroy_duplex(struct snd_dice
*dice
)
350 snd_dice_transaction_clear_enable(dice
);
352 destroy_stream(dice
, &dice
->tx_stream
);
353 destroy_stream(dice
, &dice
->rx_stream
);
355 dice
->substreams_counter
= 0;
358 void snd_dice_stream_update_duplex(struct snd_dice
*dice
)
361 * On a bus reset, the DICE firmware disables streaming and then goes
362 * off contemplating its own navel for hundreds of milliseconds before
363 * it can react to any of our attempts to reenable streaming. This
364 * means that we lose synchronization anyway, so we force our streams
365 * to stop so that the application can restart them in an orderly
368 dice
->global_enabled
= false;
370 stop_stream(dice
, &dice
->rx_stream
);
371 stop_stream(dice
, &dice
->tx_stream
);
373 fw_iso_resources_update(&dice
->rx_resources
);
374 fw_iso_resources_update(&dice
->tx_resources
);
377 static void dice_lock_changed(struct snd_dice
*dice
)
379 dice
->dev_lock_changed
= true;
380 wake_up(&dice
->hwdep_wait
);
383 int snd_dice_stream_lock_try(struct snd_dice
*dice
)
387 spin_lock_irq(&dice
->lock
);
389 if (dice
->dev_lock_count
< 0) {
394 if (dice
->dev_lock_count
++ == 0)
395 dice_lock_changed(dice
);
398 spin_unlock_irq(&dice
->lock
);
402 void snd_dice_stream_lock_release(struct snd_dice
*dice
)
404 spin_lock_irq(&dice
->lock
);
406 if (WARN_ON(dice
->dev_lock_count
<= 0))
409 if (--dice
->dev_lock_count
== 0)
410 dice_lock_changed(dice
);
412 spin_unlock_irq(&dice
->lock
);