arch/riscv/kernel/cpu.c

   1 /*
   2  * Copyright (C) 2012 Regents of the University of California
   3  *
   4  *   This program is free software; you can redistribute it and/or
   5  *   modify it under the terms of the GNU General Public License
   6  *   as published by the Free Software Foundation, version 2.
   7  *
   8  *   This program is distributed in the hope that it will be useful,
   9  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  *   GNU General Public License for more details.
  12  */
  13
  14 #include <linux/init.h>
  15 #include <linux/seq_file.h>
  16 #include <linux/of.h>
  17 #include <asm/smp.h>
  18
  19 /*
  20  * Returns the hart ID of the given device tree node, or -1 if the device tree
  21  * node isn't a RISC-V hart.
  22  */
  23 int riscv_of_processor_hartid(struct device_node *node)
  24 {
  25         const char *isa, *status;
  26         u32 hart;
  27
  28         if (!of_device_is_compatible(node, "riscv")) {
  29                 pr_warn("Found incompatible CPU\n");
  30                 return -(ENODEV);
  31         }
  32
  33         if (of_property_read_u32(node, "reg", &hart)) {
  34                 pr_warn("Found CPU without hart ID\n");
  35                 return -(ENODEV);
  36         }
  37         if (hart >= NR_CPUS) {
  38                 pr_info("Found hart ID %d, which is above NR_CPUs.  Disabling this hart\n", hart);
  39                 return -(ENODEV);
  40         }
  41
  42         if (of_property_read_string(node, "status", &status)) {
  43                 pr_warn("CPU with hartid=%d has no \"status\" property\n", hart);
  44                 return -(ENODEV);
  45         }
  46         if (strcmp(status, "okay")) {
  47                 pr_info("CPU with hartid=%d has a non-okay status of \"%s\"\n", hart, status);
  48                 return -(ENODEV);
  49         }
  50
  51         if (of_property_read_string(node, "riscv,isa", &isa)) {
  52                 pr_warn("CPU with hartid=%d has no \"riscv,isa\" property\n", hart);
  53                 return -(ENODEV);
  54         }
  55         if (isa[0] != 'r' || isa[1] != 'v') {
  56                 pr_warn("CPU with hartid=%d has an invalid ISA of \"%s\"\n", hart, isa);
  57                 return -(ENODEV);
  58         }
  59
  60         return hart;
  61 }
  62
  63 #ifdef CONFIG_PROC_FS
  64
  65 static void print_isa(struct seq_file *f, const char *orig_isa)
  66 {
  67         static const char *ext = "mafdc";
  68         const char *isa = orig_isa;
  69         const char *e;
  70
  71         /*
  72          * Linux doesn't support rv32e or rv128i, and we only support booting
  73          * kernels on harts with the same ISA that the kernel is compiled for.
  74          */
  75 #if defined(CONFIG_32BIT)
  76         if (strncmp(isa, "rv32i", 5) != 0)
  77                 return;
  78 #elif defined(CONFIG_64BIT)
  79         if (strncmp(isa, "rv64i", 5) != 0)
  80                 return;
  81 #endif
  82
  83         /* Print the base ISA, as we already know it's legal. */
  84         seq_puts(f, "isa\t\t: ");
  85         seq_write(f, isa, 5);
  86         isa += 5;
  87
  88         /*
  89          * Check the rest of the ISA string for valid extensions, printing those
  90          * we find.  RISC-V ISA strings define an order, so we only print the
  91          * extension bits when they're in order.
  92          */
  93         for (e = ext; *e != '\0'; ++e) {
  94                 if (isa[0] == e[0]) {
  95                         seq_write(f, isa, 1);
  96                         isa++;
  97                 }
  98         }
  99         seq_puts(f, "\n");
 100
 101         /*
 102          * If we were given an unsupported ISA in the device tree then print
 103          * a bit of info describing what went wrong.
 104          */
 105         if (isa[0] != '\0')
 106                 pr_info("unsupported ISA \"%s\" in device tree", orig_isa);
 107 }
 108
 109 static void print_mmu(struct seq_file *f, const char *mmu_type)
 110 {
 111 #if defined(CONFIG_32BIT)
 112         if (strcmp(mmu_type, "riscv,sv32") != 0)
 113                 return;
 114 #elif defined(CONFIG_64BIT)
 115         if (strcmp(mmu_type, "riscv,sv39") != 0 &&
 116             strcmp(mmu_type, "riscv,sv48") != 0)
 117                 return;
 118 #endif
 119
 120         seq_printf(f, "mmu\t\t: %s\n", mmu_type+6);
 121 }
 122
 123 static void *c_start(struct seq_file *m, loff_t *pos)
 124 {
 125         *pos = cpumask_next(*pos - 1, cpu_online_mask);
 126         if ((*pos) < nr_cpu_ids)
 127                 return (void *)(uintptr_t)(1 + *pos);
 128         return NULL;
 129 }
 130
 131 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
 132 {
 133         (*pos)++;
 134         return c_start(m, pos);
 135 }
 136
 137 static void c_stop(struct seq_file *m, void *v)
 138 {
 139 }
 140
 141 static int c_show(struct seq_file *m, void *v)
 142 {
 143         unsigned long cpu_id = (unsigned long)v - 1;
 144         struct device_node *node = of_get_cpu_node(cpuid_to_hartid_map(cpu_id),
 145                                                    NULL);
 146         const char *compat, *isa, *mmu;
 147
 148         seq_printf(m, "processor\t: %lu\n", cpu_id);
 149         seq_printf(m, "hart\t\t: %lu\n", cpuid_to_hartid_map(cpu_id));
 150         if (!of_property_read_string(node, "riscv,isa", &isa))
 151                 print_isa(m, isa);
 152         if (!of_property_read_string(node, "mmu-type", &mmu))
 153                 print_mmu(m, mmu);
 154         if (!of_property_read_string(node, "compatible", &compat)
 155             && strcmp(compat, "riscv"))
 156                 seq_printf(m, "uarch\t\t: %s\n", compat);
 157         seq_puts(m, "\n");
 158
 159         return 0;
 160 }
 161
 162 const struct seq_operations cpuinfo_op = {
 163         .start  = c_start,
 164         .next   = c_next,
 165         .stop   = c_stop,
 166         .show   = c_show
 167 };
 168
 169 #endif /* CONFIG_PROC_FS */