2 * Copyright (C) 2012 Regents of the University of California
3 * Copyright (C) 2014 Darius Rad <darius@bluespec.com>
4 * Copyright (C) 2017 SiFive
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation, version 2.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <linux/syscalls.h>
17 #include <asm/unistd.h>
18 #include <asm/cacheflush.h>
20 static long riscv_sys_mmap(unsigned long addr
, unsigned long len
,
21 unsigned long prot
, unsigned long flags
,
22 unsigned long fd
, off_t offset
,
23 unsigned long page_shift_offset
)
25 if (unlikely(offset
& (~PAGE_MASK
>> page_shift_offset
)))
27 return ksys_mmap_pgoff(addr
, len
, prot
, flags
, fd
,
28 offset
>> (PAGE_SHIFT
- page_shift_offset
));
32 SYSCALL_DEFINE6(mmap
, unsigned long, addr
, unsigned long, len
,
33 unsigned long, prot
, unsigned long, flags
,
34 unsigned long, fd
, off_t
, offset
)
36 return riscv_sys_mmap(addr
, len
, prot
, flags
, fd
, offset
, 0);
39 SYSCALL_DEFINE6(mmap2
, unsigned long, addr
, unsigned long, len
,
40 unsigned long, prot
, unsigned long, flags
,
41 unsigned long, fd
, off_t
, offset
)
44 * Note that the shift for mmap2 is constant (12),
45 * regardless of PAGE_SIZE
47 return riscv_sys_mmap(addr
, len
, prot
, flags
, fd
, offset
, 12);
49 #endif /* !CONFIG_64BIT */
52 * Allows the instruction cache to be flushed from userspace. Despite RISC-V
53 * having a direct 'fence.i' instruction available to userspace (which we
54 * can't trap!), that's not actually viable when running on Linux because the
55 * kernel might schedule a process on another hart. There is no way for
56 * userspace to handle this without invoking the kernel (as it doesn't know the
57 * thread->hart mappings), so we've defined a RISC-V specific system call to
58 * flush the instruction cache.
60 * sys_riscv_flush_icache() is defined to flush the instruction cache over an
61 * address range, with the flush applying to either all threads or just the
62 * caller. We don't currently do anything with the address range, that's just
63 * in there for forwards compatibility.
65 SYSCALL_DEFINE3(riscv_flush_icache
, uintptr_t, start
, uintptr_t, end
,
68 /* Check the reserved flags. */
69 if (unlikely(flags
& ~SYS_RISCV_FLUSH_ICACHE_ALL
))
72 flush_icache_mm(current
->mm
, flags
& SYS_RISCV_FLUSH_ICACHE_LOCAL
);