arch/sh/boards/board-sh7785lcr.c

   1 /*
   2  * Renesas Technology Corp. R0P7785LC0011RL Support.
   3  *
   4  * Copyright (C) 2008  Yoshihiro Shimoda
   5  * Copyright (C) 2009  Paul Mundt
   6  *
   7  * This file is subject to the terms and conditions of the GNU General Public
   8  * License.  See the file "COPYING" in the main directory of this archive
   9  * for more details.
  10  */
  11 #include <linux/init.h>
  12 #include <linux/platform_device.h>
  13 #include <linux/sm501.h>
  14 #include <linux/sm501-regs.h>
  15 #include <linux/fb.h>
  16 #include <linux/mtd/physmap.h>
  17 #include <linux/delay.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/i2c.h>
  20 #include <linux/platform_data/i2c-pca-platform.h>
  21 #include <linux/i2c-algo-pca.h>
  22 #include <linux/usb/r8a66597.h>
  23 #include <linux/sh_intc.h>
  24 #include <linux/irq.h>
  25 #include <linux/io.h>
  26 #include <linux/clk.h>
  27 #include <linux/errno.h>
  28 #include <linux/gpio/machine.h>
  29 #include <mach/sh7785lcr.h>
  30 #include <cpu/sh7785.h>
  31 #include <asm/heartbeat.h>
  32 #include <asm/clock.h>
  33 #include <asm/bl_bit.h>
  34
  35 /*
  36  * NOTE: This board has 2 physical memory maps.
  37  *       Please look at include/asm-sh/sh7785lcr.h or hardware manual.
  38  */
  39 static struct resource heartbeat_resource = {
  40         .start  = PLD_LEDCR,
  41         .end    = PLD_LEDCR,
  42         .flags  = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
  43 };
  44
  45 static struct platform_device heartbeat_device = {
  46         .name           = "heartbeat",
  47         .id             = -1,
  48         .num_resources  = 1,
  49         .resource       = &heartbeat_resource,
  50 };
  51
  52 static struct mtd_partition nor_flash_partitions[] = {
  53         {
  54                 .name           = "loader",
  55                 .offset         = 0x00000000,
  56                 .size           = 512 * 1024,
  57         },
  58         {
  59                 .name           = "bootenv",
  60                 .offset         = MTDPART_OFS_APPEND,
  61                 .size           = 512 * 1024,
  62         },
  63         {
  64                 .name           = "kernel",
  65                 .offset         = MTDPART_OFS_APPEND,
  66                 .size           = 4 * 1024 * 1024,
  67         },
  68         {
  69                 .name           = "data",
  70                 .offset         = MTDPART_OFS_APPEND,
  71                 .size           = MTDPART_SIZ_FULL,
  72         },
  73 };
  74
  75 static struct physmap_flash_data nor_flash_data = {
  76         .width          = 4,
  77         .parts          = nor_flash_partitions,
  78         .nr_parts       = ARRAY_SIZE(nor_flash_partitions),
  79 };
  80
  81 static struct resource nor_flash_resources[] = {
  82         [0]     = {
  83                 .start  = NOR_FLASH_ADDR,
  84                 .end    = NOR_FLASH_ADDR + NOR_FLASH_SIZE - 1,
  85                 .flags  = IORESOURCE_MEM,
  86         }
  87 };
  88
  89 static struct platform_device nor_flash_device = {
  90         .name           = "physmap-flash",
  91         .dev            = {
  92                 .platform_data  = &nor_flash_data,
  93         },
  94         .num_resources  = ARRAY_SIZE(nor_flash_resources),
  95         .resource       = nor_flash_resources,
  96 };
  97
  98 static struct r8a66597_platdata r8a66597_data = {
  99         .xtal = R8A66597_PLATDATA_XTAL_12MHZ,
 100         .vif = 1,
 101 };
 102
 103 static struct resource r8a66597_usb_host_resources[] = {
 104         [0] = {
 105                 .start  = R8A66597_ADDR,
 106                 .end    = R8A66597_ADDR + R8A66597_SIZE - 1,
 107                 .flags  = IORESOURCE_MEM,
 108         },
 109         [1] = {
 110                 .start  = evt2irq(0x240),
 111                 .end    = evt2irq(0x240),
 112                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
 113         },
 114 };
 115
 116 static struct platform_device r8a66597_usb_host_device = {
 117         .name           = "r8a66597_hcd",
 118         .id             = -1,
 119         .dev = {
 120                 .dma_mask               = NULL,
 121                 .coherent_dma_mask      = 0xffffffff,
 122                 .platform_data          = &r8a66597_data,
 123         },
 124         .num_resources  = ARRAY_SIZE(r8a66597_usb_host_resources),
 125         .resource       = r8a66597_usb_host_resources,
 126 };
 127
 128 static struct resource sm501_resources[] = {
 129         [0]     = {
 130                 .start  = SM107_MEM_ADDR,
 131                 .end    = SM107_MEM_ADDR + SM107_MEM_SIZE - 1,
 132                 .flags  = IORESOURCE_MEM,
 133         },
 134         [1]     = {
 135                 .start  = SM107_REG_ADDR,
 136                 .end    = SM107_REG_ADDR + SM107_REG_SIZE - 1,
 137                 .flags  = IORESOURCE_MEM,
 138         },
 139         [2]     = {
 140                 .start  = evt2irq(0x340),
 141                 .flags  = IORESOURCE_IRQ,
 142         },
 143 };
 144
 145 static struct fb_videomode sm501_default_mode_crt = {
 146         .pixclock       = 35714,        /* 28MHz */
 147         .xres           = 640,
 148         .yres           = 480,
 149         .left_margin    = 105,
 150         .right_margin   = 16,
 151         .upper_margin   = 33,
 152         .lower_margin   = 10,
 153         .hsync_len      = 39,
 154         .vsync_len      = 2,
 155         .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 156 };
 157
 158 static struct fb_videomode sm501_default_mode_pnl = {
 159         .pixclock       = 40000,        /* 25MHz */
 160         .xres           = 640,
 161         .yres           = 480,
 162         .left_margin    = 2,
 163         .right_margin   = 16,
 164         .upper_margin   = 33,
 165         .lower_margin   = 10,
 166         .hsync_len      = 39,
 167         .vsync_len      = 2,
 168         .sync           = 0,
 169 };
 170
 171 static struct sm501_platdata_fbsub sm501_pdata_fbsub_pnl = {
 172         .def_bpp        = 16,
 173         .def_mode       = &sm501_default_mode_pnl,
 174         .flags          = SM501FB_FLAG_USE_INIT_MODE |
 175                           SM501FB_FLAG_USE_HWCURSOR |
 176                           SM501FB_FLAG_USE_HWACCEL |
 177                           SM501FB_FLAG_DISABLE_AT_EXIT |
 178                           SM501FB_FLAG_PANEL_NO_VBIASEN,
 179 };
 180
 181 static struct sm501_platdata_fbsub sm501_pdata_fbsub_crt = {
 182         .def_bpp        = 16,
 183         .def_mode       = &sm501_default_mode_crt,
 184         .flags          = SM501FB_FLAG_USE_INIT_MODE |
 185                           SM501FB_FLAG_USE_HWCURSOR |
 186                           SM501FB_FLAG_USE_HWACCEL |
 187                           SM501FB_FLAG_DISABLE_AT_EXIT,
 188 };
 189
 190 static struct sm501_platdata_fb sm501_fb_pdata = {
 191         .fb_route       = SM501_FB_OWN,
 192         .fb_crt         = &sm501_pdata_fbsub_crt,
 193         .fb_pnl         = &sm501_pdata_fbsub_pnl,
 194 };
 195
 196 static struct sm501_initdata sm501_initdata = {
 197         .gpio_high      = {
 198                 .set    = 0x00001fe0,
 199                 .mask   = 0x0,
 200         },
 201         .devices        = 0,
 202         .mclk           = 84 * 1000000,
 203         .m1xclk         = 112 * 1000000,
 204 };
 205
 206 static struct sm501_platdata sm501_platform_data = {
 207         .init           = &sm501_initdata,
 208         .fb             = &sm501_fb_pdata,
 209 };
 210
 211 static struct platform_device sm501_device = {
 212         .name           = "sm501",
 213         .id             = -1,
 214         .dev            = {
 215                 .platform_data  = &sm501_platform_data,
 216         },
 217         .num_resources  = ARRAY_SIZE(sm501_resources),
 218         .resource       = sm501_resources,
 219 };
 220
 221 static struct resource i2c_proto_resources[] = {
 222         [0] = {
 223                 .start  = PCA9564_PROTO_32BIT_ADDR,
 224                 .end    = PCA9564_PROTO_32BIT_ADDR + PCA9564_SIZE - 1,
 225                 .flags  = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
 226         },
 227         [1] = {
 228                 .start  = evt2irq(0x380),
 229                 .end    = evt2irq(0x380),
 230                 .flags  = IORESOURCE_IRQ,
 231         },
 232 };
 233
 234 static struct resource i2c_resources[] = {
 235         [0] = {
 236                 .start  = PCA9564_ADDR,
 237                 .end    = PCA9564_ADDR + PCA9564_SIZE - 1,
 238                 .flags  = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
 239         },
 240         [1] = {
 241                 .start  = evt2irq(0x380),
 242                 .end    = evt2irq(0x380),
 243                 .flags  = IORESOURCE_IRQ,
 244         },
 245 };
 246
 247 static struct gpiod_lookup_table i2c_gpio_table = {
 248         .dev_id = "i2c.0",
 249         .table = {
 250                 GPIO_LOOKUP("pfc-sh7757", 0, "reset-gpios", GPIO_ACTIVE_LOW),
 251                 { },
 252         },
 253 };
 254
 255 static struct i2c_pca9564_pf_platform_data i2c_platform_data = {
 256         .i2c_clock_speed        = I2C_PCA_CON_330kHz,
 257         .timeout                = HZ,
 258 };
 259
 260 static struct platform_device i2c_device = {
 261         .name           = "i2c-pca-platform",
 262         .id             = -1,
 263         .dev            = {
 264                 .platform_data  = &i2c_platform_data,
 265         },
 266         .num_resources  = ARRAY_SIZE(i2c_resources),
 267         .resource       = i2c_resources,
 268 };
 269
 270 static struct platform_device *sh7785lcr_devices[] __initdata = {
 271         &heartbeat_device,
 272         &nor_flash_device,
 273         &r8a66597_usb_host_device,
 274         &sm501_device,
 275         &i2c_device,
 276 };
 277
 278 static struct i2c_board_info __initdata sh7785lcr_i2c_devices[] = {
 279         {
 280                 I2C_BOARD_INFO("r2025sd", 0x32),
 281         },
 282 };
 283
 284 static int __init sh7785lcr_devices_setup(void)
 285 {
 286         i2c_register_board_info(0, sh7785lcr_i2c_devices,
 287                                 ARRAY_SIZE(sh7785lcr_i2c_devices));
 288
 289         if (mach_is_sh7785lcr_pt()) {
 290                 i2c_device.resource = i2c_proto_resources;
 291                 i2c_device.num_resources = ARRAY_SIZE(i2c_proto_resources);
 292         }
 293
 294         gpiod_add_lookup_table(&i2c_gpio_table);
 295         return platform_add_devices(sh7785lcr_devices,
 296                                     ARRAY_SIZE(sh7785lcr_devices));
 297 }
 298 device_initcall(sh7785lcr_devices_setup);
 299
 300 /* Initialize IRQ setting */
 301 void __init init_sh7785lcr_IRQ(void)
 302 {
 303         plat_irq_setup_pins(IRQ_MODE_IRQ7654);
 304         plat_irq_setup_pins(IRQ_MODE_IRQ3210);
 305 }
 306
 307 static int sh7785lcr_clk_init(void)
 308 {
 309         struct clk *clk;
 310         int ret;
 311
 312         clk = clk_get(NULL, "extal");
 313         if (IS_ERR(clk))
 314                 return PTR_ERR(clk);
 315         ret = clk_set_rate(clk, 33333333);
 316         clk_put(clk);
 317
 318         return ret;
 319 }
 320
 321 static void sh7785lcr_power_off(void)
 322 {
 323         unsigned char *p;
 324
 325         p = ioremap(PLD_POFCR, PLD_POFCR + 1);
 326         if (!p) {
 327                 printk(KERN_ERR "%s: ioremap error.\n", __func__);
 328                 return;
 329         }
 330         *p = 0x01;
 331         iounmap(p);
 332         set_bl_bit();
 333         while (1)
 334                 cpu_relax();
 335 }
 336
 337 /* Initialize the board */
 338 static void __init sh7785lcr_setup(char **cmdline_p)
 339 {
 340         void __iomem *sm501_reg;
 341
 342         printk(KERN_INFO "Renesas Technology Corp. R0P7785LC0011RL support.\n");
 343
 344         pm_power_off = sh7785lcr_power_off;
 345
 346         /* sm501 DRAM configuration */
 347         sm501_reg = ioremap_nocache(SM107_REG_ADDR, SM501_DRAM_CONTROL);
 348         if (!sm501_reg) {
 349                 printk(KERN_ERR "%s: ioremap error.\n", __func__);
 350                 return;
 351         }
 352
 353         writel(0x000307c2, sm501_reg + SM501_DRAM_CONTROL);
 354         iounmap(sm501_reg);
 355 }
 356
 357 /* Return the board specific boot mode pin configuration */
 358 static int sh7785lcr_mode_pins(void)
 359 {
 360         int value = 0;
 361
 362         /* These are the factory default settings of S1 and S2.
 363          * If you change these dip switches then you will need to
 364          * adjust the values below as well.
 365          */
 366         value |= MODE_PIN4; /* Clock Mode 16 */
 367         value |= MODE_PIN5; /* 32-bit Area0 bus width */
 368         value |= MODE_PIN6; /* 32-bit Area0 bus width */
 369         value |= MODE_PIN7; /* Area 0 SRAM interface [fixed] */
 370         value |= MODE_PIN8; /* Little Endian */
 371         value |= MODE_PIN9; /* Master Mode */
 372         value |= MODE_PIN14; /* No PLL step-up */
 373
 374         return value;
 375 }
 376
 377 /*
 378  * The Machine Vector
 379  */
 380 static struct sh_machine_vector mv_sh7785lcr __initmv = {
 381         .mv_name                = "SH7785LCR",
 382         .mv_setup               = sh7785lcr_setup,
 383         .mv_clk_init            = sh7785lcr_clk_init,
 384         .mv_init_irq            = init_sh7785lcr_IRQ,
 385         .mv_mode_pins           = sh7785lcr_mode_pins,
 386 };
 387