1 // SPDX-License-Identifier: GPL-2.0
2 #include <asm/paravirt.h>
4 #ifdef CONFIG_PARAVIRT_XXL
5 DEF_NATIVE(irq
, irq_disable
, "cli");
6 DEF_NATIVE(irq
, irq_enable
, "sti");
7 DEF_NATIVE(irq
, restore_fl
, "push %eax; popf");
8 DEF_NATIVE(irq
, save_fl
, "pushf; pop %eax");
9 DEF_NATIVE(cpu
, iret
, "iret");
10 DEF_NATIVE(mmu
, read_cr2
, "mov %cr2, %eax");
11 DEF_NATIVE(mmu
, write_cr3
, "mov %eax, %cr3");
12 DEF_NATIVE(mmu
, read_cr3
, "mov %cr3, %eax");
15 #if defined(CONFIG_PARAVIRT_SPINLOCKS)
16 DEF_NATIVE(lock
, queued_spin_unlock
, "movb $0, (%eax)");
17 DEF_NATIVE(lock
, vcpu_is_preempted
, "xor %eax, %eax");
20 unsigned paravirt_patch_ident_32(void *insnbuf
, unsigned len
)
22 /* arg in %eax, return in %eax */
26 unsigned paravirt_patch_ident_64(void *insnbuf
, unsigned len
)
28 /* arg in %edx:%eax, return in %edx:%eax */
32 extern bool pv_is_native_spin_unlock(void);
33 extern bool pv_is_native_vcpu_is_preempted(void);
35 unsigned native_patch(u8 type
, void *ibuf
, unsigned long addr
, unsigned len
)
37 #define PATCH_SITE(ops, x) \
38 case PARAVIRT_PATCH(ops.x): \
39 return paravirt_patch_insns(ibuf, len, start_##ops##_##x, end_##ops##_##x)
42 #ifdef CONFIG_PARAVIRT_XXL
43 PATCH_SITE(irq
, irq_disable
);
44 PATCH_SITE(irq
, irq_enable
);
45 PATCH_SITE(irq
, restore_fl
);
46 PATCH_SITE(irq
, save_fl
);
47 PATCH_SITE(cpu
, iret
);
48 PATCH_SITE(mmu
, read_cr2
);
49 PATCH_SITE(mmu
, read_cr3
);
50 PATCH_SITE(mmu
, write_cr3
);
52 #if defined(CONFIG_PARAVIRT_SPINLOCKS)
53 case PARAVIRT_PATCH(lock
.queued_spin_unlock
):
54 if (pv_is_native_spin_unlock())
55 return paravirt_patch_insns(ibuf
, len
,
56 start_lock_queued_spin_unlock
,
57 end_lock_queued_spin_unlock
);
60 case PARAVIRT_PATCH(lock
.vcpu_is_preempted
):
61 if (pv_is_native_vcpu_is_preempted())
62 return paravirt_patch_insns(ibuf
, len
,
63 start_lock_vcpu_is_preempted
,
64 end_lock_vcpu_is_preempted
);
72 return paravirt_patch_default(type
, ibuf
, addr
, len
);