1 /* SPDX-License-Identifier: GPL-2.0 */
3 * ld script for the x86 kernel
5 * Historic 32-bit version written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>
7 * Modernisation, unification and other changes and fixes:
8 * Copyright (C) 2007-2009 Sam Ravnborg <sam@ravnborg.org>
11 * Don't define absolute symbols until and unless you know that symbol
12 * value is should remain constant even if kernel image is relocated
13 * at run time. Absolute symbols are not relocated. If symbol value should
14 * change if kernel is relocated, make the symbol section relative and
15 * put it inside the section definition.
19 #define LOAD_OFFSET __PAGE_OFFSET
21 #define LOAD_OFFSET __START_KERNEL_map
24 #include <asm-generic/vmlinux.lds.h>
25 #include <asm/asm-offsets.h>
26 #include <asm/thread_info.h>
27 #include <asm/page_types.h>
28 #include <asm/orc_lookup.h>
29 #include <asm/cache.h>
32 #undef i386 /* in case the preprocessor is a 32bit one */
34 OUTPUT_FORMAT(CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT)
38 ENTRY(phys_startup_32)
41 OUTPUT_ARCH(i386:x86-64)
42 ENTRY(phys_startup_64)
46 #if defined(CONFIG_X86_64)
48 * On 64-bit, align RODATA to 2MB so we retain large page mappings for
49 * boundaries spanning kernel text, rodata and data sections.
51 * However, kernel identity mappings will have different RWX permissions
52 * to the pages mapping to text and to the pages padding (which are freed) the
53 * text section. Hence kernel identity mappings will be broken to smaller
54 * pages. For 64-bit, kernel text and kernel identity mappings are different,
55 * so we can enable protection checks as well as retain 2MB large page
56 * mappings for kernel text.
58 #define X86_ALIGN_RODATA_BEGIN . = ALIGN(HPAGE_SIZE);
60 #define X86_ALIGN_RODATA_END \
61 . = ALIGN(HPAGE_SIZE); \
62 __end_rodata_hpage_align = .; \
63 __end_rodata_aligned = .;
65 #define ALIGN_ENTRY_TEXT_BEGIN . = ALIGN(PMD_SIZE);
66 #define ALIGN_ENTRY_TEXT_END . = ALIGN(PMD_SIZE);
69 * This section contains data which will be mapped as decrypted. Memory
70 * encryption operates on a page basis. Make this section PMD-aligned
71 * to avoid splitting the pages while mapping the section early.
73 * Note: We use a separate section so that only this section gets
74 * decrypted to avoid exposing more than we wish.
76 #define BSS_DECRYPTED \
77 . = ALIGN(PMD_SIZE); \
78 __start_bss_decrypted = .; \
80 . = ALIGN(PAGE_SIZE); \
81 __start_bss_decrypted_unused = .; \
82 . = ALIGN(PMD_SIZE); \
83 __end_bss_decrypted = .; \
87 #define X86_ALIGN_RODATA_BEGIN
88 #define X86_ALIGN_RODATA_END \
89 . = ALIGN(PAGE_SIZE); \
90 __end_rodata_aligned = .;
92 #define ALIGN_ENTRY_TEXT_BEGIN
93 #define ALIGN_ENTRY_TEXT_END
99 text PT_LOAD FLAGS(5); /* R_E */
100 data PT_LOAD FLAGS(6); /* RW_ */
103 percpu PT_LOAD FLAGS(6); /* RW_ */
105 init PT_LOAD FLAGS(7); /* RWE */
107 note PT_NOTE FLAGS(0); /* ___ */
113 . = LOAD_OFFSET + LOAD_PHYSICAL_ADDR;
114 phys_startup_32 = ABSOLUTE(startup_32 - LOAD_OFFSET);
117 phys_startup_64 = ABSOLUTE(startup_64 - LOAD_OFFSET);
120 /* Text and read-only data */
121 .text : AT(ADDR(.text) - LOAD_OFFSET) {
124 /* bootstrapping code */
131 ALIGN_ENTRY_TEXT_BEGIN
139 #ifdef CONFIG_RETPOLINE
140 __indirect_thunk_start = .;
141 *(.text.__x86.indirect_thunk)
142 __indirect_thunk_end = .;
145 /* End of text section */
151 EXCEPTION_TABLE(16) :text = 0x9090
153 /* .text should occupy whole number of pages */
154 . = ALIGN(PAGE_SIZE);
155 X86_ALIGN_RODATA_BEGIN
160 .data : AT(ADDR(.data) - LOAD_OFFSET) {
161 /* Start of data section */
165 INIT_TASK_DATA(THREAD_SIZE)
168 /* 32 bit has nosave before _edata */
172 PAGE_ALIGNED_DATA(PAGE_SIZE)
174 CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
179 /* rarely changed data like cpu maps */
180 READ_MOSTLY_DATA(INTERNODE_CACHE_BYTES)
182 /* End of data section */
190 . = ALIGN(PAGE_SIZE);
193 .vvar : AT(ADDR(.vvar) - LOAD_OFFSET) {
194 /* work around gold bug 13023 */
195 __vvar_beginning_hack = .;
197 /* Place all vvars at the offsets in asm/vvar.h. */
198 #define EMIT_VVAR(name, offset) \
199 . = __vvar_beginning_hack + offset; \
201 #define __VVAR_KERNEL_LDS
202 #include <asm/vvar.h>
203 #undef __VVAR_KERNEL_LDS
207 * Pad the rest of the page with zeros. Otherwise the loader
208 * can leave garbage here.
210 . = __vvar_beginning_hack + PAGE_SIZE;
213 . = ALIGN(__vvar_page + PAGE_SIZE, PAGE_SIZE);
215 /* Init code and data - will be freed after init */
216 . = ALIGN(PAGE_SIZE);
217 .init.begin : AT(ADDR(.init.begin) - LOAD_OFFSET) {
218 __init_begin = .; /* paired with __init_end */
221 #if defined(CONFIG_X86_64) && defined(CONFIG_SMP)
223 * percpu offsets are zero-based on SMP. PERCPU_VADDR() changes the
224 * output PHDR, so the next output section - .init.text - should
225 * start another segment - init.
227 PERCPU_VADDR(INTERNODE_CACHE_BYTES, 0, :percpu)
228 ASSERT(SIZEOF(.data..percpu) < CONFIG_PHYSICAL_START,
229 "per-CPU data too large - increase CONFIG_PHYSICAL_START")
232 INIT_TEXT_SECTION(PAGE_SIZE)
238 * Section for code used exclusively before alternatives are run. All
239 * references to such code must be patched out by alternatives, normally
240 * by using X86_FEATURE_ALWAYS CPU feature bit.
242 * See static_cpu_has() for an example.
244 .altinstr_aux : AT(ADDR(.altinstr_aux) - LOAD_OFFSET) {
248 INIT_DATA_SECTION(16)
250 .x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) {
251 __x86_cpu_dev_start = .;
253 __x86_cpu_dev_end = .;
256 #ifdef CONFIG_X86_INTEL_MID
257 .x86_intel_mid_dev.init : AT(ADDR(.x86_intel_mid_dev.init) - \
259 __x86_intel_mid_dev_start = .;
260 *(.x86_intel_mid_dev.init)
261 __x86_intel_mid_dev_end = .;
266 * start address and size of operations which during runtime
267 * can be patched with virtualization friendly instructions or
268 * baremetal native ones. Think page table operations.
269 * Details in paravirt_types.h
272 .parainstructions : AT(ADDR(.parainstructions) - LOAD_OFFSET) {
273 __parainstructions = .;
275 __parainstructions_end = .;
279 * struct alt_inst entries. From the header (alternative.h):
280 * "Alternative instructions for different CPU types or capabilities"
281 * Think locking instructions on spinlocks.
284 .altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) {
285 __alt_instructions = .;
287 __alt_instructions_end = .;
291 * And here are the replacement instructions. The linker sticks
292 * them as binary blobs. The .altinstructions has enough data to
293 * get the address and the length of them to patch the kernel safely.
295 .altinstr_replacement : AT(ADDR(.altinstr_replacement) - LOAD_OFFSET) {
296 *(.altinstr_replacement)
300 * struct iommu_table_entry entries are injected in this section.
301 * It is an array of IOMMUs which during run time gets sorted depending
302 * on its dependency order. After rootfs_initcall is complete
303 * this section can be safely removed.
305 .iommu_table : AT(ADDR(.iommu_table) - LOAD_OFFSET) {
308 __iommu_table_end = .;
312 .apicdrivers : AT(ADDR(.apicdrivers) - LOAD_OFFSET) {
315 __apicdrivers_end = .;
320 * .exit.text is discard at runtime, not link time, to deal with
321 * references from .altinstructions and .eh_frame
323 .exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) {
327 .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) {
331 #if !defined(CONFIG_X86_64) || !defined(CONFIG_SMP)
332 PERCPU_SECTION(INTERNODE_CACHE_BYTES)
335 . = ALIGN(PAGE_SIZE);
337 /* freed after init ends here */
338 .init.end : AT(ADDR(.init.end) - LOAD_OFFSET) {
343 * smp_locks might be freed after init
344 * start/end must be page aligned
346 . = ALIGN(PAGE_SIZE);
347 .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) {
350 . = ALIGN(PAGE_SIZE);
355 .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) {
361 . = ALIGN(PAGE_SIZE);
362 .bss : AT(ADDR(.bss) - LOAD_OFFSET) {
364 *(.bss..page_aligned)
367 . = ALIGN(PAGE_SIZE);
371 . = ALIGN(PAGE_SIZE);
372 .brk : AT(ADDR(.brk) - LOAD_OFFSET) {
374 . += 64 * 1024; /* 64k alignment slop space */
375 *(.brk_reservation) /* areas brk users have reserved */
379 . = ALIGN(PAGE_SIZE); /* keep VO_INIT_SIZE page aligned */
385 /* Sections to be discarded */
395 * The ASSERT() sink to . is intentional, for binutils 2.14 compatibility:
397 . = ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE),
398 "kernel image bigger than KERNEL_IMAGE_SIZE");
401 * Per-cpu symbols which need to be offset from __per_cpu_load
402 * for the boot processor.
404 #define INIT_PER_CPU(x) init_per_cpu__##x = x + __per_cpu_load
405 INIT_PER_CPU(gdt_page);
406 INIT_PER_CPU(irq_stack_union);
409 * Build-time check on the image size:
411 . = ASSERT((_end - _text <= KERNEL_IMAGE_SIZE),
412 "kernel image bigger than KERNEL_IMAGE_SIZE");
415 . = ASSERT((irq_stack_union == 0),
416 "irq_stack_union is not at start of per-cpu area");
419 #endif /* CONFIG_X86_32 */
421 #ifdef CONFIG_KEXEC_CORE
422 #include <asm/kexec.h>
424 . = ASSERT(kexec_control_code_size <= KEXEC_CONTROL_CODE_MAX_SIZE,
425 "kexec control code size is too big");