2 * vSMPowered(tm) systems specific initialization
3 * Copyright (C) 2005 ScaleMP Inc.
5 * Use of this code is subject to the terms and conditions of the
6 * GNU general public license version 2. See "COPYING" or
7 * http://www.gnu.org/licenses/gpl.html
9 * Ravikiran Thirumalai <kiran@scalemp.com>,
10 * Shai Fultheim <shai@scalemp.com>
11 * Paravirt ops integration: Glauber de Oliveira Costa <gcosta@redhat.com>,
12 * Ravikiran Thirumalai <kiran@scalemp.com>
15 #include <linux/init.h>
16 #include <linux/pci_ids.h>
17 #include <linux/pci_regs.h>
18 #include <linux/smp.h>
19 #include <linux/irq.h>
22 #include <asm/pci-direct.h>
24 #include <asm/paravirt.h>
25 #include <asm/setup.h>
27 #define TOPOLOGY_REGISTER_OFFSET 0x10
29 #if defined CONFIG_PCI && defined CONFIG_PARAVIRT_XXL
31 * Interrupt control on vSMPowered systems:
32 * ~AC is a shadow of IF. If IF is 'on' AC should be 'off'
36 asmlinkage __visible
unsigned long vsmp_save_fl(void)
38 unsigned long flags
= native_save_fl();
40 if (!(flags
& X86_EFLAGS_IF
) || (flags
& X86_EFLAGS_AC
))
41 flags
&= ~X86_EFLAGS_IF
;
44 PV_CALLEE_SAVE_REGS_THUNK(vsmp_save_fl
);
46 __visible
void vsmp_restore_fl(unsigned long flags
)
48 if (flags
& X86_EFLAGS_IF
)
49 flags
&= ~X86_EFLAGS_AC
;
51 flags
|= X86_EFLAGS_AC
;
52 native_restore_fl(flags
);
54 PV_CALLEE_SAVE_REGS_THUNK(vsmp_restore_fl
);
56 asmlinkage __visible
void vsmp_irq_disable(void)
58 unsigned long flags
= native_save_fl();
60 native_restore_fl((flags
& ~X86_EFLAGS_IF
) | X86_EFLAGS_AC
);
62 PV_CALLEE_SAVE_REGS_THUNK(vsmp_irq_disable
);
64 asmlinkage __visible
void vsmp_irq_enable(void)
66 unsigned long flags
= native_save_fl();
68 native_restore_fl((flags
| X86_EFLAGS_IF
) & (~X86_EFLAGS_AC
));
70 PV_CALLEE_SAVE_REGS_THUNK(vsmp_irq_enable
);
72 static unsigned __init
vsmp_patch(u8 type
, void *ibuf
,
73 unsigned long addr
, unsigned len
)
76 case PARAVIRT_PATCH(irq
.irq_enable
):
77 case PARAVIRT_PATCH(irq
.irq_disable
):
78 case PARAVIRT_PATCH(irq
.save_fl
):
79 case PARAVIRT_PATCH(irq
.restore_fl
):
80 return paravirt_patch_default(type
, ibuf
, addr
, len
);
82 return native_patch(type
, ibuf
, addr
, len
);
87 static void __init
set_vsmp_pv_ops(void)
89 void __iomem
*address
;
90 unsigned int cap
, ctl
, cfg
;
92 /* set vSMP magic bits to indicate vSMP capable kernel */
93 cfg
= read_pci_config(0, 0x1f, 0, PCI_BASE_ADDRESS_0
);
94 address
= early_ioremap(cfg
, 8);
96 ctl
= readl(address
+ 4);
97 printk(KERN_INFO
"vSMP CTL: capabilities:0x%08x control:0x%08x\n",
100 /* If possible, let the vSMP foundation route the interrupt optimally */
102 if (cap
& ctl
& BIT(8)) {
105 #ifdef CONFIG_PROC_FS
106 /* Don't let users change irq affinity via procfs */
112 if (cap
& ctl
& (1 << 4)) {
113 /* Setup irq ops and turn on vSMP IRQ fastpath handling */
114 pv_ops
.irq
.irq_disable
= PV_CALLEE_SAVE(vsmp_irq_disable
);
115 pv_ops
.irq
.irq_enable
= PV_CALLEE_SAVE(vsmp_irq_enable
);
116 pv_ops
.irq
.save_fl
= PV_CALLEE_SAVE(vsmp_save_fl
);
117 pv_ops
.irq
.restore_fl
= PV_CALLEE_SAVE(vsmp_restore_fl
);
118 pv_ops
.init
.patch
= vsmp_patch
;
121 writel(ctl
, address
+ 4);
122 ctl
= readl(address
+ 4);
123 pr_info("vSMP CTL: control set to:0x%08x\n", ctl
);
125 early_iounmap(address
, 8);
128 static void __init
set_vsmp_pv_ops(void)
134 static int is_vsmp
= -1;
136 static void __init
detect_vsmp_box(void)
140 if (!early_pci_allowed())
143 /* Check if we are running on a ScaleMP vSMPowered box */
144 if (read_pci_config(0, 0x1f, 0, PCI_VENDOR_ID
) ==
145 (PCI_VENDOR_ID_SCALEMP
| (PCI_DEVICE_ID_SCALEMP_VSMP_CTL
<< 16)))
149 static int is_vsmp_box(void)
160 static void __init
detect_vsmp_box(void)
163 static int is_vsmp_box(void)
169 static void __init
vsmp_cap_cpus(void)
171 #if !defined(CONFIG_X86_VSMP) && defined(CONFIG_SMP)
172 void __iomem
*address
;
173 unsigned int cfg
, topology
, node_shift
, maxcpus
;
176 * CONFIG_X86_VSMP is not configured, so limit the number CPUs to the
177 * ones present in the first board, unless explicitly overridden by
180 if (setup_max_cpus
!= NR_CPUS
)
183 /* Read the vSMP Foundation topology register */
184 cfg
= read_pci_config(0, 0x1f, 0, PCI_BASE_ADDRESS_0
);
185 address
= early_ioremap(cfg
+ TOPOLOGY_REGISTER_OFFSET
, 4);
186 if (WARN_ON(!address
))
189 topology
= readl(address
);
190 node_shift
= (topology
>> 16) & 0x7;
192 /* The value 0 should be decoded as 8 */
194 maxcpus
= (topology
& ((1 << node_shift
) - 1)) + 1;
196 pr_info("vSMP CTL: Capping CPUs to %d (CONFIG_X86_VSMP is unset)\n",
198 setup_max_cpus
= maxcpus
;
199 early_iounmap(address
, 4);
203 static int apicid_phys_pkg_id(int initial_apic_id
, int index_msb
)
205 return hard_smp_processor_id() >> index_msb
;
208 static void vsmp_apic_post_init(void)
210 /* need to update phys_pkg_id */
211 apic
->phys_pkg_id
= apicid_phys_pkg_id
;
214 void __init
vsmp_init(void)
220 x86_platform
.apic_post_init
= vsmp_apic_post_init
;