1 // SPDX-License-Identifier: GPL-2.0
4 * Discover the memory map and associated nodes.
6 * This version reads it directly from the AMD northbridge.
8 * Copyright 2002,2003 Andi Kleen, SuSE Labs.
10 #include <linux/kernel.h>
11 #include <linux/init.h>
12 #include <linux/string.h>
13 #include <linux/nodemask.h>
14 #include <linux/memblock.h>
15 #include <linux/bootmem.h>
18 #include <linux/pci_ids.h>
19 #include <linux/acpi.h>
20 #include <asm/types.h>
21 #include <asm/mmzone.h>
22 #include <asm/proto.h>
23 #include <asm/e820/api.h>
24 #include <asm/pci-direct.h>
26 #include <asm/mpspec.h>
28 #include <asm/amd_nb.h>
30 static unsigned char __initdata nodeids
[8];
32 static __init
int find_northbridge(void)
36 for (num
= 0; num
< 32; num
++) {
39 header
= read_pci_config(0, num
, 0, 0x00);
40 if (header
!= (PCI_VENDOR_ID_AMD
| (0x1100<<16)) &&
41 header
!= (PCI_VENDOR_ID_AMD
| (0x1200<<16)) &&
42 header
!= (PCI_VENDOR_ID_AMD
| (0x1300<<16)))
45 header
= read_pci_config(0, num
, 1, 0x00);
46 if (header
!= (PCI_VENDOR_ID_AMD
| (0x1101<<16)) &&
47 header
!= (PCI_VENDOR_ID_AMD
| (0x1201<<16)) &&
48 header
!= (PCI_VENDOR_ID_AMD
| (0x1301<<16)))
56 int __init
amd_numa_init(void)
58 u64 start
= PFN_PHYS(0);
59 u64 end
= PFN_PHYS(max_pfn
);
64 unsigned int bits
, cores
, apicid_base
;
66 if (!early_pci_allowed())
69 nb
= find_northbridge();
73 pr_info("Scanning NUMA topology in Northbridge %d\n", nb
);
75 reg
= read_pci_config(0, nb
, 0, 0x60);
76 numnodes
= ((reg
>> 4) & 0xF) + 1;
80 pr_info("Number of physical nodes %d\n", numnodes
);
83 for (i
= 0; i
< 8; i
++) {
86 base
= read_pci_config(0, nb
, 1, 0x40 + i
*8);
87 limit
= read_pci_config(0, nb
, 1, 0x44 + i
*8);
89 nodeids
[i
] = nodeid
= limit
& 7;
90 if ((base
& 3) == 0) {
92 pr_info("Skipping disabled node %d\n", i
);
95 if (nodeid
>= numnodes
) {
96 pr_info("Ignoring excess node %d (%Lx:%Lx)\n", nodeid
,
102 pr_info("Skipping node entry %d (base %Lx)\n",
106 if ((base
>> 8) & 3 || (limit
>> 8) & 3) {
107 pr_err("Node %d using interleaving mode %Lx/%Lx\n",
108 nodeid
, (base
>> 8) & 3, (limit
>> 8) & 3);
111 if (node_isset(nodeid
, numa_nodes_parsed
)) {
112 pr_info("Node %d already present, skipping\n",
134 pr_err("Empty node %d\n", nodeid
);
138 pr_err("Node %d bogus settings %Lx-%Lx.\n",
139 nodeid
, base
, limit
);
143 /* Could sort here, but pun for now. Should not happen anyroads. */
144 if (prevbase
> base
) {
145 pr_err("Node map not sorted %Lx,%Lx\n",
150 pr_info("Node %d MemBase %016Lx Limit %016Lx\n",
151 nodeid
, base
, limit
);
154 numa_add_memblk(nodeid
, base
, limit
);
155 node_set(nodeid
, numa_nodes_parsed
);
158 if (!nodes_weight(numa_nodes_parsed
))
162 * We seem to have valid NUMA configuration. Map apicids to nodes
163 * using the coreid bits from early_identify_cpu.
165 bits
= boot_cpu_data
.x86_coreid_bits
;
170 * get boot-time SMP configuration:
172 early_get_smp_config();
174 if (boot_cpu_physical_apicid
> 0) {
175 pr_info("BSP APIC ID: %02x\n", boot_cpu_physical_apicid
);
176 apicid_base
= boot_cpu_physical_apicid
;
179 for_each_node_mask(i
, numa_nodes_parsed
)
180 for (j
= apicid_base
; j
< cores
+ apicid_base
; j
++)
181 set_apicid_to_node((i
<< bits
) + j
, i
);