arch/arm/mach-s3c64xx/mach-smdk6410.c

   1 /* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c
   2  *
   3  * Copyright 2008 Openmoko, Inc.
   4  * Copyright 2008 Simtec Electronics
   5  *      Ben Dooks <ben@simtec.co.uk>
   6  *      http://armlinux.simtec.co.uk/
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12 */
  13
  14 #include <linux/kernel.h>
  15 #include <linux/types.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/list.h>
  18 #include <linux/timer.h>
  19 #include <linux/init.h>
  20 #include <linux/input.h>
  21 #include <linux/serial_core.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/io.h>
  24 #include <linux/i2c.h>
  25 #include <linux/leds.h>
  26 #include <linux/fb.h>
  27 #include <linux/gpio.h>
  28 #include <linux/delay.h>
  29 #include <linux/smsc911x.h>
  30 #include <linux/regulator/fixed.h>
  31 #include <linux/regulator/machine.h>
  32
  33 #ifdef CONFIG_SMDK6410_WM1190_EV1
  34 #include <linux/mfd/wm8350/core.h>
  35 #include <linux/mfd/wm8350/pmic.h>
  36 #endif
  37
  38 #ifdef CONFIG_SMDK6410_WM1192_EV1
  39 #include <linux/mfd/wm831x/core.h>
  40 #include <linux/mfd/wm831x/pdata.h>
  41 #endif
  42
  43 #include <video/platform_lcd.h>
  44
  45 #include <asm/mach/arch.h>
  46 #include <asm/mach/map.h>
  47 #include <asm/mach/irq.h>
  48
  49 #include <mach/hardware.h>
  50 #include <mach/regs-fb.h>
  51 #include <mach/map.h>
  52
  53 #include <asm/irq.h>
  54 #include <asm/mach-types.h>
  55
  56 #include <plat/regs-serial.h>
  57 #include <mach/regs-modem.h>
  58 #include <mach/regs-gpio.h>
  59 #include <mach/regs-sys.h>
  60 #include <mach/regs-srom.h>
  61 #include <plat/ata.h>
  62 #include <plat/iic.h>
  63 #include <plat/fb.h>
  64 #include <plat/gpio-cfg.h>
  65
  66 #include <mach/s3c6410.h>
  67 #include <plat/clock.h>
  68 #include <plat/devs.h>
  69 #include <plat/cpu.h>
  70 #include <plat/adc.h>
  71 #include <plat/ts.h>
  72 #include <plat/keypad.h>
  73
  74 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
  75 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  76 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  77
  78 static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
  79         [0] = {
  80                 .hwport      = 0,
  81                 .flags       = 0,
  82                 .ucon        = UCON,
  83                 .ulcon       = ULCON,
  84                 .ufcon       = UFCON,
  85         },
  86         [1] = {
  87                 .hwport      = 1,
  88                 .flags       = 0,
  89                 .ucon        = UCON,
  90                 .ulcon       = ULCON,
  91                 .ufcon       = UFCON,
  92         },
  93         [2] = {
  94                 .hwport      = 2,
  95                 .flags       = 0,
  96                 .ucon        = UCON,
  97                 .ulcon       = ULCON,
  98                 .ufcon       = UFCON,
  99         },
 100         [3] = {
 101                 .hwport      = 3,
 102                 .flags       = 0,
 103                 .ucon        = UCON,
 104                 .ulcon       = ULCON,
 105                 .ufcon       = UFCON,
 106         },
 107 };
 108
 109 /* framebuffer and LCD setup. */
 110
 111 /* GPF15 = LCD backlight control
 112  * GPF13 => Panel power
 113  * GPN5 = LCD nRESET signal
 114  * PWM_TOUT1 => backlight brightness
 115  */
 116
 117 static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
 118                                    unsigned int power)
 119 {
 120         if (power) {
 121                 gpio_direction_output(S3C64XX_GPF(13), 1);
 122                 gpio_direction_output(S3C64XX_GPF(15), 1);
 123
 124                 /* fire nRESET on power up */
 125                 gpio_direction_output(S3C64XX_GPN(5), 0);
 126                 msleep(10);
 127                 gpio_direction_output(S3C64XX_GPN(5), 1);
 128                 msleep(1);
 129         } else {
 130                 gpio_direction_output(S3C64XX_GPF(15), 0);
 131                 gpio_direction_output(S3C64XX_GPF(13), 0);
 132         }
 133 }
 134
 135 static struct plat_lcd_data smdk6410_lcd_power_data = {
 136         .set_power      = smdk6410_lcd_power_set,
 137 };
 138
 139 static struct platform_device smdk6410_lcd_powerdev = {
 140         .name                   = "platform-lcd",
 141         .dev.parent             = &s3c_device_fb.dev,
 142         .dev.platform_data      = &smdk6410_lcd_power_data,
 143 };
 144
 145 static struct s3c_fb_pd_win smdk6410_fb_win0 = {
 146         /* this is to ensure we use win0 */
 147         .win_mode       = {
 148                 .left_margin    = 8,
 149                 .right_margin   = 13,
 150                 .upper_margin   = 7,
 151                 .lower_margin   = 5,
 152                 .hsync_len      = 3,
 153                 .vsync_len      = 1,
 154                 .xres           = 800,
 155                 .yres           = 480,
 156         },
 157         .max_bpp        = 32,
 158         .default_bpp    = 16,
 159         .virtual_y      = 480 * 2,
 160         .virtual_x      = 800,
 161 };
 162
 163 /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
 164 static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
 165         .setup_gpio     = s3c64xx_fb_gpio_setup_24bpp,
 166         .win[0]         = &smdk6410_fb_win0,
 167         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
 168         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
 169 };
 170
 171 /*
 172  * Configuring Ethernet on SMDK6410
 173  *
 174  * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
 175  * The constant address below corresponds to nCS1
 176  *
 177  *  1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
 178  *  2) CFG6 needs to be switched to "LAN9115" side
 179  */
 180
 181 static struct resource smdk6410_smsc911x_resources[] = {
 182         [0] = {
 183                 .start = S3C64XX_PA_XM0CSN1,
 184                 .end   = S3C64XX_PA_XM0CSN1 + SZ_64K - 1,
 185                 .flags = IORESOURCE_MEM,
 186         },
 187         [1] = {
 188                 .start = S3C_EINT(10),
 189                 .end   = S3C_EINT(10),
 190                 .flags = IORESOURCE_IRQ | IRQ_TYPE_LEVEL_LOW,
 191         },
 192 };
 193
 194 static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
 195         .irq_polarity  = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
 196         .irq_type      = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
 197         .flags         = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
 198         .phy_interface = PHY_INTERFACE_MODE_MII,
 199 };
 200
 201
 202 static struct platform_device smdk6410_smsc911x = {
 203         .name          = "smsc911x",
 204         .id            = -1,
 205         .num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
 206         .resource      = &smdk6410_smsc911x_resources[0],
 207         .dev = {
 208                 .platform_data = &smdk6410_smsc911x_pdata,
 209         },
 210 };
 211
 212 #ifdef CONFIG_REGULATOR
 213 static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] = {
 214         {
 215                 /* WM8580 */
 216                 .supply = "PVDD",
 217                 .dev_name = "0-001b",
 218         },
 219         {
 220                 /* WM8580 */
 221                 .supply = "AVDD",
 222                 .dev_name = "0-001b",
 223         },
 224 };
 225
 226 static struct regulator_init_data smdk6410_b_pwr_5v_data = {
 227         .constraints = {
 228                 .always_on = 1,
 229         },
 230         .num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers),
 231         .consumer_supplies = smdk6410_b_pwr_5v_consumers,
 232 };
 233
 234 static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = {
 235         .supply_name = "B_PWR_5V",
 236         .microvolts = 5000000,
 237         .init_data = &smdk6410_b_pwr_5v_data,
 238         .gpio = -EINVAL,
 239 };
 240
 241 static struct platform_device smdk6410_b_pwr_5v = {
 242         .name          = "reg-fixed-voltage",
 243         .id            = -1,
 244         .dev = {
 245                 .platform_data = &smdk6410_b_pwr_5v_pdata,
 246         },
 247 };
 248 #endif
 249
 250 static struct s3c_ide_platdata smdk6410_ide_pdata __initdata = {
 251         .setup_gpio     = s3c64xx_ide_setup_gpio,
 252 };
 253
 254 static uint32_t smdk6410_keymap[] __initdata = {
 255         /* KEY(row, col, keycode) */
 256         KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
 257         KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
 258         KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
 259         KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
 260 };
 261
 262 static struct matrix_keymap_data smdk6410_keymap_data __initdata = {
 263         .keymap         = smdk6410_keymap,
 264         .keymap_size    = ARRAY_SIZE(smdk6410_keymap),
 265 };
 266
 267 static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = {
 268         .keymap_data    = &smdk6410_keymap_data,
 269         .rows           = 2,
 270         .cols           = 8,
 271 };
 272
 273 static struct map_desc smdk6410_iodesc[] = {};
 274
 275 static struct platform_device *smdk6410_devices[] __initdata = {
 276 #ifdef CONFIG_SMDK6410_SD_CH0
 277         &s3c_device_hsmmc0,
 278 #endif
 279 #ifdef CONFIG_SMDK6410_SD_CH1
 280         &s3c_device_hsmmc1,
 281 #endif
 282         &s3c_device_i2c0,
 283         &s3c_device_i2c1,
 284         &s3c_device_fb,
 285         &s3c_device_ohci,
 286         &s3c_device_usb_hsotg,
 287         &samsung_asoc_dma,
 288         &s3c64xx_device_iisv4,
 289         &samsung_device_keypad,
 290
 291 #ifdef CONFIG_REGULATOR
 292         &smdk6410_b_pwr_5v,
 293 #endif
 294         &smdk6410_lcd_powerdev,
 295
 296         &smdk6410_smsc911x,
 297         &s3c_device_adc,
 298         &s3c_device_cfcon,
 299         &s3c_device_rtc,
 300         &s3c_device_ts,
 301         &s3c_device_wdt,
 302 };
 303
 304 #ifdef CONFIG_REGULATOR
 305 /* ARM core */
 306 static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
 307         {
 308                 .supply = "vddarm",
 309         }
 310 };
 311
 312 /* VDDARM, BUCK1 on J5 */
 313 static struct regulator_init_data smdk6410_vddarm = {
 314         .constraints = {
 315                 .name = "PVDD_ARM",
 316                 .min_uV = 1000000,
 317                 .max_uV = 1300000,
 318                 .always_on = 1,
 319                 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
 320         },
 321         .num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
 322         .consumer_supplies = smdk6410_vddarm_consumers,
 323 };
 324
 325 /* VDD_INT, BUCK2 on J5 */
 326 static struct regulator_init_data smdk6410_vddint = {
 327         .constraints = {
 328                 .name = "PVDD_INT",
 329                 .min_uV = 1000000,
 330                 .max_uV = 1200000,
 331                 .always_on = 1,
 332                 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
 333         },
 334 };
 335
 336 /* VDD_HI, LDO3 on J5 */
 337 static struct regulator_init_data smdk6410_vddhi = {
 338         .constraints = {
 339                 .name = "PVDD_HI",
 340                 .always_on = 1,
 341         },
 342 };
 343
 344 /* VDD_PLL, LDO2 on J5 */
 345 static struct regulator_init_data smdk6410_vddpll = {
 346         .constraints = {
 347                 .name = "PVDD_PLL",
 348                 .always_on = 1,
 349         },
 350 };
 351
 352 /* VDD_UH_MMC, LDO5 on J5 */
 353 static struct regulator_init_data smdk6410_vdduh_mmc = {
 354         .constraints = {
 355                 .name = "PVDD_UH+PVDD_MMC",
 356                 .always_on = 1,
 357         },
 358 };
 359
 360 /* VCCM3BT, LDO8 on J5 */
 361 static struct regulator_init_data smdk6410_vccmc3bt = {
 362         .constraints = {
 363                 .name = "PVCCM3BT",
 364                 .always_on = 1,
 365         },
 366 };
 367
 368 /* VCCM2MTV, LDO11 on J5 */
 369 static struct regulator_init_data smdk6410_vccm2mtv = {
 370         .constraints = {
 371                 .name = "PVCCM2MTV",
 372                 .always_on = 1,
 373         },
 374 };
 375
 376 /* VDD_LCD, LDO12 on J5 */
 377 static struct regulator_init_data smdk6410_vddlcd = {
 378         .constraints = {
 379                 .name = "PVDD_LCD",
 380                 .always_on = 1,
 381         },
 382 };
 383
 384 /* VDD_OTGI, LDO9 on J5 */
 385 static struct regulator_init_data smdk6410_vddotgi = {
 386         .constraints = {
 387                 .name = "PVDD_OTGI",
 388                 .always_on = 1,
 389         },
 390 };
 391
 392 /* VDD_OTG, LDO14 on J5 */
 393 static struct regulator_init_data smdk6410_vddotg = {
 394         .constraints = {
 395                 .name = "PVDD_OTG",
 396                 .always_on = 1,
 397         },
 398 };
 399
 400 /* VDD_ALIVE, LDO15 on J5 */
 401 static struct regulator_init_data smdk6410_vddalive = {
 402         .constraints = {
 403                 .name = "PVDD_ALIVE",
 404                 .always_on = 1,
 405         },
 406 };
 407
 408 /* VDD_AUDIO, VLDO_AUDIO on J5 */
 409 static struct regulator_init_data smdk6410_vddaudio = {
 410         .constraints = {
 411                 .name = "PVDD_AUDIO",
 412                 .always_on = 1,
 413         },
 414 };
 415 #endif
 416
 417 #ifdef CONFIG_SMDK6410_WM1190_EV1
 418 /* S3C64xx internal logic & PLL */
 419 static struct regulator_init_data wm8350_dcdc1_data = {
 420         .constraints = {
 421                 .name = "PVDD_INT+PVDD_PLL",
 422                 .min_uV = 1200000,
 423                 .max_uV = 1200000,
 424                 .always_on = 1,
 425                 .apply_uV = 1,
 426         },
 427 };
 428
 429 /* Memory */
 430 static struct regulator_init_data wm8350_dcdc3_data = {
 431         .constraints = {
 432                 .name = "PVDD_MEM",
 433                 .min_uV = 1800000,
 434                 .max_uV = 1800000,
 435                 .always_on = 1,
 436                 .state_mem = {
 437                          .uV = 1800000,
 438                          .mode = REGULATOR_MODE_NORMAL,
 439                          .enabled = 1,
 440                 },
 441                 .initial_state = PM_SUSPEND_MEM,
 442         },
 443 };
 444
 445 /* USB, EXT, PCM, ADC/DAC, USB, MMC */
 446 static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
 447         {
 448                 /* WM8580 */
 449                 .supply = "DVDD",
 450                 .dev_name = "0-001b",
 451         },
 452 };
 453
 454 static struct regulator_init_data wm8350_dcdc4_data = {
 455         .constraints = {
 456                 .name = "PVDD_HI+PVDD_EXT+PVDD_SYS+PVCCM2MTV",
 457                 .min_uV = 3000000,
 458                 .max_uV = 3000000,
 459                 .always_on = 1,
 460         },
 461         .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
 462         .consumer_supplies = wm8350_dcdc4_consumers,
 463 };
 464
 465 /* OTGi/1190-EV1 HPVDD & AVDD */
 466 static struct regulator_init_data wm8350_ldo4_data = {
 467         .constraints = {
 468                 .name = "PVDD_OTGI+HPVDD+AVDD",
 469                 .min_uV = 1200000,
 470                 .max_uV = 1200000,
 471                 .apply_uV = 1,
 472                 .always_on = 1,
 473         },
 474 };
 475
 476 static struct {
 477         int regulator;
 478         struct regulator_init_data *initdata;
 479 } wm1190_regulators[] = {
 480         { WM8350_DCDC_1, &wm8350_dcdc1_data },
 481         { WM8350_DCDC_3, &wm8350_dcdc3_data },
 482         { WM8350_DCDC_4, &wm8350_dcdc4_data },
 483         { WM8350_DCDC_6, &smdk6410_vddarm },
 484         { WM8350_LDO_1, &smdk6410_vddalive },
 485         { WM8350_LDO_2, &smdk6410_vddotg },
 486         { WM8350_LDO_3, &smdk6410_vddlcd },
 487         { WM8350_LDO_4, &wm8350_ldo4_data },
 488 };
 489
 490 static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
 491 {
 492         int i;
 493
 494         /* Configure the IRQ line */
 495         s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
 496
 497         /* Instantiate the regulators */
 498         for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
 499                 wm8350_register_regulator(wm8350,
 500                                           wm1190_regulators[i].regulator,
 501                                           wm1190_regulators[i].initdata);
 502
 503         return 0;
 504 }
 505
 506 static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
 507         .init = smdk6410_wm8350_init,
 508         .irq_high = 1,
 509         .irq_base = IRQ_BOARD_START,
 510 };
 511 #endif
 512
 513 #ifdef CONFIG_SMDK6410_WM1192_EV1
 514 static struct gpio_led wm1192_pmic_leds[] = {
 515         {
 516                 .name = "PMIC:red:power",
 517                 .gpio = GPIO_BOARD_START + 3,
 518                 .default_state = LEDS_GPIO_DEFSTATE_ON,
 519         },
 520 };
 521
 522 static struct gpio_led_platform_data wm1192_pmic_led = {
 523         .num_leds = ARRAY_SIZE(wm1192_pmic_leds),
 524         .leds = wm1192_pmic_leds,
 525 };
 526
 527 static struct platform_device wm1192_pmic_led_dev = {
 528         .name          = "leds-gpio",
 529         .id            = -1,
 530         .dev = {
 531                 .platform_data = &wm1192_pmic_led,
 532         },
 533 };
 534
 535 static int wm1192_pre_init(struct wm831x *wm831x)
 536 {
 537         int ret;
 538
 539         /* Configure the IRQ line */
 540         s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
 541
 542         ret = platform_device_register(&wm1192_pmic_led_dev);
 543         if (ret != 0)
 544                 dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret);
 545
 546         return 0;
 547 }
 548
 549 static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
 550         .isink = 1,
 551         .max_uA = 27554,
 552 };
 553
 554 static struct regulator_init_data wm1192_dcdc3 = {
 555         .constraints = {
 556                 .name = "PVDD_MEM+PVDD_GPS",
 557                 .always_on = 1,
 558         },
 559 };
 560
 561 static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
 562         { .supply = "DVDD", .dev_name = "0-001b", },   /* WM8580 */
 563 };
 564
 565 static struct regulator_init_data wm1192_ldo1 = {
 566         .constraints = {
 567                 .name = "PVDD_LCD+PVDD_EXT",
 568                 .always_on = 1,
 569         },
 570         .consumer_supplies = wm1192_ldo1_consumers,
 571         .num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
 572 };
 573
 574 static struct wm831x_status_pdata wm1192_led7_pdata = {
 575         .name = "LED7:green:",
 576 };
 577
 578 static struct wm831x_status_pdata wm1192_led8_pdata = {
 579         .name = "LED8:green:",
 580 };
 581
 582 static struct wm831x_pdata smdk6410_wm1192_pdata = {
 583         .pre_init = wm1192_pre_init,
 584         .irq_base = IRQ_BOARD_START,
 585
 586         .backlight = &wm1192_backlight_pdata,
 587         .dcdc = {
 588                 &smdk6410_vddarm,  /* DCDC1 */
 589                 &smdk6410_vddint,  /* DCDC2 */
 590                 &wm1192_dcdc3,
 591         },
 592         .gpio_base = GPIO_BOARD_START,
 593         .ldo = {
 594                  &wm1192_ldo1,        /* LDO1 */
 595                  &smdk6410_vdduh_mmc, /* LDO2 */
 596                  NULL,                /* LDO3 NC */
 597                  &smdk6410_vddotgi,   /* LDO4 */
 598                  &smdk6410_vddotg,    /* LDO5 */
 599                  &smdk6410_vddhi,     /* LDO6 */
 600                  &smdk6410_vddaudio,  /* LDO7 */
 601                  &smdk6410_vccm2mtv,  /* LDO8 */
 602                  &smdk6410_vddpll,    /* LDO9 */
 603                  &smdk6410_vccmc3bt,  /* LDO10 */
 604                  &smdk6410_vddalive,  /* LDO11 */
 605         },
 606         .status = {
 607                 &wm1192_led7_pdata,
 608                 &wm1192_led8_pdata,
 609         },
 610 };
 611 #endif
 612
 613 static struct i2c_board_info i2c_devs0[] __initdata = {
 614         { I2C_BOARD_INFO("24c08", 0x50), },
 615         { I2C_BOARD_INFO("wm8580", 0x1b), },
 616
 617 #ifdef CONFIG_SMDK6410_WM1192_EV1
 618         { I2C_BOARD_INFO("wm8312", 0x34),
 619           .platform_data = &smdk6410_wm1192_pdata,
 620           .irq = S3C_EINT(12),
 621         },
 622 #endif
 623
 624 #ifdef CONFIG_SMDK6410_WM1190_EV1
 625         { I2C_BOARD_INFO("wm8350", 0x1a),
 626           .platform_data = &smdk6410_wm8350_pdata,
 627           .irq = S3C_EINT(12),
 628         },
 629 #endif
 630 };
 631
 632 static struct i2c_board_info i2c_devs1[] __initdata = {
 633         { I2C_BOARD_INFO("24c128", 0x57), },    /* Samsung S524AD0XD1 */
 634 };
 635
 636 static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
 637         .delay                  = 10000,
 638         .presc                  = 49,
 639         .oversampling_shift     = 2,
 640 };
 641
 642 static void __init smdk6410_map_io(void)
 643 {
 644         u32 tmp;
 645
 646         s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
 647         s3c24xx_init_clocks(12000000);
 648         s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
 649
 650         /* set the LCD type */
 651
 652         tmp = __raw_readl(S3C64XX_SPCON);
 653         tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
 654         tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
 655         __raw_writel(tmp, S3C64XX_SPCON);
 656
 657         /* remove the lcd bypass */
 658         tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
 659         tmp &= ~MIFPCON_LCD_BYPASS;
 660         __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
 661 }
 662
 663 static void __init smdk6410_machine_init(void)
 664 {
 665         u32 cs1;
 666
 667         s3c_i2c0_set_platdata(NULL);
 668         s3c_i2c1_set_platdata(NULL);
 669         s3c_fb_set_platdata(&smdk6410_lcd_pdata);
 670
 671         samsung_keypad_set_platdata(&smdk6410_keypad_data);
 672
 673         s3c24xx_ts_set_platdata(&s3c_ts_platform);
 674
 675         /* configure nCS1 width to 16 bits */
 676
 677         cs1 = __raw_readl(S3C64XX_SROM_BW) &
 678                     ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
 679         cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
 680                 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
 681                 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
 682                                                    S3C64XX_SROM_BW__NCS1__SHIFT;
 683         __raw_writel(cs1, S3C64XX_SROM_BW);
 684
 685         /* set timing for nCS1 suitable for ethernet chip */
 686
 687         __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
 688                      (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
 689                      (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
 690                      (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
 691                      (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
 692                      (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
 693                      (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
 694
 695         gpio_request(S3C64XX_GPN(5), "LCD power");
 696         gpio_request(S3C64XX_GPF(13), "LCD power");
 697         gpio_request(S3C64XX_GPF(15), "LCD power");
 698
 699         i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
 700         i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
 701
 702         s3c_ide_set_platdata(&smdk6410_ide_pdata);
 703
 704         platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
 705 }
 706
 707 MACHINE_START(SMDK6410, "SMDK6410")
 708         /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
 709         .boot_params    = S3C64XX_PA_SDRAM + 0x100,
 710
 711         .init_irq       = s3c6410_init_irq,
 712         .map_io         = smdk6410_map_io,
 713         .init_machine   = smdk6410_machine_init,
 714         .timer          = &s3c24xx_timer,
 715 MACHINE_END