2 * linux/drivers/pcmcia/soc_common.h
4 * Copyright (C) 2000 John G Dorsey <john+@cs.cmu.edu>
6 * This file contains definitions for the PCMCIA support code common to
7 * integrated SOCs like the SA-11x0 and PXA2xx microprocessors.
9 #ifndef _ASM_ARCH_PCMCIA
10 #define _ASM_ARCH_PCMCIA
12 /* include the world */
13 #include <linux/clk.h>
14 #include <linux/cpufreq.h>
15 #include <pcmcia/ss.h>
16 #include <pcmcia/cistpl.h>
21 struct pcmcia_low_level
;
24 struct soc_pcmcia_regulator
{
25 struct regulator
*reg
;
30 * This structure encapsulates per-socket state which we might need to
31 * use when responding to a Card Services query of some kind.
33 struct soc_pcmcia_socket
{
34 struct pcmcia_socket socket
;
37 * Info from low level handler
45 const struct pcmcia_low_level
*ops
;
48 socket_state_t cs_state
;
50 unsigned short spd_io
[MAX_IO_WIN
];
51 unsigned short spd_mem
[MAX_WIN
];
52 unsigned short spd_attr
[MAX_WIN
];
54 struct resource res_skt
;
55 struct resource res_io
;
56 struct resource res_mem
;
57 struct resource res_attr
;
58 void __iomem
*virt_io
;
62 struct gpio_desc
*desc
;
66 #define SOC_STAT_CD 0 /* Card detect */
67 #define SOC_STAT_BVD1 1 /* BATDEAD / IOSTSCHG */
68 #define SOC_STAT_BVD2 2 /* BATWARN / IOSPKR */
69 #define SOC_STAT_RDY 3 /* Ready / Interrupt */
70 #define SOC_STAT_VS1 4 /* Voltage sense 1 */
71 #define SOC_STAT_VS2 5 /* Voltage sense 2 */
73 struct gpio_desc
*gpio_reset
;
74 struct gpio_desc
*gpio_bus_enable
;
75 struct soc_pcmcia_regulator vcc
;
76 struct soc_pcmcia_regulator vpp
;
78 unsigned int irq_state
;
80 #ifdef CONFIG_CPU_FREQ
81 struct notifier_block cpufreq_nb
;
83 struct timer_list poll_timer
;
84 struct list_head node
;
90 struct soc_pcmcia_socket skt
[0];
103 struct pcmcia_low_level
{
104 struct module
*owner
;
106 /* first socket in system */
111 int (*hw_init
)(struct soc_pcmcia_socket
*);
112 void (*hw_shutdown
)(struct soc_pcmcia_socket
*);
114 void (*socket_state
)(struct soc_pcmcia_socket
*, struct pcmcia_state
*);
115 int (*configure_socket
)(struct soc_pcmcia_socket
*, const socket_state_t
*);
118 * Enable card status IRQs on (re-)initialisation. This can
119 * be called at initialisation, power management event, or
122 void (*socket_init
)(struct soc_pcmcia_socket
*);
125 * Disable card status IRQs and PCMCIA bus on suspend.
127 void (*socket_suspend
)(struct soc_pcmcia_socket
*);
130 * Hardware specific timing routines.
131 * If provided, the get_timing routine overrides the SOC default.
133 unsigned int (*get_timing
)(struct soc_pcmcia_socket
*, unsigned int, unsigned int);
134 int (*set_timing
)(struct soc_pcmcia_socket
*);
135 int (*show_timing
)(struct soc_pcmcia_socket
*, char *);
137 #ifdef CONFIG_CPU_FREQ
141 int (*frequency_change
)(struct soc_pcmcia_socket
*, unsigned long, struct cpufreq_freqs
*);
146 struct soc_pcmcia_timing
{
152 extern void soc_common_pcmcia_get_timing(struct soc_pcmcia_socket
*, struct soc_pcmcia_timing
*);
154 void soc_pcmcia_init_one(struct soc_pcmcia_socket
*skt
,
155 const struct pcmcia_low_level
*ops
, struct device
*dev
);
156 void soc_pcmcia_remove_one(struct soc_pcmcia_socket
*skt
);
157 int soc_pcmcia_add_one(struct soc_pcmcia_socket
*skt
);
158 int soc_pcmcia_request_gpiods(struct soc_pcmcia_socket
*skt
);
160 void soc_common_cf_socket_state(struct soc_pcmcia_socket
*skt
,
161 struct pcmcia_state
*state
);
163 int soc_pcmcia_regulator_set(struct soc_pcmcia_socket
*skt
,
164 struct soc_pcmcia_regulator
*r
, int v
);
166 #ifdef CONFIG_PCMCIA_DEBUG
168 extern void soc_pcmcia_debug(struct soc_pcmcia_socket
*skt
, const char *func
,
169 int lvl
, const char *fmt
, ...);
171 #define debug(skt, lvl, fmt, arg...) \
172 soc_pcmcia_debug(skt, __func__, lvl, fmt , ## arg)
175 #define debug(skt, lvl, fmt, arg...) do { } while (0)
180 * The PC Card Standard, Release 7, section 4.13.4, says that twIORD
181 * has a minimum value of 165ns. Section 4.13.5 says that twIOWR has
182 * a minimum value of 165ns, as well. Section 4.7.2 (describing
183 * common and attribute memory write timing) says that twWE has a
184 * minimum value of 150ns for a 250ns cycle time (for 5V operation;
185 * see section 4.7.4), or 300ns for a 600ns cycle time (for 3.3V
186 * operation, also section 4.7.4). Section 4.7.3 says that taOE
187 * has a maximum value of 150ns for a 300ns cycle time (for 5V
188 * operation), or 300ns for a 600ns cycle time (for 3.3V operation).
190 * When configuring memory maps, Card Services appears to adopt the policy
191 * that a memory access time of "0" means "use the default." The default
192 * PCMCIA I/O command width time is 165ns. The default PCMCIA 5V attribute
193 * and memory command width time is 150ns; the PCMCIA 3.3V attribute and
194 * memory command width time is 300ns.
196 #define SOC_PCMCIA_IO_ACCESS (165)
197 #define SOC_PCMCIA_5V_MEM_ACCESS (150)
198 #define SOC_PCMCIA_3V_MEM_ACCESS (300)
199 #define SOC_PCMCIA_ATTR_MEM_ACCESS (300)
202 * The socket driver actually works nicely in interrupt-driven form,
203 * so the (relatively infrequent) polling is "just to be sure."
205 #define SOC_PCMCIA_POLL_PERIOD (2*HZ)
208 /* I/O pins replacing memory pins
209 * (PCMCIA System Architecture, 2nd ed., by Don Anderson, p.75)
211 * These signals change meaning when going from memory-only to
212 * memory-or-I/O interface:
214 #define iostschg bvd1