drivers/clk/sunxi/clk-a10-mod1.c

   1 /*
   2  * Copyright 2013 Emilio López
   3  *
   4  * Emilio López <emilio@elopez.com.ar>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #include <linux/clk-provider.h>
  18 #include <linux/of.h>
  19 #include <linux/of_address.h>
  20 #include <linux/slab.h>
  21
  22 static DEFINE_SPINLOCK(mod1_lock);
  23
  24 #define SUN4I_MOD1_ENABLE       31
  25 #define SUN4I_MOD1_MUX          16
  26 #define SUN4I_MOD1_MUX_WIDTH    2
  27 #define SUN4I_MOD1_MAX_PARENTS  4
  28
  29 static void __init sun4i_mod1_clk_setup(struct device_node *node)
  30 {
  31         struct clk *clk;
  32         struct clk_mux *mux;
  33         struct clk_gate *gate;
  34         const char *parents[4];
  35         const char *clk_name = node->name;
  36         void __iomem *reg;
  37         int i;
  38
  39         reg = of_io_request_and_map(node, 0, of_node_full_name(node));
  40         if (IS_ERR(reg))
  41                 return;
  42
  43         mux = kzalloc(sizeof(*mux), GFP_KERNEL);
  44         if (!mux)
  45                 goto err_unmap;
  46
  47         gate = kzalloc(sizeof(*gate), GFP_KERNEL);
  48         if (!gate)
  49                 goto err_free_mux;
  50
  51         of_property_read_string(node, "clock-output-names", &clk_name);
  52         i = of_clk_parent_fill(node, parents, SUN4I_MOD1_MAX_PARENTS);
  53
  54         gate->reg = reg;
  55         gate->bit_idx = SUN4I_MOD1_ENABLE;
  56         gate->lock = &mod1_lock;
  57         mux->reg = reg;
  58         mux->shift = SUN4I_MOD1_MUX;
  59         mux->mask = BIT(SUN4I_MOD1_MUX_WIDTH) - 1;
  60         mux->lock = &mod1_lock;
  61
  62         clk = clk_register_composite(NULL, clk_name, parents, i,
  63                                      &mux->hw, &clk_mux_ops,
  64                                      NULL, NULL,
  65                                      &gate->hw, &clk_gate_ops, CLK_SET_RATE_PARENT);
  66         if (IS_ERR(clk))
  67                 goto err_free_gate;
  68
  69         of_clk_add_provider(node, of_clk_src_simple_get, clk);
  70
  71         return;
  72
  73 err_free_gate:
  74         kfree(gate);
  75 err_free_mux:
  76         kfree(mux);
  77 err_unmap:
  78         iounmap(reg);
  79 }
  80 CLK_OF_DECLARE(sun4i_mod1, "allwinner,sun4i-a10-mod1-clk",
  81                sun4i_mod1_clk_setup);