2 * Driver for the ICST307 VCO clock found in the ARM Reference designs.
3 * We wrap the custom interface from <asm/hardware/icst.h> into the generic
6 * Copyright (C) 2012-2015 Linus Walleij
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * TODO: when all ARM reference designs are migrated to generic clocks, the
13 * ICST clock code from the ARM tree should probably be merged into this
16 #include <linux/kernel.h>
17 #include <linux/slab.h>
18 #include <linux/export.h>
19 #include <linux/err.h>
20 #include <linux/clk-provider.h>
22 #include <linux/regmap.h>
23 #include <linux/mfd/syscon.h>
28 /* Magic unlocking token used on all Versatile boards */
29 #define VERSATILE_LOCK_VAL 0xA05F
31 #define VERSATILE_AUX_OSC_BITS 0x7FFFF
32 #define INTEGRATOR_AP_CM_BITS 0xFF
33 #define INTEGRATOR_AP_SYS_BITS 0xFF
34 #define INTEGRATOR_CP_CM_CORE_BITS 0x7FF
35 #define INTEGRATOR_CP_CM_MEM_BITS 0x7FF000
37 #define INTEGRATOR_AP_PCI_25_33_MHZ BIT(8)
40 * enum icst_control_type - the type of ICST control register
42 enum icst_control_type
{
43 ICST_VERSATILE
, /* The standard type, all control bits available */
44 ICST_INTEGRATOR_AP_CM
, /* Only 8 bits of VDW available */
45 ICST_INTEGRATOR_AP_SYS
, /* Only 8 bits of VDW available */
46 ICST_INTEGRATOR_AP_PCI
, /* Odd bit pattern storage */
47 ICST_INTEGRATOR_CP_CM_CORE
, /* Only 8 bits of VDW and 3 bits of OD */
48 ICST_INTEGRATOR_CP_CM_MEM
, /* Only 8 bits of VDW and 3 bits of OD */
52 * struct clk_icst - ICST VCO clock wrapper
53 * @hw: corresponding clock hardware entry
54 * @vcoreg: VCO register address
55 * @lockreg: VCO lock register address
56 * @params: parameters for this ICST instance
58 * @ctype: the type of control register for the ICST
65 struct icst_params
*params
;
67 enum icst_control_type ctype
;
70 #define to_icst(_hw) container_of(_hw, struct clk_icst, hw)
73 * vco_get() - get ICST VCO settings from a certain ICST
74 * @icst: the ICST clock to get
75 * @vco: the VCO struct to return the value in
77 static int vco_get(struct clk_icst
*icst
, struct icst_vco
*vco
)
82 ret
= regmap_read(icst
->map
, icst
->vcoreg_off
, &val
);
87 * The Integrator/AP core clock can only access the low eight
88 * bits of the v PLL divider. Bit 8 is tied low and always zero,
89 * r is hardwired to 22 and output divider s is hardwired to 1
90 * (divide by 2) according to the document
91 * "Integrator CM926EJ-S, CM946E-S, CM966E-S, CM1026EJ-S and
92 * CM1136JF-S User Guide" ARM DUI 0138E, page 3-13 thru 3-14.
94 if (icst
->ctype
== ICST_INTEGRATOR_AP_CM
) {
95 vco
->v
= val
& INTEGRATOR_AP_CM_BITS
;
102 * The Integrator/AP system clock on the base board can only
103 * access the low eight bits of the v PLL divider. Bit 8 is tied low
104 * and always zero, r is hardwired to 46, and the output divider is
105 * hardwired to 3 (divide by 4) according to the document
106 * "Integrator AP ASIC Development Motherboard" ARM DUI 0098B,
109 if (icst
->ctype
== ICST_INTEGRATOR_AP_SYS
) {
110 vco
->v
= val
& INTEGRATOR_AP_SYS_BITS
;
117 * The Integrator/AP PCI clock is using an odd pattern to create
118 * the child clock, basically a single bit called DIVX/Y is used
119 * to select between two different hardwired values: setting the
120 * bit to 0 yields v = 17, r = 22 and OD = 1, whereas setting the
121 * bit to 1 yields v = 14, r = 14 and OD = 1 giving the frequencies
122 * 33 or 25 MHz respectively.
124 if (icst
->ctype
== ICST_INTEGRATOR_AP_PCI
) {
125 bool divxy
= !!(val
& INTEGRATOR_AP_PCI_25_33_MHZ
);
127 vco
->v
= divxy
? 17 : 14;
128 vco
->r
= divxy
? 22 : 14;
134 * The Integrator/CP core clock can access the low eight bits
135 * of the v PLL divider. Bit 8 is tied low and always zero,
136 * r is hardwired to 22 and the output divider s is accessible
137 * in bits 8 thru 10 according to the document
138 * "Integrator/CM940T, CM920T, CM740T, and CM720T User Guide"
139 * ARM DUI 0157A, page 3-20 thru 3-23 and 4-10.
141 if (icst
->ctype
== ICST_INTEGRATOR_CP_CM_CORE
) {
144 vco
->s
= (val
>> 8) & 7;
148 if (icst
->ctype
== ICST_INTEGRATOR_CP_CM_MEM
) {
149 vco
->v
= (val
>> 12) & 0xFF;
151 vco
->s
= (val
>> 20) & 7;
155 vco
->v
= val
& 0x1ff;
156 vco
->r
= (val
>> 9) & 0x7f;
157 vco
->s
= (val
>> 16) & 03;
162 * vco_set() - commit changes to an ICST VCO
163 * @icst: the ICST clock to set
164 * @vco: the VCO struct to set the changes from
166 static int vco_set(struct clk_icst
*icst
, struct icst_vco vco
)
172 /* Mask the bits used by the VCO */
173 switch (icst
->ctype
) {
174 case ICST_INTEGRATOR_AP_CM
:
175 mask
= INTEGRATOR_AP_CM_BITS
;
178 pr_err("ICST error: tried to set bit 8 of VDW\n");
180 pr_err("ICST error: tried to use VOD != 1\n");
182 pr_err("ICST error: tried to use RDW != 22\n");
184 case ICST_INTEGRATOR_AP_SYS
:
185 mask
= INTEGRATOR_AP_SYS_BITS
;
188 pr_err("ICST error: tried to set bit 8 of VDW\n");
190 pr_err("ICST error: tried to use VOD != 1\n");
192 pr_err("ICST error: tried to use RDW != 22\n");
194 case ICST_INTEGRATOR_CP_CM_CORE
:
195 mask
= INTEGRATOR_CP_CM_CORE_BITS
; /* Uses 12 bits */
196 val
= (vco
.v
& 0xFF) | vco
.s
<< 8;
198 pr_err("ICST error: tried to set bit 8 of VDW\n");
200 pr_err("ICST error: tried to use RDW != 22\n");
202 case ICST_INTEGRATOR_CP_CM_MEM
:
203 mask
= INTEGRATOR_CP_CM_MEM_BITS
; /* Uses 12 bits */
204 val
= ((vco
.v
& 0xFF) << 12) | (vco
.s
<< 20);
206 pr_err("ICST error: tried to set bit 8 of VDW\n");
208 pr_err("ICST error: tried to use RDW != 22\n");
211 /* Regular auxilary oscillator */
212 mask
= VERSATILE_AUX_OSC_BITS
;
213 val
= vco
.v
| (vco
.r
<< 9) | (vco
.s
<< 16);
217 pr_debug("ICST: new val = 0x%08x\n", val
);
219 /* This magic unlocks the VCO so it can be controlled */
220 ret
= regmap_write(icst
->map
, icst
->lockreg_off
, VERSATILE_LOCK_VAL
);
223 ret
= regmap_update_bits(icst
->map
, icst
->vcoreg_off
, mask
, val
);
226 /* This locks the VCO again */
227 ret
= regmap_write(icst
->map
, icst
->lockreg_off
, 0);
233 static unsigned long icst_recalc_rate(struct clk_hw
*hw
,
234 unsigned long parent_rate
)
236 struct clk_icst
*icst
= to_icst(hw
);
241 icst
->params
->ref
= parent_rate
;
242 ret
= vco_get(icst
, &vco
);
244 pr_err("ICST: could not get VCO setting\n");
247 icst
->rate
= icst_hz(icst
->params
, vco
);
251 static long icst_round_rate(struct clk_hw
*hw
, unsigned long rate
,
252 unsigned long *prate
)
254 struct clk_icst
*icst
= to_icst(hw
);
257 if (icst
->ctype
== ICST_INTEGRATOR_AP_CM
||
258 icst
->ctype
== ICST_INTEGRATOR_CP_CM_CORE
) {
259 if (rate
<= 12000000)
261 if (rate
>= 160000000)
263 /* Slam to closest megahertz */
264 return DIV_ROUND_CLOSEST(rate
, 1000000) * 1000000;
267 if (icst
->ctype
== ICST_INTEGRATOR_CP_CM_MEM
) {
270 if (rate
>= 66000000)
272 /* Slam to closest 0.5 megahertz */
273 return DIV_ROUND_CLOSEST(rate
, 500000) * 500000;
276 if (icst
->ctype
== ICST_INTEGRATOR_AP_SYS
) {
277 /* Divides between 3 and 50 MHz in steps of 0.25 MHz */
280 if (rate
>= 50000000)
282 /* Slam to closest 0.25 MHz */
283 return DIV_ROUND_CLOSEST(rate
, 250000) * 250000;
286 if (icst
->ctype
== ICST_INTEGRATOR_AP_PCI
) {
288 * If we're below or less than halfway from 25 to 33 MHz
291 if (rate
<= 25000000 || rate
< 29000000)
293 /* Else just return the default frequency */
297 vco
= icst_hz_to_vco(icst
->params
, rate
);
298 return icst_hz(icst
->params
, vco
);
301 static int icst_set_rate(struct clk_hw
*hw
, unsigned long rate
,
302 unsigned long parent_rate
)
304 struct clk_icst
*icst
= to_icst(hw
);
307 if (icst
->ctype
== ICST_INTEGRATOR_AP_PCI
) {
308 /* This clock is especially primitive */
312 if (rate
== 25000000) {
314 } else if (rate
== 33000000) {
315 val
= INTEGRATOR_AP_PCI_25_33_MHZ
;
317 pr_err("ICST: cannot set PCI frequency %lu\n",
321 ret
= regmap_write(icst
->map
, icst
->lockreg_off
,
325 ret
= regmap_update_bits(icst
->map
, icst
->vcoreg_off
,
326 INTEGRATOR_AP_PCI_25_33_MHZ
,
330 /* This locks the VCO again */
331 ret
= regmap_write(icst
->map
, icst
->lockreg_off
, 0);
338 icst
->params
->ref
= parent_rate
;
339 vco
= icst_hz_to_vco(icst
->params
, rate
);
340 icst
->rate
= icst_hz(icst
->params
, vco
);
341 return vco_set(icst
, vco
);
344 static const struct clk_ops icst_ops
= {
345 .recalc_rate
= icst_recalc_rate
,
346 .round_rate
= icst_round_rate
,
347 .set_rate
= icst_set_rate
,
350 static struct clk
*icst_clk_setup(struct device
*dev
,
351 const struct clk_icst_desc
*desc
,
353 const char *parent_name
,
355 enum icst_control_type ctype
)
358 struct clk_icst
*icst
;
359 struct clk_init_data init
;
360 struct icst_params
*pclone
;
362 icst
= kzalloc(sizeof(*icst
), GFP_KERNEL
);
364 return ERR_PTR(-ENOMEM
);
366 pclone
= kmemdup(desc
->params
, sizeof(*pclone
), GFP_KERNEL
);
369 return ERR_PTR(-ENOMEM
);
373 init
.ops
= &icst_ops
;
375 init
.parent_names
= (parent_name
? &parent_name
: NULL
);
376 init
.num_parents
= (parent_name
? 1 : 0);
378 icst
->hw
.init
= &init
;
379 icst
->params
= pclone
;
380 icst
->vcoreg_off
= desc
->vco_offset
;
381 icst
->lockreg_off
= desc
->lock_offset
;
384 clk
= clk_register(dev
, &icst
->hw
);
393 struct clk
*icst_clk_register(struct device
*dev
,
394 const struct clk_icst_desc
*desc
,
396 const char *parent_name
,
399 struct regmap_config icst_regmap_conf
= {
406 map
= regmap_init_mmio(dev
, base
, &icst_regmap_conf
);
408 pr_err("could not initialize ICST regmap\n");
409 return ERR_CAST(map
);
411 return icst_clk_setup(dev
, desc
, name
, parent_name
, map
,
414 EXPORT_SYMBOL_GPL(icst_clk_register
);
418 * In a device tree, an memory-mapped ICST clock appear as a child
419 * of a syscon node. Assume this and probe it only as a child of a
423 static const struct icst_params icst525_params
= {
424 .vco_max
= ICST525_VCO_MAX_5V
,
425 .vco_min
= ICST525_VCO_MIN
,
430 .s2div
= icst525_s2div
,
431 .idx2s
= icst525_idx2s
,
434 static const struct icst_params icst307_params
= {
435 .vco_max
= ICST307_VCO_MAX
,
436 .vco_min
= ICST307_VCO_MIN
,
441 .s2div
= icst307_s2div
,
442 .idx2s
= icst307_idx2s
,
446 * The core modules on the Integrator/AP and Integrator/CP have
447 * especially crippled ICST525 control.
449 static const struct icst_params icst525_apcp_cm_params
= {
450 .vco_max
= ICST525_VCO_MAX_5V
,
451 .vco_min
= ICST525_VCO_MIN
,
452 /* Minimum 12 MHz, VDW = 4 */
455 * Maximum 160 MHz, VDW = 152 for all core modules, but
456 * CM926EJ-S, CM1026EJ-S and CM1136JF-S can actually
457 * go to 200 MHz (max VDW = 192).
460 /* r is hardcoded to 22 and this is the actual divisor, +2 */
463 .s2div
= icst525_s2div
,
464 .idx2s
= icst525_idx2s
,
467 static const struct icst_params icst525_ap_sys_params
= {
468 .vco_max
= ICST525_VCO_MAX_5V
,
469 .vco_min
= ICST525_VCO_MIN
,
470 /* Minimum 3 MHz, VDW = 4 */
472 /* Maximum 50 MHz, VDW = 192 */
474 /* r is hardcoded to 46 and this is the actual divisor, +2 */
477 .s2div
= icst525_s2div
,
478 .idx2s
= icst525_idx2s
,
481 static const struct icst_params icst525_ap_pci_params
= {
482 .vco_max
= ICST525_VCO_MAX_5V
,
483 .vco_min
= ICST525_VCO_MIN
,
488 /* r is hardcoded to 14 or 22 and this is the actual divisors +2 */
491 .s2div
= icst525_s2div
,
492 .idx2s
= icst525_idx2s
,
495 static void __init
of_syscon_icst_setup(struct device_node
*np
)
497 struct device_node
*parent
;
499 struct clk_icst_desc icst_desc
;
500 const char *name
= np
->name
;
501 const char *parent_name
;
503 enum icst_control_type ctype
;
505 /* We do not release this reference, we are using it perpetually */
506 parent
= of_get_parent(np
);
508 pr_err("no parent node for syscon ICST clock\n");
511 map
= syscon_node_to_regmap(parent
);
513 pr_err("no regmap for syscon ICST clock parent\n");
517 if (of_property_read_u32(np
, "vco-offset", &icst_desc
.vco_offset
)) {
518 pr_err("no VCO register offset for ICST clock\n");
521 if (of_property_read_u32(np
, "lock-offset", &icst_desc
.lock_offset
)) {
522 pr_err("no lock register offset for ICST clock\n");
526 if (of_device_is_compatible(np
, "arm,syscon-icst525")) {
527 icst_desc
.params
= &icst525_params
;
528 ctype
= ICST_VERSATILE
;
529 } else if (of_device_is_compatible(np
, "arm,syscon-icst307")) {
530 icst_desc
.params
= &icst307_params
;
531 ctype
= ICST_VERSATILE
;
532 } else if (of_device_is_compatible(np
, "arm,syscon-icst525-integratorap-cm")) {
533 icst_desc
.params
= &icst525_apcp_cm_params
;
534 ctype
= ICST_INTEGRATOR_AP_CM
;
535 } else if (of_device_is_compatible(np
, "arm,syscon-icst525-integratorap-sys")) {
536 icst_desc
.params
= &icst525_ap_sys_params
;
537 ctype
= ICST_INTEGRATOR_AP_SYS
;
538 } else if (of_device_is_compatible(np
, "arm,syscon-icst525-integratorap-pci")) {
539 icst_desc
.params
= &icst525_ap_pci_params
;
540 ctype
= ICST_INTEGRATOR_AP_PCI
;
541 } else if (of_device_is_compatible(np
, "arm,syscon-icst525-integratorcp-cm-core")) {
542 icst_desc
.params
= &icst525_apcp_cm_params
;
543 ctype
= ICST_INTEGRATOR_CP_CM_CORE
;
544 } else if (of_device_is_compatible(np
, "arm,syscon-icst525-integratorcp-cm-mem")) {
545 icst_desc
.params
= &icst525_apcp_cm_params
;
546 ctype
= ICST_INTEGRATOR_CP_CM_MEM
;
548 pr_err("unknown ICST clock %s\n", name
);
552 /* Parent clock name is not the same as node parent */
553 parent_name
= of_clk_get_parent_name(np
, 0);
555 regclk
= icst_clk_setup(NULL
, &icst_desc
, name
, parent_name
, map
, ctype
);
556 if (IS_ERR(regclk
)) {
557 pr_err("error setting up syscon ICST clock %s\n", name
);
560 of_clk_add_provider(np
, of_clk_src_simple_get
, regclk
);
561 pr_debug("registered syscon ICST clock %s\n", name
);
564 CLK_OF_DECLARE(arm_syscon_icst525_clk
,
565 "arm,syscon-icst525", of_syscon_icst_setup
);
566 CLK_OF_DECLARE(arm_syscon_icst307_clk
,
567 "arm,syscon-icst307", of_syscon_icst_setup
);
568 CLK_OF_DECLARE(arm_syscon_integratorap_cm_clk
,
569 "arm,syscon-icst525-integratorap-cm", of_syscon_icst_setup
);
570 CLK_OF_DECLARE(arm_syscon_integratorap_sys_clk
,
571 "arm,syscon-icst525-integratorap-sys", of_syscon_icst_setup
);
572 CLK_OF_DECLARE(arm_syscon_integratorap_pci_clk
,
573 "arm,syscon-icst525-integratorap-pci", of_syscon_icst_setup
);
574 CLK_OF_DECLARE(arm_syscon_integratorcp_cm_core_clk
,
575 "arm,syscon-icst525-integratorcp-cm-core", of_syscon_icst_setup
);
576 CLK_OF_DECLARE(arm_syscon_integratorcp_cm_mem_clk
,
577 "arm,syscon-icst525-integratorcp-cm-mem", of_syscon_icst_setup
);