3 bool "Hardware crypto devices"
6 Say Y here to get to see options for hardware crypto devices and
7 processors. This option alone does not add any kernel code.
9 If you say N, all options in this submenu will be skipped and disabled.
13 config CRYPTO_DEV_PADLOCK
14 tristate "Support for VIA PadLock ACE"
15 depends on X86 && !UML
17 Some VIA processors come with an integrated crypto engine
18 (so called VIA PadLock ACE, Advanced Cryptography Engine)
19 that provides instructions for very fast cryptographic
20 operations with supported algorithms.
22 The instructions are used only when the CPU supports them.
23 Otherwise software encryption is used.
25 config CRYPTO_DEV_PADLOCK_AES
26 tristate "PadLock driver for AES algorithm"
27 depends on CRYPTO_DEV_PADLOCK
28 select CRYPTO_BLKCIPHER
31 Use VIA PadLock for AES algorithm.
33 Available in VIA C3 and newer CPUs.
35 If unsure say M. The compiled module will be
38 config CRYPTO_DEV_PADLOCK_SHA
39 tristate "PadLock driver for SHA1 and SHA256 algorithms"
40 depends on CRYPTO_DEV_PADLOCK
45 Use VIA PadLock for SHA1/SHA256 algorithms.
47 Available in VIA C7 and newer processors.
49 If unsure say M. The compiled module will be
52 config CRYPTO_DEV_GEODE
53 tristate "Support for the Geode LX AES engine"
54 depends on X86_32 && PCI
56 select CRYPTO_BLKCIPHER
58 Say 'Y' here to use the AMD Geode LX processor on-board AES
59 engine for the CryptoAPI AES algorithm.
61 To compile this driver as a module, choose M here: the module
62 will be called geode-aes.
65 tristate "Support for s390 cryptographic adapters"
69 Select this option if you want to enable support for
70 s390 cryptographic adapters like:
71 + PCI-X Cryptographic Coprocessor (PCIXCC)
72 + Crypto Express 2,3,4 or 5 Coprocessor (CEXxC)
73 + Crypto Express 2,3,4 or 5 Accelerator (CEXxA)
74 + Crypto Express 4 or 5 EP11 Coprocessor (CEXxP)
77 tristate "Kernel API for protected key handling"
81 With this option enabled the pkey kernel module provides an API
82 for creation and handling of protected keys. Other parts of the
83 kernel or userspace applications may use these functions.
85 Select this option if you want to enable the kernel and userspace
86 API for proteced key handling.
88 Please note that creation of protected keys from secure keys
89 requires to have at least one CEX card in coprocessor mode
92 config CRYPTO_PAES_S390
93 tristate "PAES cipher algorithms"
98 select CRYPTO_BLKCIPHER
100 This is the s390 hardware accelerated implementation of the
101 AES cipher algorithms for use with protected key.
103 Select this option if you want to use the paes cipher
104 for example to use protected key encrypted devices.
106 config CRYPTO_SHA1_S390
107 tristate "SHA1 digest algorithm"
111 This is the s390 hardware accelerated implementation of the
112 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
114 It is available as of z990.
116 config CRYPTO_SHA256_S390
117 tristate "SHA256 digest algorithm"
121 This is the s390 hardware accelerated implementation of the
122 SHA256 secure hash standard (DFIPS 180-2).
124 It is available as of z9.
126 config CRYPTO_SHA512_S390
127 tristate "SHA384 and SHA512 digest algorithm"
131 This is the s390 hardware accelerated implementation of the
132 SHA512 secure hash standard.
134 It is available as of z10.
136 config CRYPTO_DES_S390
137 tristate "DES and Triple DES cipher algorithms"
140 select CRYPTO_BLKCIPHER
143 This is the s390 hardware accelerated implementation of the
144 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
146 As of z990 the ECB and CBC mode are hardware accelerated.
147 As of z196 the CTR mode is hardware accelerated.
149 config CRYPTO_AES_S390
150 tristate "AES cipher algorithms"
153 select CRYPTO_BLKCIPHER
155 This is the s390 hardware accelerated implementation of the
156 AES cipher algorithms (FIPS-197).
158 As of z9 the ECB and CBC modes are hardware accelerated
160 As of z10 the ECB and CBC modes are hardware accelerated
161 for all AES key sizes.
162 As of z196 the CTR mode is hardware accelerated for all AES
163 key sizes and XTS mode is hardware accelerated for 256 and
167 tristate "Pseudo random number generator device driver"
171 Select this option if you want to use the s390 pseudo random number
172 generator. The PRNG is part of the cryptographic processor functions
173 and uses triple-DES to generate secure random numbers like the
174 ANSI X9.17 standard. User-space programs access the
175 pseudo-random-number device through the char device /dev/prandom.
177 It is available as of z9.
179 config CRYPTO_GHASH_S390
180 tristate "GHASH digest algorithm"
184 This is the s390 hardware accelerated implementation of the
185 GHASH message digest algorithm for GCM (Galois/Counter Mode).
187 It is available as of z196.
189 config CRYPTO_CRC32_S390
190 tristate "CRC-32 algorithms"
195 Select this option if you want to use hardware accelerated
196 implementations of CRC algorithms. With this option, you
197 can optimize the computation of CRC-32 (IEEE 802.3 Ethernet)
198 and CRC-32C (Castagnoli).
200 It is available with IBM z13 or later.
202 config CRYPTO_DEV_MARVELL_CESA
203 tristate "Marvell's Cryptographic Engine driver"
204 depends on PLAT_ORION || ARCH_MVEBU
207 select CRYPTO_BLKCIPHER
211 This driver allows you to utilize the Cryptographic Engines and
212 Security Accelerator (CESA) which can be found on MVEBU and ORION
214 This driver supports CPU offload through DMA transfers.
216 config CRYPTO_DEV_NIAGARA2
217 tristate "Niagara2 Stream Processing Unit driver"
219 select CRYPTO_BLKCIPHER
226 Each core of a Niagara2 processor contains a Stream
227 Processing Unit, which itself contains several cryptographic
228 sub-units. One set provides the Modular Arithmetic Unit,
229 used for SSL offload. The other set provides the Cipher
230 Group, which can perform encryption, decryption, hashing,
231 checksumming, and raw copies.
233 config CRYPTO_DEV_HIFN_795X
234 tristate "Driver HIFN 795x crypto accelerator chips"
236 select CRYPTO_BLKCIPHER
237 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
239 depends on !ARCH_DMA_ADDR_T_64BIT
241 This option allows you to have support for HIFN 795x crypto adapters.
243 config CRYPTO_DEV_HIFN_795X_RNG
244 bool "HIFN 795x random number generator"
245 depends on CRYPTO_DEV_HIFN_795X
247 Select this option if you want to enable the random number generator
248 on the HIFN 795x crypto adapters.
250 source drivers/crypto/caam/Kconfig
252 config CRYPTO_DEV_TALITOS
253 tristate "Talitos Freescale Security Engine (SEC)"
255 select CRYPTO_AUTHENC
256 select CRYPTO_BLKCIPHER
261 Say 'Y' here to use the Freescale Security Engine (SEC)
262 to offload cryptographic algorithm computation.
264 The Freescale SEC is present on PowerQUICC 'E' processors, such
265 as the MPC8349E and MPC8548E.
267 To compile this driver as a module, choose M here: the module
268 will be called talitos.
270 config CRYPTO_DEV_TALITOS1
271 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
272 depends on CRYPTO_DEV_TALITOS
273 depends on PPC_8xx || PPC_82xx
276 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
277 found on MPC82xx or the Freescale Security Engine (SEC Lite)
278 version 1.2 found on MPC8xx
280 config CRYPTO_DEV_TALITOS2
281 bool "SEC2+ (SEC version 2.0 or upper)"
282 depends on CRYPTO_DEV_TALITOS
283 default y if !PPC_8xx
285 Say 'Y' here to use the Freescale Security Engine (SEC)
286 version 2 and following as found on MPC83xx, MPC85xx, etc ...
288 config CRYPTO_DEV_IXP4XX
289 tristate "Driver for IXP4xx crypto hardware acceleration"
290 depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
293 select CRYPTO_AUTHENC
294 select CRYPTO_BLKCIPHER
296 Driver for the IXP4xx NPE crypto engine.
298 config CRYPTO_DEV_PPC4XX
299 tristate "Driver AMCC PPC4xx crypto accelerator"
300 depends on PPC && 4xx
306 select CRYPTO_BLKCIPHER
308 This option allows you to have support for AMCC crypto acceleration.
310 config HW_RANDOM_PPC4XX
311 bool "PowerPC 4xx generic true random number generator support"
312 depends on CRYPTO_DEV_PPC4XX && HW_RANDOM
315 This option provides the kernel-side support for the TRNG hardware
316 found in the security function of some PowerPC 4xx SoCs.
318 config CRYPTO_DEV_OMAP
319 tristate "Support for OMAP crypto HW accelerators"
320 depends on ARCH_OMAP2PLUS
322 OMAP processors have various crypto HW accelerators. Select this if
323 you want to use the OMAP modules for any of the crypto algorithms.
327 config CRYPTO_DEV_OMAP_SHAM
328 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
329 depends on ARCH_OMAP2PLUS
336 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
337 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
339 config CRYPTO_DEV_OMAP_AES
340 tristate "Support for OMAP AES hw engine"
341 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
343 select CRYPTO_BLKCIPHER
350 OMAP processors have AES module accelerator. Select this if you
351 want to use the OMAP module for AES algorithms.
353 config CRYPTO_DEV_OMAP_DES
354 tristate "Support for OMAP DES/3DES hw engine"
355 depends on ARCH_OMAP2PLUS
357 select CRYPTO_BLKCIPHER
360 OMAP processors have DES/3DES module accelerator. Select this if you
361 want to use the OMAP module for DES and 3DES algorithms. Currently
362 the ECB and CBC modes of operation are supported by the driver. Also
363 accesses made on unaligned boundaries are supported.
365 endif # CRYPTO_DEV_OMAP
367 config CRYPTO_DEV_PICOXCELL
368 tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
369 depends on (ARCH_PICOXCELL || COMPILE_TEST) && HAVE_CLK
372 select CRYPTO_AUTHENC
373 select CRYPTO_BLKCIPHER
379 This option enables support for the hardware offload engines in the
380 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
381 and for 3gpp Layer 2 ciphering support.
383 Saying m here will build a module named pipcoxcell_crypto.
385 config CRYPTO_DEV_SAHARA
386 tristate "Support for SAHARA crypto accelerator"
387 depends on ARCH_MXC && OF
388 select CRYPTO_BLKCIPHER
392 This option enables support for the SAHARA HW crypto accelerator
393 found in some Freescale i.MX chips.
395 config CRYPTO_DEV_MXC_SCC
396 tristate "Support for Freescale Security Controller (SCC)"
397 depends on ARCH_MXC && OF
398 select CRYPTO_BLKCIPHER
401 This option enables support for the Security Controller (SCC)
402 found in Freescale i.MX25 chips.
404 config CRYPTO_DEV_EXYNOS_RNG
405 tristate "EXYNOS HW pseudo random number generator support"
406 depends on ARCH_EXYNOS || COMPILE_TEST
410 This driver provides kernel-side support through the
411 cryptographic API for the pseudo random number generator hardware
412 found on Exynos SoCs.
414 To compile this driver as a module, choose M here: the
415 module will be called exynos-rng.
419 config CRYPTO_DEV_S5P
420 tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
421 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
422 depends on HAS_IOMEM && HAS_DMA
424 select CRYPTO_BLKCIPHER
426 This option allows you to have support for S5P crypto acceleration.
427 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
428 algorithms execution.
430 config CRYPTO_DEV_EXYNOS_HASH
431 bool "Support for Samsung Exynos HASH accelerator"
432 depends on CRYPTO_DEV_S5P
433 depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m
438 Select this to offload Exynos from HASH MD5/SHA1/SHA256.
439 This will select software SHA1, MD5 and SHA256 as they are
440 needed for small and zero-size messages.
441 HASH algorithms will be disabled if EXYNOS_RNG
442 is enabled due to hw conflict.
445 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
448 This enables support for the NX hardware cryptographic accelerator
449 coprocessor that is in IBM PowerPC P7+ or later processors. This
450 does not actually enable any drivers, it only allows you to select
451 which acceleration type (encryption and/or compression) to enable.
454 source "drivers/crypto/nx/Kconfig"
457 config CRYPTO_DEV_UX500
458 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
459 depends on ARCH_U8500
461 Driver for ST-Ericsson UX500 crypto engine.
464 source "drivers/crypto/ux500/Kconfig"
465 endif # if CRYPTO_DEV_UX500
467 config CRYPTO_DEV_BFIN_CRC
468 tristate "Support for Blackfin CRC hardware"
471 Newer Blackfin processors have CRC hardware. Select this if you
472 want to use the Blackfin CRC module.
474 config CRYPTO_DEV_ATMEL_AUTHENC
475 tristate "Support for Atmel IPSEC/SSL hw accelerator"
477 depends on ARCH_AT91 || COMPILE_TEST
478 select CRYPTO_AUTHENC
479 select CRYPTO_DEV_ATMEL_AES
480 select CRYPTO_DEV_ATMEL_SHA
482 Some Atmel processors can combine the AES and SHA hw accelerators
483 to enhance support of IPSEC/SSL.
484 Select this if you want to use the Atmel modules for
485 authenc(hmac(shaX),Y(cbc)) algorithms.
487 config CRYPTO_DEV_ATMEL_AES
488 tristate "Support for Atmel AES hw accelerator"
490 depends on ARCH_AT91 || COMPILE_TEST
493 select CRYPTO_BLKCIPHER
495 Some Atmel processors have AES hw accelerator.
496 Select this if you want to use the Atmel module for
499 To compile this driver as a module, choose M here: the module
500 will be called atmel-aes.
502 config CRYPTO_DEV_ATMEL_TDES
503 tristate "Support for Atmel DES/TDES hw accelerator"
505 depends on ARCH_AT91 || COMPILE_TEST
507 select CRYPTO_BLKCIPHER
509 Some Atmel processors have DES/TDES hw accelerator.
510 Select this if you want to use the Atmel module for
513 To compile this driver as a module, choose M here: the module
514 will be called atmel-tdes.
516 config CRYPTO_DEV_ATMEL_SHA
517 tristate "Support for Atmel SHA hw accelerator"
519 depends on ARCH_AT91 || COMPILE_TEST
522 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
524 Select this if you want to use the Atmel module for
525 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
527 To compile this driver as a module, choose M here: the module
528 will be called atmel-sha.
530 config CRYPTO_DEV_ATMEL_ECC
531 tristate "Support for Microchip / Atmel ECC hw accelerator"
532 depends on ARCH_AT91 || COMPILE_TEST
537 Microhip / Atmel ECC hw accelerator.
538 Select this if you want to use the Microchip / Atmel module for
541 To compile this driver as a module, choose M here: the module
542 will be called atmel-ecc.
544 config CRYPTO_DEV_CCP
545 bool "Support for AMD Secure Processor"
546 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
548 The AMD Secure Processor provides support for the Cryptographic Coprocessor
549 (CCP) and the Platform Security Processor (PSP) devices.
552 source "drivers/crypto/ccp/Kconfig"
555 config CRYPTO_DEV_MXS_DCP
556 tristate "Support for Freescale MXS DCP"
557 depends on (ARCH_MXS || ARCH_MXC)
562 select CRYPTO_BLKCIPHER
565 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
566 co-processor on the die.
568 To compile this driver as a module, choose M here: the module
569 will be called mxs-dcp.
571 source "drivers/crypto/qat/Kconfig"
572 source "drivers/crypto/cavium/cpt/Kconfig"
573 source "drivers/crypto/cavium/nitrox/Kconfig"
575 config CRYPTO_DEV_CAVIUM_ZIP
576 tristate "Cavium ZIP driver"
577 depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
579 Select this option if you want to enable compression/decompression
580 acceleration on Cavium's ARM based SoCs
582 config CRYPTO_DEV_QCE
583 tristate "Qualcomm crypto engine accelerator"
584 depends on (ARCH_QCOM || COMPILE_TEST) && HAS_DMA && HAS_IOMEM
591 select CRYPTO_BLKCIPHER
593 This driver supports Qualcomm crypto engine accelerator
594 hardware. To compile this driver as a module, choose M here. The
595 module will be called qcrypto.
597 config CRYPTO_DEV_VMX
598 bool "Support for VMX cryptographic acceleration instructions"
599 depends on PPC64 && VSX
601 Support for VMX cryptographic acceleration instructions.
603 source "drivers/crypto/vmx/Kconfig"
605 config CRYPTO_DEV_IMGTEC_HASH
606 tristate "Imagination Technologies hardware hash accelerator"
607 depends on MIPS || COMPILE_TEST
614 This driver interfaces with the Imagination Technologies
615 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
618 config CRYPTO_DEV_SUN4I_SS
619 tristate "Support for Allwinner Security System cryptographic accelerator"
620 depends on ARCH_SUNXI && !64BIT
625 select CRYPTO_BLKCIPHER
627 Some Allwinner SoC have a crypto accelerator named
628 Security System. Select this if you want to use it.
629 The Security System handle AES/DES/3DES ciphers in CBC mode
630 and SHA1 and MD5 hash algorithms.
632 To compile this driver as a module, choose M here: the module
633 will be called sun4i-ss.
635 config CRYPTO_DEV_SUN4I_SS_PRNG
636 bool "Support for Allwinner Security System PRNG"
637 depends on CRYPTO_DEV_SUN4I_SS
640 Select this option if you want to provide kernel-side support for
641 the Pseudo-Random Number Generator found in the Security System.
643 config CRYPTO_DEV_ROCKCHIP
644 tristate "Rockchip's Cryptographic Engine driver"
645 depends on OF && ARCH_ROCKCHIP
652 select CRYPTO_BLKCIPHER
655 This driver interfaces with the hardware crypto accelerator.
656 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
658 config CRYPTO_DEV_MEDIATEK
659 tristate "MediaTek's EIP97 Cryptographic Engine driver"
661 depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST
664 select CRYPTO_BLKCIPHER
671 This driver allows you to utilize the hardware crypto accelerator
672 EIP97 which can be found on the MT7623 MT2701, MT8521p, etc ....
673 Select this if you want to use it for AES/SHA1/SHA2 algorithms.
675 source "drivers/crypto/chelsio/Kconfig"
677 source "drivers/crypto/virtio/Kconfig"
679 config CRYPTO_DEV_BCM_SPU
680 tristate "Broadcom symmetric crypto/hash acceleration support"
681 depends on ARCH_BCM_IPROC
690 This driver provides support for Broadcom crypto acceleration using the
691 Secure Processing Unit (SPU). The SPU driver registers ablkcipher,
692 ahash, and aead algorithms with the kernel cryptographic API.
694 source "drivers/crypto/stm32/Kconfig"
696 config CRYPTO_DEV_SAFEXCEL
697 tristate "Inside Secure's SafeXcel cryptographic engine driver"
698 depends on HAS_DMA && OF
699 depends on (ARM64 && ARCH_MVEBU) || (COMPILE_TEST && 64BIT)
701 select CRYPTO_BLKCIPHER
708 This driver interfaces with the SafeXcel EIP-197 cryptographic engine
709 designed by Inside Secure. Select this if you want to use CBC/ECB
710 chain mode, AES cipher mode and SHA1/SHA224/SHA256/SHA512 hash
713 config CRYPTO_DEV_ARTPEC6
714 tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
715 depends on ARM && (ARCH_ARTPEC || COMPILE_TEST)
721 select CRYPTO_BLKCIPHER
728 Enables the driver for the on-chip crypto accelerator
731 To compile this driver as a module, choose M here.