4 * Copyright (C) 2013-2015 Altera Corporation
5 * Copyright (C) 2017 Intel Corporation
7 * With code from the mailing list:
8 * Copyright (C) 2013 Xilinx, Inc.
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms and conditions of the GNU General Public License,
12 * version 2, as published by the Free Software Foundation.
14 * This program is distributed in the hope it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
22 #include <linux/firmware.h>
23 #include <linux/fpga/fpga-mgr.h>
24 #include <linux/idr.h>
25 #include <linux/module.h>
27 #include <linux/mutex.h>
28 #include <linux/slab.h>
29 #include <linux/scatterlist.h>
30 #include <linux/highmem.h>
32 static DEFINE_IDA(fpga_mgr_ida
);
33 static struct class *fpga_mgr_class
;
35 struct fpga_image_info
*fpga_image_info_alloc(struct device
*dev
)
37 struct fpga_image_info
*info
;
41 info
= devm_kzalloc(dev
, sizeof(*info
), GFP_KERNEL
);
51 EXPORT_SYMBOL_GPL(fpga_image_info_alloc
);
53 void fpga_image_info_free(struct fpga_image_info
*info
)
61 if (info
->firmware_name
)
62 devm_kfree(dev
, info
->firmware_name
);
64 devm_kfree(dev
, info
);
67 EXPORT_SYMBOL_GPL(fpga_image_info_free
);
70 * Call the low level driver's write_init function. This will do the
71 * device-specific things to get the FPGA into the state where it is ready to
72 * receive an FPGA image. The low level driver only gets to see the first
73 * initial_header_size bytes in the buffer.
75 static int fpga_mgr_write_init_buf(struct fpga_manager
*mgr
,
76 struct fpga_image_info
*info
,
77 const char *buf
, size_t count
)
81 mgr
->state
= FPGA_MGR_STATE_WRITE_INIT
;
82 if (!mgr
->mops
->initial_header_size
)
83 ret
= mgr
->mops
->write_init(mgr
, info
, NULL
, 0);
85 ret
= mgr
->mops
->write_init(
86 mgr
, info
, buf
, min(mgr
->mops
->initial_header_size
, count
));
89 dev_err(&mgr
->dev
, "Error preparing FPGA for writing\n");
90 mgr
->state
= FPGA_MGR_STATE_WRITE_INIT_ERR
;
97 static int fpga_mgr_write_init_sg(struct fpga_manager
*mgr
,
98 struct fpga_image_info
*info
,
101 struct sg_mapping_iter miter
;
106 if (!mgr
->mops
->initial_header_size
)
107 return fpga_mgr_write_init_buf(mgr
, info
, NULL
, 0);
110 * First try to use miter to map the first fragment to access the
111 * header, this is the typical path.
113 sg_miter_start(&miter
, sgt
->sgl
, sgt
->nents
, SG_MITER_FROM_SG
);
114 if (sg_miter_next(&miter
) &&
115 miter
.length
>= mgr
->mops
->initial_header_size
) {
116 ret
= fpga_mgr_write_init_buf(mgr
, info
, miter
.addr
,
118 sg_miter_stop(&miter
);
121 sg_miter_stop(&miter
);
123 /* Otherwise copy the fragments into temporary memory. */
124 buf
= kmalloc(mgr
->mops
->initial_header_size
, GFP_KERNEL
);
128 len
= sg_copy_to_buffer(sgt
->sgl
, sgt
->nents
, buf
,
129 mgr
->mops
->initial_header_size
);
130 ret
= fpga_mgr_write_init_buf(mgr
, info
, buf
, len
);
138 * After all the FPGA image has been written, do the device specific steps to
139 * finish and set the FPGA into operating mode.
141 static int fpga_mgr_write_complete(struct fpga_manager
*mgr
,
142 struct fpga_image_info
*info
)
146 mgr
->state
= FPGA_MGR_STATE_WRITE_COMPLETE
;
147 ret
= mgr
->mops
->write_complete(mgr
, info
);
149 dev_err(&mgr
->dev
, "Error after writing image data to FPGA\n");
150 mgr
->state
= FPGA_MGR_STATE_WRITE_COMPLETE_ERR
;
153 mgr
->state
= FPGA_MGR_STATE_OPERATING
;
159 * fpga_mgr_buf_load_sg - load fpga from image in buffer from a scatter list
161 * @info: fpga image specific information
162 * @sgt: scatterlist table
164 * Step the low level fpga manager through the device-specific steps of getting
165 * an FPGA ready to be configured, writing the image to it, then doing whatever
166 * post-configuration steps necessary. This code assumes the caller got the
167 * mgr pointer from of_fpga_mgr_get() or fpga_mgr_get() and checked that it is
170 * This is the preferred entry point for FPGA programming, it does not require
171 * any contiguous kernel memory.
173 * Return: 0 on success, negative error code otherwise.
175 static int fpga_mgr_buf_load_sg(struct fpga_manager
*mgr
,
176 struct fpga_image_info
*info
,
177 struct sg_table
*sgt
)
181 ret
= fpga_mgr_write_init_sg(mgr
, info
, sgt
);
185 /* Write the FPGA image to the FPGA. */
186 mgr
->state
= FPGA_MGR_STATE_WRITE
;
187 if (mgr
->mops
->write_sg
) {
188 ret
= mgr
->mops
->write_sg(mgr
, sgt
);
190 struct sg_mapping_iter miter
;
192 sg_miter_start(&miter
, sgt
->sgl
, sgt
->nents
, SG_MITER_FROM_SG
);
193 while (sg_miter_next(&miter
)) {
194 ret
= mgr
->mops
->write(mgr
, miter
.addr
, miter
.length
);
198 sg_miter_stop(&miter
);
202 dev_err(&mgr
->dev
, "Error while writing image data to FPGA\n");
203 mgr
->state
= FPGA_MGR_STATE_WRITE_ERR
;
207 return fpga_mgr_write_complete(mgr
, info
);
210 static int fpga_mgr_buf_load_mapped(struct fpga_manager
*mgr
,
211 struct fpga_image_info
*info
,
212 const char *buf
, size_t count
)
216 ret
= fpga_mgr_write_init_buf(mgr
, info
, buf
, count
);
221 * Write the FPGA image to the FPGA.
223 mgr
->state
= FPGA_MGR_STATE_WRITE
;
224 ret
= mgr
->mops
->write(mgr
, buf
, count
);
226 dev_err(&mgr
->dev
, "Error while writing image data to FPGA\n");
227 mgr
->state
= FPGA_MGR_STATE_WRITE_ERR
;
231 return fpga_mgr_write_complete(mgr
, info
);
235 * fpga_mgr_buf_load - load fpga from image in buffer
237 * @flags: flags setting fpga confuration modes
238 * @buf: buffer contain fpga image
239 * @count: byte count of buf
241 * Step the low level fpga manager through the device-specific steps of getting
242 * an FPGA ready to be configured, writing the image to it, then doing whatever
243 * post-configuration steps necessary. This code assumes the caller got the
244 * mgr pointer from of_fpga_mgr_get() and checked that it is not an error code.
246 * Return: 0 on success, negative error code otherwise.
248 static int fpga_mgr_buf_load(struct fpga_manager
*mgr
,
249 struct fpga_image_info
*info
,
250 const char *buf
, size_t count
)
260 * This is just a fast path if the caller has already created a
261 * contiguous kernel buffer and the driver doesn't require SG, non-SG
262 * drivers will still work on the slow path.
264 if (mgr
->mops
->write
)
265 return fpga_mgr_buf_load_mapped(mgr
, info
, buf
, count
);
268 * Convert the linear kernel pointer into a sg_table of pages for use
271 nr_pages
= DIV_ROUND_UP((unsigned long)buf
+ count
, PAGE_SIZE
) -
272 (unsigned long)buf
/ PAGE_SIZE
;
273 pages
= kmalloc_array(nr_pages
, sizeof(struct page
*), GFP_KERNEL
);
277 p
= buf
- offset_in_page(buf
);
278 for (index
= 0; index
< nr_pages
; index
++) {
279 if (is_vmalloc_addr(p
))
280 pages
[index
] = vmalloc_to_page(p
);
282 pages
[index
] = kmap_to_page((void *)p
);
291 * The temporary pages list is used to code share the merging algorithm
292 * in sg_alloc_table_from_pages
294 rc
= sg_alloc_table_from_pages(&sgt
, pages
, index
, offset_in_page(buf
),
300 rc
= fpga_mgr_buf_load_sg(mgr
, info
, &sgt
);
307 * fpga_mgr_firmware_load - request firmware and load to fpga
309 * @info: fpga image specific information
310 * @image_name: name of image file on the firmware search path
312 * Request an FPGA image using the firmware class, then write out to the FPGA.
313 * Update the state before each step to provide info on what step failed if
314 * there is a failure. This code assumes the caller got the mgr pointer
315 * from of_fpga_mgr_get() or fpga_mgr_get() and checked that it is not an error
318 * Return: 0 on success, negative error code otherwise.
320 static int fpga_mgr_firmware_load(struct fpga_manager
*mgr
,
321 struct fpga_image_info
*info
,
322 const char *image_name
)
324 struct device
*dev
= &mgr
->dev
;
325 const struct firmware
*fw
;
328 dev_info(dev
, "writing %s to %s\n", image_name
, mgr
->name
);
330 mgr
->state
= FPGA_MGR_STATE_FIRMWARE_REQ
;
332 ret
= request_firmware(&fw
, image_name
, dev
);
334 mgr
->state
= FPGA_MGR_STATE_FIRMWARE_REQ_ERR
;
335 dev_err(dev
, "Error requesting firmware %s\n", image_name
);
339 ret
= fpga_mgr_buf_load(mgr
, info
, fw
->data
, fw
->size
);
341 release_firmware(fw
);
346 int fpga_mgr_load(struct fpga_manager
*mgr
, struct fpga_image_info
*info
)
349 return fpga_mgr_buf_load_sg(mgr
, info
, info
->sgt
);
350 if (info
->buf
&& info
->count
)
351 return fpga_mgr_buf_load(mgr
, info
, info
->buf
, info
->count
);
352 if (info
->firmware_name
)
353 return fpga_mgr_firmware_load(mgr
, info
, info
->firmware_name
);
356 EXPORT_SYMBOL_GPL(fpga_mgr_load
);
358 static const char * const state_str
[] = {
359 [FPGA_MGR_STATE_UNKNOWN
] = "unknown",
360 [FPGA_MGR_STATE_POWER_OFF
] = "power off",
361 [FPGA_MGR_STATE_POWER_UP
] = "power up",
362 [FPGA_MGR_STATE_RESET
] = "reset",
364 /* requesting FPGA image from firmware */
365 [FPGA_MGR_STATE_FIRMWARE_REQ
] = "firmware request",
366 [FPGA_MGR_STATE_FIRMWARE_REQ_ERR
] = "firmware request error",
368 /* Preparing FPGA to receive image */
369 [FPGA_MGR_STATE_WRITE_INIT
] = "write init",
370 [FPGA_MGR_STATE_WRITE_INIT_ERR
] = "write init error",
372 /* Writing image to FPGA */
373 [FPGA_MGR_STATE_WRITE
] = "write",
374 [FPGA_MGR_STATE_WRITE_ERR
] = "write error",
376 /* Finishing configuration after image has been written */
377 [FPGA_MGR_STATE_WRITE_COMPLETE
] = "write complete",
378 [FPGA_MGR_STATE_WRITE_COMPLETE_ERR
] = "write complete error",
380 /* FPGA reports to be in normal operating mode */
381 [FPGA_MGR_STATE_OPERATING
] = "operating",
384 static ssize_t
name_show(struct device
*dev
,
385 struct device_attribute
*attr
, char *buf
)
387 struct fpga_manager
*mgr
= to_fpga_manager(dev
);
389 return sprintf(buf
, "%s\n", mgr
->name
);
392 static ssize_t
state_show(struct device
*dev
,
393 struct device_attribute
*attr
, char *buf
)
395 struct fpga_manager
*mgr
= to_fpga_manager(dev
);
397 return sprintf(buf
, "%s\n", state_str
[mgr
->state
]);
400 static DEVICE_ATTR_RO(name
);
401 static DEVICE_ATTR_RO(state
);
403 static struct attribute
*fpga_mgr_attrs
[] = {
405 &dev_attr_state
.attr
,
408 ATTRIBUTE_GROUPS(fpga_mgr
);
410 static struct fpga_manager
*__fpga_mgr_get(struct device
*dev
)
412 struct fpga_manager
*mgr
;
414 mgr
= to_fpga_manager(dev
);
416 if (!try_module_get(dev
->parent
->driver
->owner
))
423 return ERR_PTR(-ENODEV
);
426 static int fpga_mgr_dev_match(struct device
*dev
, const void *data
)
428 return dev
->parent
== data
;
432 * fpga_mgr_get - get a reference to a fpga mgr
433 * @dev: parent device that fpga mgr was registered with
435 * Given a device, get a reference to a fpga mgr.
437 * Return: fpga manager struct or IS_ERR() condition containing error code.
439 struct fpga_manager
*fpga_mgr_get(struct device
*dev
)
441 struct device
*mgr_dev
= class_find_device(fpga_mgr_class
, NULL
, dev
,
444 return ERR_PTR(-ENODEV
);
446 return __fpga_mgr_get(mgr_dev
);
448 EXPORT_SYMBOL_GPL(fpga_mgr_get
);
450 static int fpga_mgr_of_node_match(struct device
*dev
, const void *data
)
452 return dev
->of_node
== data
;
456 * of_fpga_mgr_get - get a reference to a fpga mgr
459 * Given a device node, get a reference to a fpga mgr.
461 * Return: fpga manager struct or IS_ERR() condition containing error code.
463 struct fpga_manager
*of_fpga_mgr_get(struct device_node
*node
)
467 dev
= class_find_device(fpga_mgr_class
, NULL
, node
,
468 fpga_mgr_of_node_match
);
470 return ERR_PTR(-ENODEV
);
472 return __fpga_mgr_get(dev
);
474 EXPORT_SYMBOL_GPL(of_fpga_mgr_get
);
477 * fpga_mgr_put - release a reference to a fpga manager
478 * @mgr: fpga manager structure
480 void fpga_mgr_put(struct fpga_manager
*mgr
)
482 module_put(mgr
->dev
.parent
->driver
->owner
);
483 put_device(&mgr
->dev
);
485 EXPORT_SYMBOL_GPL(fpga_mgr_put
);
488 * fpga_mgr_lock - Lock FPGA manager for exclusive use
491 * Given a pointer to FPGA Manager (from fpga_mgr_get() or
492 * of_fpga_mgr_put()) attempt to get the mutex.
494 * Return: 0 for success or -EBUSY
496 int fpga_mgr_lock(struct fpga_manager
*mgr
)
498 if (!mutex_trylock(&mgr
->ref_mutex
)) {
499 dev_err(&mgr
->dev
, "FPGA manager is in use.\n");
505 EXPORT_SYMBOL_GPL(fpga_mgr_lock
);
508 * fpga_mgr_unlock - Unlock FPGA manager
511 void fpga_mgr_unlock(struct fpga_manager
*mgr
)
513 mutex_unlock(&mgr
->ref_mutex
);
515 EXPORT_SYMBOL_GPL(fpga_mgr_unlock
);
518 * fpga_mgr_register - register a low level fpga manager driver
519 * @dev: fpga manager device from pdev
520 * @name: fpga manager name
521 * @mops: pointer to structure of fpga manager ops
522 * @priv: fpga manager private data
524 * Return: 0 on success, negative error code otherwise.
526 int fpga_mgr_register(struct device
*dev
, const char *name
,
527 const struct fpga_manager_ops
*mops
,
530 struct fpga_manager
*mgr
;
533 if (!mops
|| !mops
->write_complete
|| !mops
->state
||
534 !mops
->write_init
|| (!mops
->write
&& !mops
->write_sg
) ||
535 (mops
->write
&& mops
->write_sg
)) {
536 dev_err(dev
, "Attempt to register without fpga_manager_ops\n");
540 if (!name
|| !strlen(name
)) {
541 dev_err(dev
, "Attempt to register with no name!\n");
545 mgr
= kzalloc(sizeof(*mgr
), GFP_KERNEL
);
549 id
= ida_simple_get(&fpga_mgr_ida
, 0, 0, GFP_KERNEL
);
555 mutex_init(&mgr
->ref_mutex
);
562 * Initialize framework state by requesting low level driver read state
563 * from device. FPGA may be in reset mode or may have been programmed
564 * by bootloader or EEPROM.
566 mgr
->state
= mgr
->mops
->state(mgr
);
568 device_initialize(&mgr
->dev
);
569 mgr
->dev
.class = fpga_mgr_class
;
570 mgr
->dev
.groups
= mops
->groups
;
571 mgr
->dev
.parent
= dev
;
572 mgr
->dev
.of_node
= dev
->of_node
;
574 dev_set_drvdata(dev
, mgr
);
576 ret
= dev_set_name(&mgr
->dev
, "fpga%d", id
);
580 ret
= device_add(&mgr
->dev
);
584 dev_info(&mgr
->dev
, "%s registered\n", mgr
->name
);
589 ida_simple_remove(&fpga_mgr_ida
, id
);
595 EXPORT_SYMBOL_GPL(fpga_mgr_register
);
598 * fpga_mgr_unregister - unregister a low level fpga manager driver
599 * @dev: fpga manager device from pdev
601 void fpga_mgr_unregister(struct device
*dev
)
603 struct fpga_manager
*mgr
= dev_get_drvdata(dev
);
605 dev_info(&mgr
->dev
, "%s %s\n", __func__
, mgr
->name
);
608 * If the low level driver provides a method for putting fpga into
609 * a desired state upon unregister, do it.
611 if (mgr
->mops
->fpga_remove
)
612 mgr
->mops
->fpga_remove(mgr
);
614 device_unregister(&mgr
->dev
);
616 EXPORT_SYMBOL_GPL(fpga_mgr_unregister
);
618 static void fpga_mgr_dev_release(struct device
*dev
)
620 struct fpga_manager
*mgr
= to_fpga_manager(dev
);
622 ida_simple_remove(&fpga_mgr_ida
, mgr
->dev
.id
);
626 static int __init
fpga_mgr_class_init(void)
628 pr_info("FPGA manager framework\n");
630 fpga_mgr_class
= class_create(THIS_MODULE
, "fpga_manager");
631 if (IS_ERR(fpga_mgr_class
))
632 return PTR_ERR(fpga_mgr_class
);
634 fpga_mgr_class
->dev_groups
= fpga_mgr_groups
;
635 fpga_mgr_class
->dev_release
= fpga_mgr_dev_release
;
640 static void __exit
fpga_mgr_class_exit(void)
642 class_destroy(fpga_mgr_class
);
643 ida_destroy(&fpga_mgr_ida
);
646 MODULE_AUTHOR("Alan Tull <atull@kernel.org>");
647 MODULE_DESCRIPTION("FPGA manager framework");
648 MODULE_LICENSE("GPL v2");
650 subsys_initcall(fpga_mgr_class_init
);
651 module_exit(fpga_mgr_class_exit
);