drivers/gpio/gpio-vx855.c

   1 /*
   2  * Linux GPIOlib driver for the VIA VX855 integrated southbridge GPIO
   3  *
   4  * Copyright (C) 2009 VIA Technologies, Inc.
   5  * Copyright (C) 2010 One Laptop per Child
   6  * Author: Harald Welte <HaraldWelte@viatech.com>
   7  * All rights reserved.
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License as
  11  * published by the Free Software Foundation; either version 2 of
  12  * the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22  * MA 02111-1307 USA
  23  *
  24  */
  25
  26 #include <linux/kernel.h>
  27 #include <linux/module.h>
  28 #include <linux/gpio.h>
  29 #include <linux/slab.h>
  30 #include <linux/device.h>
  31 #include <linux/platform_device.h>
  32 #include <linux/pci.h>
  33 #include <linux/io.h>
  34
  35 #define MODULE_NAME "vx855_gpio"
  36
  37 /* The VX855 south bridge has the following GPIO pins:
  38  *      GPI 0...13      General Purpose Input
  39  *      GPO 0...12      General Purpose Output
  40  *      GPIO 0...14     General Purpose I/O (Open-Drain)
  41  */
  42
  43 #define NR_VX855_GPI    14
  44 #define NR_VX855_GPO    13
  45 #define NR_VX855_GPIO   15
  46
  47 #define NR_VX855_GPInO  (NR_VX855_GPI + NR_VX855_GPO)
  48 #define NR_VX855_GP     (NR_VX855_GPI + NR_VX855_GPO + NR_VX855_GPIO)
  49
  50 struct vx855_gpio {
  51         struct gpio_chip gpio;
  52         spinlock_t lock;
  53         u32 io_gpi;
  54         u32 io_gpo;
  55 };
  56
  57 /* resolve a GPIx into the corresponding bit position */
  58 static inline u_int32_t gpi_i_bit(int i)
  59 {
  60         if (i < 10)
  61                 return 1 << i;
  62         else
  63                 return 1 << (i + 14);
  64 }
  65
  66 static inline u_int32_t gpo_o_bit(int i)
  67 {
  68         if (i < 11)
  69                 return 1 << i;
  70         else
  71                 return 1 << (i + 14);
  72 }
  73
  74 static inline u_int32_t gpio_i_bit(int i)
  75 {
  76         if (i < 14)
  77                 return 1 << (i + 10);
  78         else
  79                 return 1 << (i + 14);
  80 }
  81
  82 static inline u_int32_t gpio_o_bit(int i)
  83 {
  84         if (i < 14)
  85                 return 1 << (i + 11);
  86         else
  87                 return 1 << (i + 13);
  88 }
  89
  90 /* Mapping betwee numeric GPIO ID and the actual GPIO hardware numbering:
  91  * 0..13        GPI 0..13
  92  * 14..26       GPO 0..12
  93  * 27..41       GPIO 0..14
  94  */
  95
  96 static int vx855gpio_direction_input(struct gpio_chip *gpio,
  97                                      unsigned int nr)
  98 {
  99         struct vx855_gpio *vg = gpiochip_get_data(gpio);
 100         unsigned long flags;
 101         u_int32_t reg_out;
 102
 103         /* Real GPI bits are always in input direction */
 104         if (nr < NR_VX855_GPI)
 105                 return 0;
 106
 107         /* Real GPO bits cannot be put in output direction */
 108         if (nr < NR_VX855_GPInO)
 109                 return -EINVAL;
 110
 111         /* Open Drain GPIO have to be set to one */
 112         spin_lock_irqsave(&vg->lock, flags);
 113         reg_out = inl(vg->io_gpo);
 114         reg_out |= gpio_o_bit(nr - NR_VX855_GPInO);
 115         outl(reg_out, vg->io_gpo);
 116         spin_unlock_irqrestore(&vg->lock, flags);
 117
 118         return 0;
 119 }
 120
 121 static int vx855gpio_get(struct gpio_chip *gpio, unsigned int nr)
 122 {
 123         struct vx855_gpio *vg = gpiochip_get_data(gpio);
 124         u_int32_t reg_in;
 125         int ret = 0;
 126
 127         if (nr < NR_VX855_GPI) {
 128                 reg_in = inl(vg->io_gpi);
 129                 if (reg_in & gpi_i_bit(nr))
 130                         ret = 1;
 131         } else if (nr < NR_VX855_GPInO) {
 132                 /* GPO don't have an input bit, we need to read it
 133                  * back from the output register */
 134                 reg_in = inl(vg->io_gpo);
 135                 if (reg_in & gpo_o_bit(nr - NR_VX855_GPI))
 136                         ret = 1;
 137         } else {
 138                 reg_in = inl(vg->io_gpi);
 139                 if (reg_in & gpio_i_bit(nr - NR_VX855_GPInO))
 140                         ret = 1;
 141         }
 142
 143         return ret;
 144 }
 145
 146 static void vx855gpio_set(struct gpio_chip *gpio, unsigned int nr,
 147                           int val)
 148 {
 149         struct vx855_gpio *vg = gpiochip_get_data(gpio);
 150         unsigned long flags;
 151         u_int32_t reg_out;
 152
 153         /* True GPI cannot be switched to output mode */
 154         if (nr < NR_VX855_GPI)
 155                 return;
 156
 157         spin_lock_irqsave(&vg->lock, flags);
 158         reg_out = inl(vg->io_gpo);
 159         if (nr < NR_VX855_GPInO) {
 160                 if (val)
 161                         reg_out |= gpo_o_bit(nr - NR_VX855_GPI);
 162                 else
 163                         reg_out &= ~gpo_o_bit(nr - NR_VX855_GPI);
 164         } else {
 165                 if (val)
 166                         reg_out |= gpio_o_bit(nr - NR_VX855_GPInO);
 167                 else
 168                         reg_out &= ~gpio_o_bit(nr - NR_VX855_GPInO);
 169         }
 170         outl(reg_out, vg->io_gpo);
 171         spin_unlock_irqrestore(&vg->lock, flags);
 172 }
 173
 174 static int vx855gpio_direction_output(struct gpio_chip *gpio,
 175                                       unsigned int nr, int val)
 176 {
 177         /* True GPI cannot be switched to output mode */
 178         if (nr < NR_VX855_GPI)
 179                 return -EINVAL;
 180
 181         /* True GPO don't need to be switched to output mode,
 182          * and GPIO are open-drain, i.e. also need no switching,
 183          * so all we do is set the level */
 184         vx855gpio_set(gpio, nr, val);
 185
 186         return 0;
 187 }
 188
 189 static int vx855gpio_set_config(struct gpio_chip *gpio, unsigned int nr,
 190                                 unsigned long config)
 191 {
 192         enum pin_config_param param = pinconf_to_config_param(config);
 193
 194         /* The GPI cannot be single-ended */
 195         if (nr < NR_VX855_GPI)
 196                 return -EINVAL;
 197
 198         /* The GPO's are push-pull */
 199         if (nr < NR_VX855_GPInO) {
 200                 if (param != PIN_CONFIG_DRIVE_PUSH_PULL)
 201                         return -ENOTSUPP;
 202                 return 0;
 203         }
 204
 205         /* The GPIO's are open drain */
 206         if (param != PIN_CONFIG_DRIVE_OPEN_DRAIN)
 207                 return -ENOTSUPP;
 208
 209         return 0;
 210 }
 211
 212 static const char *vx855gpio_names[NR_VX855_GP] = {
 213         "VX855_GPI0", "VX855_GPI1", "VX855_GPI2", "VX855_GPI3", "VX855_GPI4",
 214         "VX855_GPI5", "VX855_GPI6", "VX855_GPI7", "VX855_GPI8", "VX855_GPI9",
 215         "VX855_GPI10", "VX855_GPI11", "VX855_GPI12", "VX855_GPI13",
 216         "VX855_GPO0", "VX855_GPO1", "VX855_GPO2", "VX855_GPO3", "VX855_GPO4",
 217         "VX855_GPO5", "VX855_GPO6", "VX855_GPO7", "VX855_GPO8", "VX855_GPO9",
 218         "VX855_GPO10", "VX855_GPO11", "VX855_GPO12",
 219         "VX855_GPIO0", "VX855_GPIO1", "VX855_GPIO2", "VX855_GPIO3",
 220         "VX855_GPIO4", "VX855_GPIO5", "VX855_GPIO6", "VX855_GPIO7",
 221         "VX855_GPIO8", "VX855_GPIO9", "VX855_GPIO10", "VX855_GPIO11",
 222         "VX855_GPIO12", "VX855_GPIO13", "VX855_GPIO14"
 223 };
 224
 225 static void vx855gpio_gpio_setup(struct vx855_gpio *vg)
 226 {
 227         struct gpio_chip *c = &vg->gpio;
 228
 229         c->label = "VX855 South Bridge";
 230         c->owner = THIS_MODULE;
 231         c->direction_input = vx855gpio_direction_input;
 232         c->direction_output = vx855gpio_direction_output;
 233         c->get = vx855gpio_get;
 234         c->set = vx855gpio_set;
 235         c->set_config = vx855gpio_set_config,
 236         c->dbg_show = NULL;
 237         c->base = 0;
 238         c->ngpio = NR_VX855_GP;
 239         c->can_sleep = false;
 240         c->names = vx855gpio_names;
 241 }
 242
 243 /* This platform device is ordinarily registered by the vx855 mfd driver */
 244 static int vx855gpio_probe(struct platform_device *pdev)
 245 {
 246         struct resource *res_gpi;
 247         struct resource *res_gpo;
 248         struct vx855_gpio *vg;
 249
 250         res_gpi = platform_get_resource(pdev, IORESOURCE_IO, 0);
 251         res_gpo = platform_get_resource(pdev, IORESOURCE_IO, 1);
 252         if (!res_gpi || !res_gpo)
 253                 return -EBUSY;
 254
 255         vg = devm_kzalloc(&pdev->dev, sizeof(*vg), GFP_KERNEL);
 256         if (!vg)
 257                 return -ENOMEM;
 258
 259         platform_set_drvdata(pdev, vg);
 260
 261         dev_info(&pdev->dev, "found VX855 GPIO controller\n");
 262         vg->io_gpi = res_gpi->start;
 263         vg->io_gpo = res_gpo->start;
 264         spin_lock_init(&vg->lock);
 265
 266         /*
 267          * A single byte is used to control various GPIO ports on the VX855,
 268          * and in the case of the OLPC XO-1.5, some of those ports are used
 269          * for switches that are interpreted and exposed through ACPI. ACPI
 270          * will have reserved the region, so our own reservation will not
 271          * succeed. Ignore and continue.
 272          */
 273
 274         if (!devm_request_region(&pdev->dev, res_gpi->start,
 275                                  resource_size(res_gpi), MODULE_NAME "_gpi"))
 276                 dev_warn(&pdev->dev,
 277                         "GPI I/O resource busy, probably claimed by ACPI\n");
 278
 279         if (!devm_request_region(&pdev->dev, res_gpo->start,
 280                                  resource_size(res_gpo), MODULE_NAME "_gpo"))
 281                 dev_warn(&pdev->dev,
 282                         "GPO I/O resource busy, probably claimed by ACPI\n");
 283
 284         vx855gpio_gpio_setup(vg);
 285
 286         return devm_gpiochip_add_data(&pdev->dev, &vg->gpio, vg);
 287 }
 288
 289 static struct platform_driver vx855gpio_driver = {
 290         .driver = {
 291                 .name   = MODULE_NAME,
 292         },
 293         .probe          = vx855gpio_probe,
 294 };
 295
 296 module_platform_driver(vx855gpio_driver);
 297
 298 MODULE_LICENSE("GPL");
 299 MODULE_AUTHOR("Harald Welte <HaraldWelte@viatech.com>");
 300 MODULE_DESCRIPTION("GPIO driver for the VIA VX855 chipset");
 301 MODULE_ALIAS("platform:vx855_gpio");