2 * Copyright (C) 2010 Google, Inc.
3 * Author: Erik Gilling <konkers@android.com>
5 * Copyright (C) 2011-2013 NVIDIA Corporation
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
21 #include "../channel.h"
23 #define HOST1X_DEBUG_MAX_PAGE_OFFSET 102400
26 HOST1X_OPCODE_SETCLASS
= 0x00,
27 HOST1X_OPCODE_INCR
= 0x01,
28 HOST1X_OPCODE_NONINCR
= 0x02,
29 HOST1X_OPCODE_MASK
= 0x03,
30 HOST1X_OPCODE_IMM
= 0x04,
31 HOST1X_OPCODE_RESTART
= 0x05,
32 HOST1X_OPCODE_GATHER
= 0x06,
33 HOST1X_OPCODE_SETSTRMID
= 0x07,
34 HOST1X_OPCODE_SETAPPID
= 0x08,
35 HOST1X_OPCODE_SETPYLD
= 0x09,
36 HOST1X_OPCODE_INCR_W
= 0x0a,
37 HOST1X_OPCODE_NONINCR_W
= 0x0b,
38 HOST1X_OPCODE_GATHER_W
= 0x0c,
39 HOST1X_OPCODE_RESTART_W
= 0x0d,
40 HOST1X_OPCODE_EXTEND
= 0x0e,
44 HOST1X_OPCODE_EXTEND_ACQUIRE_MLOCK
= 0x00,
45 HOST1X_OPCODE_EXTEND_RELEASE_MLOCK
= 0x01,
48 #define INVALID_PAYLOAD 0xffffffff
50 static unsigned int show_channel_command(struct output
*o
, u32 val
,
53 unsigned int mask
, subop
, num
, opcode
;
58 case HOST1X_OPCODE_SETCLASS
:
61 host1x_debug_cont(o
, "SETCL(class=%03x, offset=%03x, mask=%02x, [",
63 val
>> 16 & 0xfff, mask
);
64 return hweight8(mask
);
67 host1x_debug_cont(o
, "SETCL(class=%03x)\n", val
>> 6 & 0x3ff);
70 case HOST1X_OPCODE_INCR
:
72 host1x_debug_cont(o
, "INCR(offset=%03x, [",
75 host1x_debug_cont(o
, "])\n");
79 case HOST1X_OPCODE_NONINCR
:
81 host1x_debug_cont(o
, "NONINCR(offset=%03x, [",
84 host1x_debug_cont(o
, "])\n");
88 case HOST1X_OPCODE_MASK
:
90 host1x_debug_cont(o
, "MASK(offset=%03x, mask=%03x, [",
91 val
>> 16 & 0xfff, mask
);
93 host1x_debug_cont(o
, "])\n");
95 return hweight16(mask
);
97 case HOST1X_OPCODE_IMM
:
98 host1x_debug_cont(o
, "IMM(offset=%03x, data=%03x)\n",
99 val
>> 16 & 0xfff, val
& 0xffff);
102 case HOST1X_OPCODE_RESTART
:
103 host1x_debug_cont(o
, "RESTART(offset=%08x)\n", val
<< 4);
106 case HOST1X_OPCODE_GATHER
:
107 host1x_debug_cont(o
, "GATHER(offset=%03x, insert=%d, type=%d, count=%04x, addr=[",
108 val
>> 16 & 0xfff, val
>> 15 & 0x1,
109 val
>> 14 & 0x1, val
& 0x3fff);
113 case HOST1X_OPCODE_SETSTRMID
:
114 host1x_debug_cont(o
, "SETSTRMID(offset=%06x)\n",
118 case HOST1X_OPCODE_SETAPPID
:
119 host1x_debug_cont(o
, "SETAPPID(appid=%02x)\n", val
& 0xff);
122 case HOST1X_OPCODE_SETPYLD
:
123 *payload
= val
& 0xffff;
124 host1x_debug_cont(o
, "SETPYLD(data=%04x)\n", *payload
);
127 case HOST1X_OPCODE_INCR_W
:
128 case HOST1X_OPCODE_NONINCR_W
:
129 host1x_debug_cont(o
, "%s(offset=%06x, ",
130 opcode
== HOST1X_OPCODE_INCR_W
?
131 "INCR_W" : "NONINCR_W",
134 host1x_debug_cont(o
, "[])\n");
136 } else if (*payload
== INVALID_PAYLOAD
) {
137 host1x_debug_cont(o
, "unknown)\n");
140 host1x_debug_cont(o
, "[");
144 case HOST1X_OPCODE_GATHER_W
:
145 host1x_debug_cont(o
, "GATHER_W(count=%04x, addr=[",
150 case HOST1X_OPCODE_EXTEND
:
151 subop
= val
>> 24 & 0xf;
152 if (subop
== HOST1X_OPCODE_EXTEND_ACQUIRE_MLOCK
)
153 host1x_debug_cont(o
, "ACQUIRE_MLOCK(index=%d)\n",
155 else if (subop
== HOST1X_OPCODE_EXTEND_RELEASE_MLOCK
)
156 host1x_debug_cont(o
, "RELEASE_MLOCK(index=%d)\n",
159 host1x_debug_cont(o
, "EXTEND_UNKNOWN(%08x)\n", val
);
163 host1x_debug_cont(o
, "UNKNOWN\n");
168 static void show_gather(struct output
*o
, phys_addr_t phys_addr
,
169 unsigned int words
, struct host1x_cdma
*cdma
,
170 phys_addr_t pin_addr
, u32
*map_addr
)
172 /* Map dmaget cursor to corresponding mem handle */
173 u32 offset
= phys_addr
- pin_addr
;
174 unsigned int data_count
= 0, i
;
175 u32 payload
= INVALID_PAYLOAD
;
178 * Sometimes we're given different hardware address to the same
179 * page - in these cases the offset will get an invalid number and
180 * we just have to bail out.
182 if (offset
> HOST1X_DEBUG_MAX_PAGE_OFFSET
) {
183 host1x_debug_output(o
, "[address mismatch]\n");
187 for (i
= 0; i
< words
; i
++) {
188 u32 addr
= phys_addr
+ i
* 4;
189 u32 val
= *(map_addr
+ offset
/ 4 + i
);
192 host1x_debug_output(o
, "%08x: %08x: ", addr
, val
);
193 data_count
= show_channel_command(o
, val
, &payload
);
195 host1x_debug_cont(o
, "%08x%s", val
,
196 data_count
> 1 ? ", " : "])\n");
202 static void show_channel_gathers(struct output
*o
, struct host1x_cdma
*cdma
)
204 struct host1x_job
*job
;
206 list_for_each_entry(job
, &cdma
->sync_queue
, list
) {
209 host1x_debug_output(o
, "\n%p: JOB, syncpt_id=%d, syncpt_val=%d, first_get=%08x, timeout=%d num_slots=%d, num_handles=%d\n",
210 job
, job
->syncpt_id
, job
->syncpt_end
,
211 job
->first_get
, job
->timeout
,
212 job
->num_slots
, job
->num_unpins
);
214 for (i
= 0; i
< job
->num_gathers
; i
++) {
215 struct host1x_job_gather
*g
= &job
->gathers
[i
];
218 if (job
->gather_copy_mapped
)
219 mapped
= (u32
*)job
->gather_copy_mapped
;
221 mapped
= host1x_bo_mmap(g
->bo
);
224 host1x_debug_output(o
, "[could not mmap]\n");
228 host1x_debug_output(o
, " GATHER at %pad+%#x, %d words\n",
229 &g
->base
, g
->offset
, g
->words
);
231 show_gather(o
, g
->base
+ g
->offset
, g
->words
, cdma
,
234 if (!job
->gather_copy_mapped
)
235 host1x_bo_munmap(g
->bo
, mapped
);
241 #include "debug_hw_1x06.c"
243 #include "debug_hw_1x01.c"
246 static const struct host1x_debug_ops host1x_debug_ops
= {
247 .show_channel_cdma
= host1x_debug_show_channel_cdma
,
248 .show_channel_fifo
= host1x_debug_show_channel_fifo
,
249 .show_mlocks
= host1x_debug_show_mlocks
,