drivers/hwtracing/coresight/coresight-tpiu.c

   1 /* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
   2  *
   3  * Description: CoreSight Trace Port Interface Unit driver
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 and
   7  * only version 2 as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/init.h>
  17 #include <linux/device.h>
  18 #include <linux/io.h>
  19 #include <linux/err.h>
  20 #include <linux/slab.h>
  21 #include <linux/pm_runtime.h>
  22 #include <linux/coresight.h>
  23 #include <linux/amba/bus.h>
  24 #include <linux/clk.h>
  25
  26 #include "coresight-priv.h"
  27
  28 #define TPIU_SUPP_PORTSZ        0x000
  29 #define TPIU_CURR_PORTSZ        0x004
  30 #define TPIU_SUPP_TRIGMODES     0x100
  31 #define TPIU_TRIG_CNTRVAL       0x104
  32 #define TPIU_TRIG_MULT          0x108
  33 #define TPIU_SUPP_TESTPATM      0x200
  34 #define TPIU_CURR_TESTPATM      0x204
  35 #define TPIU_TEST_PATREPCNTR    0x208
  36 #define TPIU_FFSR               0x300
  37 #define TPIU_FFCR               0x304
  38 #define TPIU_FSYNC_CNTR         0x308
  39 #define TPIU_EXTCTL_INPORT      0x400
  40 #define TPIU_EXTCTL_OUTPORT     0x404
  41 #define TPIU_ITTRFLINACK        0xee4
  42 #define TPIU_ITTRFLIN           0xee8
  43 #define TPIU_ITATBDATA0         0xeec
  44 #define TPIU_ITATBCTR2          0xef0
  45 #define TPIU_ITATBCTR1          0xef4
  46 #define TPIU_ITATBCTR0          0xef8
  47
  48 /** register definition **/
  49 /* FFSR - 0x300 */
  50 #define FFSR_FT_STOPPED         BIT(1)
  51 /* FFCR - 0x304 */
  52 #define FFCR_FON_MAN            BIT(6)
  53 #define FFCR_STOP_FI            BIT(12)
  54
  55 /**
  56  * @base:       memory mapped base address for this component.
  57  * @dev:        the device entity associated to this component.
  58  * @atclk:      optional clock for the core parts of the TPIU.
  59  * @csdev:      component vitals needed by the framework.
  60  */
  61 struct tpiu_drvdata {
  62         void __iomem            *base;
  63         struct device           *dev;
  64         struct clk              *atclk;
  65         struct coresight_device *csdev;
  66 };
  67
  68 static void tpiu_enable_hw(struct tpiu_drvdata *drvdata)
  69 {
  70         CS_UNLOCK(drvdata->base);
  71
  72         /* TODO: fill this up */
  73
  74         CS_LOCK(drvdata->base);
  75 }
  76
  77 static int tpiu_enable(struct coresight_device *csdev, u32 mode)
  78 {
  79         struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
  80
  81         tpiu_enable_hw(drvdata);
  82
  83         dev_info(drvdata->dev, "TPIU enabled\n");
  84         return 0;
  85 }
  86
  87 static void tpiu_disable_hw(struct tpiu_drvdata *drvdata)
  88 {
  89         CS_UNLOCK(drvdata->base);
  90
  91         /* Clear formatter and stop on flush */
  92         writel_relaxed(FFCR_STOP_FI, drvdata->base + TPIU_FFCR);
  93         /* Generate manual flush */
  94         writel_relaxed(FFCR_STOP_FI | FFCR_FON_MAN, drvdata->base + TPIU_FFCR);
  95         /* Wait for flush to complete */
  96         coresight_timeout(drvdata->base, TPIU_FFCR, FFCR_FON_MAN, 0);
  97         /* Wait for formatter to stop */
  98         coresight_timeout(drvdata->base, TPIU_FFSR, FFSR_FT_STOPPED, 1);
  99
 100         CS_LOCK(drvdata->base);
 101 }
 102
 103 static void tpiu_disable(struct coresight_device *csdev)
 104 {
 105         struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
 106
 107         tpiu_disable_hw(drvdata);
 108
 109         dev_info(drvdata->dev, "TPIU disabled\n");
 110 }
 111
 112 static const struct coresight_ops_sink tpiu_sink_ops = {
 113         .enable         = tpiu_enable,
 114         .disable        = tpiu_disable,
 115 };
 116
 117 static const struct coresight_ops tpiu_cs_ops = {
 118         .sink_ops       = &tpiu_sink_ops,
 119 };
 120
 121 static int tpiu_probe(struct amba_device *adev, const struct amba_id *id)
 122 {
 123         int ret;
 124         void __iomem *base;
 125         struct device *dev = &adev->dev;
 126         struct coresight_platform_data *pdata = NULL;
 127         struct tpiu_drvdata *drvdata;
 128         struct resource *res = &adev->res;
 129         struct coresight_desc desc = { 0 };
 130         struct device_node *np = adev->dev.of_node;
 131
 132         if (np) {
 133                 pdata = of_get_coresight_platform_data(dev, np);
 134                 if (IS_ERR(pdata))
 135                         return PTR_ERR(pdata);
 136                 adev->dev.platform_data = pdata;
 137         }
 138
 139         drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
 140         if (!drvdata)
 141                 return -ENOMEM;
 142
 143         drvdata->dev = &adev->dev;
 144         drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */
 145         if (!IS_ERR(drvdata->atclk)) {
 146                 ret = clk_prepare_enable(drvdata->atclk);
 147                 if (ret)
 148                         return ret;
 149         }
 150         dev_set_drvdata(dev, drvdata);
 151
 152         /* Validity for the resource is already checked by the AMBA core */
 153         base = devm_ioremap_resource(dev, res);
 154         if (IS_ERR(base))
 155                 return PTR_ERR(base);
 156
 157         drvdata->base = base;
 158
 159         /* Disable tpiu to support older devices */
 160         tpiu_disable_hw(drvdata);
 161
 162         pm_runtime_put(&adev->dev);
 163
 164         desc.type = CORESIGHT_DEV_TYPE_SINK;
 165         desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_PORT;
 166         desc.ops = &tpiu_cs_ops;
 167         desc.pdata = pdata;
 168         desc.dev = dev;
 169         drvdata->csdev = coresight_register(&desc);
 170
 171         return PTR_ERR_OR_ZERO(drvdata->csdev);
 172 }
 173
 174 #ifdef CONFIG_PM
 175 static int tpiu_runtime_suspend(struct device *dev)
 176 {
 177         struct tpiu_drvdata *drvdata = dev_get_drvdata(dev);
 178
 179         if (drvdata && !IS_ERR(drvdata->atclk))
 180                 clk_disable_unprepare(drvdata->atclk);
 181
 182         return 0;
 183 }
 184
 185 static int tpiu_runtime_resume(struct device *dev)
 186 {
 187         struct tpiu_drvdata *drvdata = dev_get_drvdata(dev);
 188
 189         if (drvdata && !IS_ERR(drvdata->atclk))
 190                 clk_prepare_enable(drvdata->atclk);
 191
 192         return 0;
 193 }
 194 #endif
 195
 196 static const struct dev_pm_ops tpiu_dev_pm_ops = {
 197         SET_RUNTIME_PM_OPS(tpiu_runtime_suspend, tpiu_runtime_resume, NULL)
 198 };
 199
 200 static const struct amba_id tpiu_ids[] = {
 201         {
 202                 .id     = 0x000bb912,
 203                 .mask   = 0x000fffff,
 204         },
 205         {
 206                 .id     = 0x0004b912,
 207                 .mask   = 0x0007ffff,
 208         },
 209         {
 210                 /* Coresight SoC-600 */
 211                 .id     = 0x000bb9e7,
 212                 .mask   = 0x000fffff,
 213         },
 214         { 0, 0},
 215 };
 216
 217 static struct amba_driver tpiu_driver = {
 218         .drv = {
 219                 .name   = "coresight-tpiu",
 220                 .owner  = THIS_MODULE,
 221                 .pm     = &tpiu_dev_pm_ops,
 222                 .suppress_bind_attrs = true,
 223         },
 224         .probe          = tpiu_probe,
 225         .id_table       = tpiu_ids,
 226 };
 227 builtin_amba_driver(tpiu_driver);