Linux 4.16.11
[linux/fpc-iii.git] / drivers / iio / accel / kxcjk-1013.c
blobaf53a1084ee537642906fc35e19986b0d5bc508b
1 /*
2 * KXCJK-1013 3-axis accelerometer driver
3 * Copyright (c) 2014, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
15 #include <linux/module.h>
16 #include <linux/i2c.h>
17 #include <linux/interrupt.h>
18 #include <linux/delay.h>
19 #include <linux/bitops.h>
20 #include <linux/slab.h>
21 #include <linux/string.h>
22 #include <linux/acpi.h>
23 #include <linux/pm.h>
24 #include <linux/pm_runtime.h>
25 #include <linux/iio/iio.h>
26 #include <linux/iio/sysfs.h>
27 #include <linux/iio/buffer.h>
28 #include <linux/iio/trigger.h>
29 #include <linux/iio/events.h>
30 #include <linux/iio/trigger_consumer.h>
31 #include <linux/iio/triggered_buffer.h>
32 #include <linux/iio/accel/kxcjk_1013.h>
34 #define KXCJK1013_DRV_NAME "kxcjk1013"
35 #define KXCJK1013_IRQ_NAME "kxcjk1013_event"
37 #define KXTF9_REG_HP_XOUT_L 0x00
38 #define KXTF9_REG_HP_XOUT_H 0x01
39 #define KXTF9_REG_HP_YOUT_L 0x02
40 #define KXTF9_REG_HP_YOUT_H 0x03
41 #define KXTF9_REG_HP_ZOUT_L 0x04
42 #define KXTF9_REG_HP_ZOUT_H 0x05
44 #define KXCJK1013_REG_XOUT_L 0x06
46 * From low byte X axis register, all the other addresses of Y and Z can be
47 * obtained by just applying axis offset. The following axis defines are just
48 * provide clarity, but not used.
50 #define KXCJK1013_REG_XOUT_H 0x07
51 #define KXCJK1013_REG_YOUT_L 0x08
52 #define KXCJK1013_REG_YOUT_H 0x09
53 #define KXCJK1013_REG_ZOUT_L 0x0A
54 #define KXCJK1013_REG_ZOUT_H 0x0B
56 #define KXCJK1013_REG_DCST_RESP 0x0C
57 #define KXCJK1013_REG_WHO_AM_I 0x0F
58 #define KXTF9_REG_TILT_POS_CUR 0x10
59 #define KXTF9_REG_TILT_POS_PREV 0x11
60 #define KXTF9_REG_INT_SRC1 0x15
61 #define KXCJK1013_REG_INT_SRC1 0x16 /* compatible, but called INT_SRC2 in KXTF9 ds */
62 #define KXCJK1013_REG_INT_SRC2 0x17
63 #define KXCJK1013_REG_STATUS_REG 0x18
64 #define KXCJK1013_REG_INT_REL 0x1A
65 #define KXCJK1013_REG_CTRL1 0x1B
66 #define KXTF9_REG_CTRL2 0x1C
67 #define KXCJK1013_REG_CTRL2 0x1D /* mostly compatible, CTRL_REG3 in KTXF9 ds */
68 #define KXCJK1013_REG_INT_CTRL1 0x1E
69 #define KXCJK1013_REG_INT_CTRL2 0x1F
70 #define KXTF9_REG_INT_CTRL3 0x20
71 #define KXCJK1013_REG_DATA_CTRL 0x21
72 #define KXTF9_REG_TILT_TIMER 0x28
73 #define KXCJK1013_REG_WAKE_TIMER 0x29
74 #define KXTF9_REG_TDT_TIMER 0x2B
75 #define KXTF9_REG_TDT_THRESH_H 0x2C
76 #define KXTF9_REG_TDT_THRESH_L 0x2D
77 #define KXTF9_REG_TDT_TAP_TIMER 0x2E
78 #define KXTF9_REG_TDT_TOTAL_TIMER 0x2F
79 #define KXTF9_REG_TDT_LATENCY_TIMER 0x30
80 #define KXTF9_REG_TDT_WINDOW_TIMER 0x31
81 #define KXCJK1013_REG_SELF_TEST 0x3A
82 #define KXTF9_REG_WAKE_THRESH 0x5A
83 #define KXTF9_REG_TILT_ANGLE 0x5C
84 #define KXTF9_REG_HYST_SET 0x5F
85 #define KXCJK1013_REG_WAKE_THRES 0x6A
87 #define KXCJK1013_REG_CTRL1_BIT_PC1 BIT(7)
88 #define KXCJK1013_REG_CTRL1_BIT_RES BIT(6)
89 #define KXCJK1013_REG_CTRL1_BIT_DRDY BIT(5)
90 #define KXCJK1013_REG_CTRL1_BIT_GSEL1 BIT(4)
91 #define KXCJK1013_REG_CTRL1_BIT_GSEL0 BIT(3)
92 #define KXCJK1013_REG_CTRL1_BIT_WUFE BIT(1)
94 #define KXCJK1013_REG_INT_CTRL1_BIT_IEU BIT(2) /* KXTF9 */
95 #define KXCJK1013_REG_INT_CTRL1_BIT_IEL BIT(3)
96 #define KXCJK1013_REG_INT_CTRL1_BIT_IEA BIT(4)
97 #define KXCJK1013_REG_INT_CTRL1_BIT_IEN BIT(5)
99 #define KXTF9_REG_TILT_BIT_LEFT_EDGE BIT(5)
100 #define KXTF9_REG_TILT_BIT_RIGHT_EDGE BIT(4)
101 #define KXTF9_REG_TILT_BIT_LOWER_EDGE BIT(3)
102 #define KXTF9_REG_TILT_BIT_UPPER_EDGE BIT(2)
103 #define KXTF9_REG_TILT_BIT_FACE_DOWN BIT(1)
104 #define KXTF9_REG_TILT_BIT_FACE_UP BIT(0)
106 #define KXCJK1013_DATA_MASK_12_BIT 0x0FFF
107 #define KXCJK1013_MAX_STARTUP_TIME_US 100000
109 #define KXCJK1013_SLEEP_DELAY_MS 2000
111 #define KXCJK1013_REG_INT_SRC1_BIT_TPS BIT(0) /* KXTF9 */
112 #define KXCJK1013_REG_INT_SRC1_BIT_WUFS BIT(1)
113 #define KXCJK1013_REG_INT_SRC1_MASK_TDTS (BIT(2) | BIT(3)) /* KXTF9 */
114 #define KXCJK1013_REG_INT_SRC1_TAP_NONE 0
115 #define KXCJK1013_REG_INT_SRC1_TAP_SINGLE BIT(2)
116 #define KXCJK1013_REG_INT_SRC1_TAP_DOUBLE BIT(3)
117 #define KXCJK1013_REG_INT_SRC1_BIT_DRDY BIT(4)
119 /* KXCJK: INT_SOURCE2: motion detect, KXTF9: INT_SRC_REG1: tap detect */
120 #define KXCJK1013_REG_INT_SRC2_BIT_ZP BIT(0)
121 #define KXCJK1013_REG_INT_SRC2_BIT_ZN BIT(1)
122 #define KXCJK1013_REG_INT_SRC2_BIT_YP BIT(2)
123 #define KXCJK1013_REG_INT_SRC2_BIT_YN BIT(3)
124 #define KXCJK1013_REG_INT_SRC2_BIT_XP BIT(4)
125 #define KXCJK1013_REG_INT_SRC2_BIT_XN BIT(5)
127 #define KXCJK1013_DEFAULT_WAKE_THRES 1
129 enum kx_chipset {
130 KXCJK1013,
131 KXCJ91008,
132 KXTJ21009,
133 KXTF9,
134 KX_MAX_CHIPS /* this must be last */
137 struct kxcjk1013_data {
138 struct i2c_client *client;
139 struct iio_trigger *dready_trig;
140 struct iio_trigger *motion_trig;
141 struct mutex mutex;
142 s16 buffer[8];
143 u8 odr_bits;
144 u8 range;
145 int wake_thres;
146 int wake_dur;
147 bool active_high_intr;
148 bool dready_trigger_on;
149 int ev_enable_state;
150 bool motion_trigger_on;
151 int64_t timestamp;
152 enum kx_chipset chipset;
153 bool is_smo8500_device;
156 enum kxcjk1013_axis {
157 AXIS_X,
158 AXIS_Y,
159 AXIS_Z,
160 AXIS_MAX,
163 enum kxcjk1013_mode {
164 STANDBY,
165 OPERATION,
168 enum kxcjk1013_range {
169 KXCJK1013_RANGE_2G,
170 KXCJK1013_RANGE_4G,
171 KXCJK1013_RANGE_8G,
174 struct kx_odr_map {
175 int val;
176 int val2;
177 int odr_bits;
178 int wuf_bits;
181 static const struct kx_odr_map samp_freq_table[] = {
182 { 0, 781000, 0x08, 0x00 },
183 { 1, 563000, 0x09, 0x01 },
184 { 3, 125000, 0x0A, 0x02 },
185 { 6, 250000, 0x0B, 0x03 },
186 { 12, 500000, 0x00, 0x04 },
187 { 25, 0, 0x01, 0x05 },
188 { 50, 0, 0x02, 0x06 },
189 { 100, 0, 0x03, 0x06 },
190 { 200, 0, 0x04, 0x06 },
191 { 400, 0, 0x05, 0x06 },
192 { 800, 0, 0x06, 0x06 },
193 { 1600, 0, 0x07, 0x06 },
196 static const char *const kxcjk1013_samp_freq_avail =
197 "0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800 1600";
199 static const struct kx_odr_map kxtf9_samp_freq_table[] = {
200 { 25, 0, 0x01, 0x00 },
201 { 50, 0, 0x02, 0x01 },
202 { 100, 0, 0x03, 0x01 },
203 { 200, 0, 0x04, 0x01 },
204 { 400, 0, 0x05, 0x01 },
205 { 800, 0, 0x06, 0x01 },
208 static const char *const kxtf9_samp_freq_avail =
209 "25 50 100 200 400 800";
211 /* Refer to section 4 of the specification */
212 static const struct {
213 int odr_bits;
214 int usec;
215 } odr_start_up_times[KX_MAX_CHIPS][12] = {
216 /* KXCJK-1013 */
218 {0x08, 100000},
219 {0x09, 100000},
220 {0x0A, 100000},
221 {0x0B, 100000},
222 {0, 80000},
223 {0x01, 41000},
224 {0x02, 21000},
225 {0x03, 11000},
226 {0x04, 6400},
227 {0x05, 3900},
228 {0x06, 2700},
229 {0x07, 2100},
231 /* KXCJ9-1008 */
233 {0x08, 100000},
234 {0x09, 100000},
235 {0x0A, 100000},
236 {0x0B, 100000},
237 {0, 80000},
238 {0x01, 41000},
239 {0x02, 21000},
240 {0x03, 11000},
241 {0x04, 6400},
242 {0x05, 3900},
243 {0x06, 2700},
244 {0x07, 2100},
246 /* KXCTJ2-1009 */
248 {0x08, 1240000},
249 {0x09, 621000},
250 {0x0A, 309000},
251 {0x0B, 151000},
252 {0, 80000},
253 {0x01, 41000},
254 {0x02, 21000},
255 {0x03, 11000},
256 {0x04, 6000},
257 {0x05, 4000},
258 {0x06, 3000},
259 {0x07, 2000},
261 /* KXTF9 */
263 {0x01, 81000},
264 {0x02, 41000},
265 {0x03, 21000},
266 {0x04, 11000},
267 {0x05, 5100},
268 {0x06, 2700},
272 static const struct {
273 u16 scale;
274 u8 gsel_0;
275 u8 gsel_1;
276 } KXCJK1013_scale_table[] = { {9582, 0, 0},
277 {19163, 1, 0},
278 {38326, 0, 1} };
280 static int kxcjk1013_set_mode(struct kxcjk1013_data *data,
281 enum kxcjk1013_mode mode)
283 int ret;
285 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
286 if (ret < 0) {
287 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
288 return ret;
291 if (mode == STANDBY)
292 ret &= ~KXCJK1013_REG_CTRL1_BIT_PC1;
293 else
294 ret |= KXCJK1013_REG_CTRL1_BIT_PC1;
296 ret = i2c_smbus_write_byte_data(data->client,
297 KXCJK1013_REG_CTRL1, ret);
298 if (ret < 0) {
299 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
300 return ret;
303 return 0;
306 static int kxcjk1013_get_mode(struct kxcjk1013_data *data,
307 enum kxcjk1013_mode *mode)
309 int ret;
311 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
312 if (ret < 0) {
313 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
314 return ret;
317 if (ret & KXCJK1013_REG_CTRL1_BIT_PC1)
318 *mode = OPERATION;
319 else
320 *mode = STANDBY;
322 return 0;
325 static int kxcjk1013_set_range(struct kxcjk1013_data *data, int range_index)
327 int ret;
329 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
330 if (ret < 0) {
331 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
332 return ret;
335 ret &= ~(KXCJK1013_REG_CTRL1_BIT_GSEL0 |
336 KXCJK1013_REG_CTRL1_BIT_GSEL1);
337 ret |= (KXCJK1013_scale_table[range_index].gsel_0 << 3);
338 ret |= (KXCJK1013_scale_table[range_index].gsel_1 << 4);
340 ret = i2c_smbus_write_byte_data(data->client,
341 KXCJK1013_REG_CTRL1,
342 ret);
343 if (ret < 0) {
344 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
345 return ret;
348 data->range = range_index;
350 return 0;
353 static int kxcjk1013_chip_init(struct kxcjk1013_data *data)
355 int ret;
357 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_WHO_AM_I);
358 if (ret < 0) {
359 dev_err(&data->client->dev, "Error reading who_am_i\n");
360 return ret;
363 dev_dbg(&data->client->dev, "KXCJK1013 Chip Id %x\n", ret);
365 ret = kxcjk1013_set_mode(data, STANDBY);
366 if (ret < 0)
367 return ret;
369 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
370 if (ret < 0) {
371 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
372 return ret;
375 /* Set 12 bit mode */
376 ret |= KXCJK1013_REG_CTRL1_BIT_RES;
378 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_CTRL1,
379 ret);
380 if (ret < 0) {
381 dev_err(&data->client->dev, "Error reading reg_ctrl\n");
382 return ret;
385 /* Setting range to 4G */
386 ret = kxcjk1013_set_range(data, KXCJK1013_RANGE_4G);
387 if (ret < 0)
388 return ret;
390 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_DATA_CTRL);
391 if (ret < 0) {
392 dev_err(&data->client->dev, "Error reading reg_data_ctrl\n");
393 return ret;
396 data->odr_bits = ret;
398 /* Set up INT polarity */
399 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1);
400 if (ret < 0) {
401 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
402 return ret;
405 if (data->active_high_intr)
406 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEA;
407 else
408 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEA;
410 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1,
411 ret);
412 if (ret < 0) {
413 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
414 return ret;
417 ret = kxcjk1013_set_mode(data, OPERATION);
418 if (ret < 0)
419 return ret;
421 data->wake_thres = KXCJK1013_DEFAULT_WAKE_THRES;
423 return 0;
426 #ifdef CONFIG_PM
427 static int kxcjk1013_get_startup_times(struct kxcjk1013_data *data)
429 int i;
430 int idx = data->chipset;
432 for (i = 0; i < ARRAY_SIZE(odr_start_up_times[idx]); ++i) {
433 if (odr_start_up_times[idx][i].odr_bits == data->odr_bits)
434 return odr_start_up_times[idx][i].usec;
437 return KXCJK1013_MAX_STARTUP_TIME_US;
439 #endif
441 static int kxcjk1013_set_power_state(struct kxcjk1013_data *data, bool on)
443 #ifdef CONFIG_PM
444 int ret;
446 if (on)
447 ret = pm_runtime_get_sync(&data->client->dev);
448 else {
449 pm_runtime_mark_last_busy(&data->client->dev);
450 ret = pm_runtime_put_autosuspend(&data->client->dev);
452 if (ret < 0) {
453 dev_err(&data->client->dev,
454 "Failed: kxcjk1013_set_power_state for %d\n", on);
455 if (on)
456 pm_runtime_put_noidle(&data->client->dev);
457 return ret;
459 #endif
461 return 0;
464 static int kxcjk1013_chip_update_thresholds(struct kxcjk1013_data *data)
466 int waketh_reg, ret;
468 ret = i2c_smbus_write_byte_data(data->client,
469 KXCJK1013_REG_WAKE_TIMER,
470 data->wake_dur);
471 if (ret < 0) {
472 dev_err(&data->client->dev,
473 "Error writing reg_wake_timer\n");
474 return ret;
477 waketh_reg = data->chipset == KXTF9 ?
478 KXTF9_REG_WAKE_THRESH : KXCJK1013_REG_WAKE_THRES;
479 ret = i2c_smbus_write_byte_data(data->client, waketh_reg,
480 data->wake_thres);
481 if (ret < 0) {
482 dev_err(&data->client->dev, "Error writing reg_wake_thres\n");
483 return ret;
486 return 0;
489 static int kxcjk1013_setup_any_motion_interrupt(struct kxcjk1013_data *data,
490 bool status)
492 int ret;
493 enum kxcjk1013_mode store_mode;
495 ret = kxcjk1013_get_mode(data, &store_mode);
496 if (ret < 0)
497 return ret;
499 /* This is requirement by spec to change state to STANDBY */
500 ret = kxcjk1013_set_mode(data, STANDBY);
501 if (ret < 0)
502 return ret;
504 ret = kxcjk1013_chip_update_thresholds(data);
505 if (ret < 0)
506 return ret;
508 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1);
509 if (ret < 0) {
510 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
511 return ret;
514 if (status)
515 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEN;
516 else
517 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN;
519 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1,
520 ret);
521 if (ret < 0) {
522 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
523 return ret;
526 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
527 if (ret < 0) {
528 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
529 return ret;
532 if (status)
533 ret |= KXCJK1013_REG_CTRL1_BIT_WUFE;
534 else
535 ret &= ~KXCJK1013_REG_CTRL1_BIT_WUFE;
537 ret = i2c_smbus_write_byte_data(data->client,
538 KXCJK1013_REG_CTRL1, ret);
539 if (ret < 0) {
540 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
541 return ret;
544 if (store_mode == OPERATION) {
545 ret = kxcjk1013_set_mode(data, OPERATION);
546 if (ret < 0)
547 return ret;
550 return 0;
553 static int kxcjk1013_setup_new_data_interrupt(struct kxcjk1013_data *data,
554 bool status)
556 int ret;
557 enum kxcjk1013_mode store_mode;
559 ret = kxcjk1013_get_mode(data, &store_mode);
560 if (ret < 0)
561 return ret;
563 /* This is requirement by spec to change state to STANDBY */
564 ret = kxcjk1013_set_mode(data, STANDBY);
565 if (ret < 0)
566 return ret;
568 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1);
569 if (ret < 0) {
570 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
571 return ret;
574 if (status)
575 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEN;
576 else
577 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN;
579 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1,
580 ret);
581 if (ret < 0) {
582 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
583 return ret;
586 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
587 if (ret < 0) {
588 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
589 return ret;
592 if (status)
593 ret |= KXCJK1013_REG_CTRL1_BIT_DRDY;
594 else
595 ret &= ~KXCJK1013_REG_CTRL1_BIT_DRDY;
597 ret = i2c_smbus_write_byte_data(data->client,
598 KXCJK1013_REG_CTRL1, ret);
599 if (ret < 0) {
600 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
601 return ret;
604 if (store_mode == OPERATION) {
605 ret = kxcjk1013_set_mode(data, OPERATION);
606 if (ret < 0)
607 return ret;
610 return 0;
613 static const struct kx_odr_map *kxcjk1013_find_odr_value(
614 const struct kx_odr_map *map, size_t map_size, int val, int val2)
616 int i;
618 for (i = 0; i < map_size; ++i) {
619 if (map[i].val == val && map[i].val2 == val2)
620 return &map[i];
623 return ERR_PTR(-EINVAL);
626 static int kxcjk1013_convert_odr_value(const struct kx_odr_map *map,
627 size_t map_size, int odr_bits,
628 int *val, int *val2)
630 int i;
632 for (i = 0; i < map_size; ++i) {
633 if (map[i].odr_bits == odr_bits) {
634 *val = map[i].val;
635 *val2 = map[i].val2;
636 return IIO_VAL_INT_PLUS_MICRO;
640 return -EINVAL;
643 static int kxcjk1013_set_odr(struct kxcjk1013_data *data, int val, int val2)
645 int ret;
646 enum kxcjk1013_mode store_mode;
647 const struct kx_odr_map *odr_setting;
649 ret = kxcjk1013_get_mode(data, &store_mode);
650 if (ret < 0)
651 return ret;
653 if (data->chipset == KXTF9)
654 odr_setting = kxcjk1013_find_odr_value(kxtf9_samp_freq_table,
655 ARRAY_SIZE(kxtf9_samp_freq_table),
656 val, val2);
657 else
658 odr_setting = kxcjk1013_find_odr_value(samp_freq_table,
659 ARRAY_SIZE(samp_freq_table),
660 val, val2);
662 if (IS_ERR(odr_setting))
663 return PTR_ERR(odr_setting);
665 /* To change ODR, the chip must be set to STANDBY as per spec */
666 ret = kxcjk1013_set_mode(data, STANDBY);
667 if (ret < 0)
668 return ret;
670 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_DATA_CTRL,
671 odr_setting->odr_bits);
672 if (ret < 0) {
673 dev_err(&data->client->dev, "Error writing data_ctrl\n");
674 return ret;
677 data->odr_bits = odr_setting->odr_bits;
679 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_CTRL2,
680 odr_setting->wuf_bits);
681 if (ret < 0) {
682 dev_err(&data->client->dev, "Error writing reg_ctrl2\n");
683 return ret;
686 if (store_mode == OPERATION) {
687 ret = kxcjk1013_set_mode(data, OPERATION);
688 if (ret < 0)
689 return ret;
692 return 0;
695 static int kxcjk1013_get_odr(struct kxcjk1013_data *data, int *val, int *val2)
697 if (data->chipset == KXTF9)
698 return kxcjk1013_convert_odr_value(kxtf9_samp_freq_table,
699 ARRAY_SIZE(kxtf9_samp_freq_table),
700 data->odr_bits, val, val2);
701 else
702 return kxcjk1013_convert_odr_value(samp_freq_table,
703 ARRAY_SIZE(samp_freq_table),
704 data->odr_bits, val, val2);
707 static int kxcjk1013_get_acc_reg(struct kxcjk1013_data *data, int axis)
709 u8 reg = KXCJK1013_REG_XOUT_L + axis * 2;
710 int ret;
712 ret = i2c_smbus_read_word_data(data->client, reg);
713 if (ret < 0) {
714 dev_err(&data->client->dev,
715 "failed to read accel_%c registers\n", 'x' + axis);
716 return ret;
719 return ret;
722 static int kxcjk1013_set_scale(struct kxcjk1013_data *data, int val)
724 int ret, i;
725 enum kxcjk1013_mode store_mode;
727 for (i = 0; i < ARRAY_SIZE(KXCJK1013_scale_table); ++i) {
728 if (KXCJK1013_scale_table[i].scale == val) {
729 ret = kxcjk1013_get_mode(data, &store_mode);
730 if (ret < 0)
731 return ret;
733 ret = kxcjk1013_set_mode(data, STANDBY);
734 if (ret < 0)
735 return ret;
737 ret = kxcjk1013_set_range(data, i);
738 if (ret < 0)
739 return ret;
741 if (store_mode == OPERATION) {
742 ret = kxcjk1013_set_mode(data, OPERATION);
743 if (ret)
744 return ret;
747 return 0;
751 return -EINVAL;
754 static int kxcjk1013_read_raw(struct iio_dev *indio_dev,
755 struct iio_chan_spec const *chan, int *val,
756 int *val2, long mask)
758 struct kxcjk1013_data *data = iio_priv(indio_dev);
759 int ret;
761 switch (mask) {
762 case IIO_CHAN_INFO_RAW:
763 mutex_lock(&data->mutex);
764 if (iio_buffer_enabled(indio_dev))
765 ret = -EBUSY;
766 else {
767 ret = kxcjk1013_set_power_state(data, true);
768 if (ret < 0) {
769 mutex_unlock(&data->mutex);
770 return ret;
772 ret = kxcjk1013_get_acc_reg(data, chan->scan_index);
773 if (ret < 0) {
774 kxcjk1013_set_power_state(data, false);
775 mutex_unlock(&data->mutex);
776 return ret;
778 *val = sign_extend32(ret >> 4, 11);
779 ret = kxcjk1013_set_power_state(data, false);
781 mutex_unlock(&data->mutex);
783 if (ret < 0)
784 return ret;
786 return IIO_VAL_INT;
788 case IIO_CHAN_INFO_SCALE:
789 *val = 0;
790 *val2 = KXCJK1013_scale_table[data->range].scale;
791 return IIO_VAL_INT_PLUS_MICRO;
793 case IIO_CHAN_INFO_SAMP_FREQ:
794 mutex_lock(&data->mutex);
795 ret = kxcjk1013_get_odr(data, val, val2);
796 mutex_unlock(&data->mutex);
797 return ret;
799 default:
800 return -EINVAL;
804 static int kxcjk1013_write_raw(struct iio_dev *indio_dev,
805 struct iio_chan_spec const *chan, int val,
806 int val2, long mask)
808 struct kxcjk1013_data *data = iio_priv(indio_dev);
809 int ret;
811 switch (mask) {
812 case IIO_CHAN_INFO_SAMP_FREQ:
813 mutex_lock(&data->mutex);
814 ret = kxcjk1013_set_odr(data, val, val2);
815 mutex_unlock(&data->mutex);
816 break;
817 case IIO_CHAN_INFO_SCALE:
818 if (val)
819 return -EINVAL;
821 mutex_lock(&data->mutex);
822 ret = kxcjk1013_set_scale(data, val2);
823 mutex_unlock(&data->mutex);
824 break;
825 default:
826 ret = -EINVAL;
829 return ret;
832 static int kxcjk1013_read_event(struct iio_dev *indio_dev,
833 const struct iio_chan_spec *chan,
834 enum iio_event_type type,
835 enum iio_event_direction dir,
836 enum iio_event_info info,
837 int *val, int *val2)
839 struct kxcjk1013_data *data = iio_priv(indio_dev);
841 *val2 = 0;
842 switch (info) {
843 case IIO_EV_INFO_VALUE:
844 *val = data->wake_thres;
845 break;
846 case IIO_EV_INFO_PERIOD:
847 *val = data->wake_dur;
848 break;
849 default:
850 return -EINVAL;
853 return IIO_VAL_INT;
856 static int kxcjk1013_write_event(struct iio_dev *indio_dev,
857 const struct iio_chan_spec *chan,
858 enum iio_event_type type,
859 enum iio_event_direction dir,
860 enum iio_event_info info,
861 int val, int val2)
863 struct kxcjk1013_data *data = iio_priv(indio_dev);
865 if (data->ev_enable_state)
866 return -EBUSY;
868 switch (info) {
869 case IIO_EV_INFO_VALUE:
870 data->wake_thres = val;
871 break;
872 case IIO_EV_INFO_PERIOD:
873 data->wake_dur = val;
874 break;
875 default:
876 return -EINVAL;
879 return 0;
882 static int kxcjk1013_read_event_config(struct iio_dev *indio_dev,
883 const struct iio_chan_spec *chan,
884 enum iio_event_type type,
885 enum iio_event_direction dir)
887 struct kxcjk1013_data *data = iio_priv(indio_dev);
889 return data->ev_enable_state;
892 static int kxcjk1013_write_event_config(struct iio_dev *indio_dev,
893 const struct iio_chan_spec *chan,
894 enum iio_event_type type,
895 enum iio_event_direction dir,
896 int state)
898 struct kxcjk1013_data *data = iio_priv(indio_dev);
899 int ret;
901 if (state && data->ev_enable_state)
902 return 0;
904 mutex_lock(&data->mutex);
906 if (!state && data->motion_trigger_on) {
907 data->ev_enable_state = 0;
908 mutex_unlock(&data->mutex);
909 return 0;
913 * We will expect the enable and disable to do operation in
914 * in reverse order. This will happen here anyway as our
915 * resume operation uses sync mode runtime pm calls, the
916 * suspend operation will be delayed by autosuspend delay
917 * So the disable operation will still happen in reverse of
918 * enable operation. When runtime pm is disabled the mode
919 * is always on so sequence doesn't matter
921 ret = kxcjk1013_set_power_state(data, state);
922 if (ret < 0) {
923 mutex_unlock(&data->mutex);
924 return ret;
927 ret = kxcjk1013_setup_any_motion_interrupt(data, state);
928 if (ret < 0) {
929 kxcjk1013_set_power_state(data, false);
930 data->ev_enable_state = 0;
931 mutex_unlock(&data->mutex);
932 return ret;
935 data->ev_enable_state = state;
936 mutex_unlock(&data->mutex);
938 return 0;
941 static int kxcjk1013_buffer_preenable(struct iio_dev *indio_dev)
943 struct kxcjk1013_data *data = iio_priv(indio_dev);
945 return kxcjk1013_set_power_state(data, true);
948 static int kxcjk1013_buffer_postdisable(struct iio_dev *indio_dev)
950 struct kxcjk1013_data *data = iio_priv(indio_dev);
952 return kxcjk1013_set_power_state(data, false);
955 static ssize_t kxcjk1013_get_samp_freq_avail(struct device *dev,
956 struct device_attribute *attr,
957 char *buf)
959 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
960 struct kxcjk1013_data *data = iio_priv(indio_dev);
961 const char *str;
963 if (data->chipset == KXTF9)
964 str = kxtf9_samp_freq_avail;
965 else
966 str = kxcjk1013_samp_freq_avail;
968 return sprintf(buf, "%s\n", str);
971 static IIO_DEVICE_ATTR(in_accel_sampling_frequency_available, S_IRUGO,
972 kxcjk1013_get_samp_freq_avail, NULL, 0);
974 static IIO_CONST_ATTR(in_accel_scale_available, "0.009582 0.019163 0.038326");
976 static struct attribute *kxcjk1013_attributes[] = {
977 &iio_dev_attr_in_accel_sampling_frequency_available.dev_attr.attr,
978 &iio_const_attr_in_accel_scale_available.dev_attr.attr,
979 NULL,
982 static const struct attribute_group kxcjk1013_attrs_group = {
983 .attrs = kxcjk1013_attributes,
986 static const struct iio_event_spec kxcjk1013_event = {
987 .type = IIO_EV_TYPE_THRESH,
988 .dir = IIO_EV_DIR_EITHER,
989 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
990 BIT(IIO_EV_INFO_ENABLE) |
991 BIT(IIO_EV_INFO_PERIOD)
994 #define KXCJK1013_CHANNEL(_axis) { \
995 .type = IIO_ACCEL, \
996 .modified = 1, \
997 .channel2 = IIO_MOD_##_axis, \
998 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
999 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
1000 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
1001 .scan_index = AXIS_##_axis, \
1002 .scan_type = { \
1003 .sign = 's', \
1004 .realbits = 12, \
1005 .storagebits = 16, \
1006 .shift = 4, \
1007 .endianness = IIO_LE, \
1008 }, \
1009 .event_spec = &kxcjk1013_event, \
1010 .num_event_specs = 1 \
1013 static const struct iio_chan_spec kxcjk1013_channels[] = {
1014 KXCJK1013_CHANNEL(X),
1015 KXCJK1013_CHANNEL(Y),
1016 KXCJK1013_CHANNEL(Z),
1017 IIO_CHAN_SOFT_TIMESTAMP(3),
1020 static const struct iio_buffer_setup_ops kxcjk1013_buffer_setup_ops = {
1021 .preenable = kxcjk1013_buffer_preenable,
1022 .postenable = iio_triggered_buffer_postenable,
1023 .postdisable = kxcjk1013_buffer_postdisable,
1024 .predisable = iio_triggered_buffer_predisable,
1027 static const struct iio_info kxcjk1013_info = {
1028 .attrs = &kxcjk1013_attrs_group,
1029 .read_raw = kxcjk1013_read_raw,
1030 .write_raw = kxcjk1013_write_raw,
1031 .read_event_value = kxcjk1013_read_event,
1032 .write_event_value = kxcjk1013_write_event,
1033 .write_event_config = kxcjk1013_write_event_config,
1034 .read_event_config = kxcjk1013_read_event_config,
1037 static const unsigned long kxcjk1013_scan_masks[] = {0x7, 0};
1039 static irqreturn_t kxcjk1013_trigger_handler(int irq, void *p)
1041 struct iio_poll_func *pf = p;
1042 struct iio_dev *indio_dev = pf->indio_dev;
1043 struct kxcjk1013_data *data = iio_priv(indio_dev);
1044 int ret;
1046 mutex_lock(&data->mutex);
1047 ret = i2c_smbus_read_i2c_block_data_or_emulated(data->client,
1048 KXCJK1013_REG_XOUT_L,
1049 AXIS_MAX * 2,
1050 (u8 *)data->buffer);
1051 mutex_unlock(&data->mutex);
1052 if (ret < 0)
1053 goto err;
1055 iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
1056 data->timestamp);
1057 err:
1058 iio_trigger_notify_done(indio_dev->trig);
1060 return IRQ_HANDLED;
1063 static int kxcjk1013_trig_try_reen(struct iio_trigger *trig)
1065 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
1066 struct kxcjk1013_data *data = iio_priv(indio_dev);
1067 int ret;
1069 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_REL);
1070 if (ret < 0) {
1071 dev_err(&data->client->dev, "Error reading reg_int_rel\n");
1072 return ret;
1075 return 0;
1078 static int kxcjk1013_data_rdy_trigger_set_state(struct iio_trigger *trig,
1079 bool state)
1081 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
1082 struct kxcjk1013_data *data = iio_priv(indio_dev);
1083 int ret;
1085 mutex_lock(&data->mutex);
1087 if (!state && data->ev_enable_state && data->motion_trigger_on) {
1088 data->motion_trigger_on = false;
1089 mutex_unlock(&data->mutex);
1090 return 0;
1093 ret = kxcjk1013_set_power_state(data, state);
1094 if (ret < 0) {
1095 mutex_unlock(&data->mutex);
1096 return ret;
1098 if (data->motion_trig == trig)
1099 ret = kxcjk1013_setup_any_motion_interrupt(data, state);
1100 else
1101 ret = kxcjk1013_setup_new_data_interrupt(data, state);
1102 if (ret < 0) {
1103 kxcjk1013_set_power_state(data, false);
1104 mutex_unlock(&data->mutex);
1105 return ret;
1107 if (data->motion_trig == trig)
1108 data->motion_trigger_on = state;
1109 else
1110 data->dready_trigger_on = state;
1112 mutex_unlock(&data->mutex);
1114 return 0;
1117 static const struct iio_trigger_ops kxcjk1013_trigger_ops = {
1118 .set_trigger_state = kxcjk1013_data_rdy_trigger_set_state,
1119 .try_reenable = kxcjk1013_trig_try_reen,
1122 static void kxcjk1013_report_motion_event(struct iio_dev *indio_dev)
1124 struct kxcjk1013_data *data = iio_priv(indio_dev);
1126 int ret = i2c_smbus_read_byte_data(data->client,
1127 KXCJK1013_REG_INT_SRC2);
1128 if (ret < 0) {
1129 dev_err(&data->client->dev, "Error reading reg_int_src2\n");
1130 return;
1133 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XN)
1134 iio_push_event(indio_dev,
1135 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1137 IIO_MOD_X,
1138 IIO_EV_TYPE_THRESH,
1139 IIO_EV_DIR_FALLING),
1140 data->timestamp);
1142 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XP)
1143 iio_push_event(indio_dev,
1144 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1146 IIO_MOD_X,
1147 IIO_EV_TYPE_THRESH,
1148 IIO_EV_DIR_RISING),
1149 data->timestamp);
1151 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YN)
1152 iio_push_event(indio_dev,
1153 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1155 IIO_MOD_Y,
1156 IIO_EV_TYPE_THRESH,
1157 IIO_EV_DIR_FALLING),
1158 data->timestamp);
1160 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YP)
1161 iio_push_event(indio_dev,
1162 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1164 IIO_MOD_Y,
1165 IIO_EV_TYPE_THRESH,
1166 IIO_EV_DIR_RISING),
1167 data->timestamp);
1169 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZN)
1170 iio_push_event(indio_dev,
1171 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1173 IIO_MOD_Z,
1174 IIO_EV_TYPE_THRESH,
1175 IIO_EV_DIR_FALLING),
1176 data->timestamp);
1178 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZP)
1179 iio_push_event(indio_dev,
1180 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1182 IIO_MOD_Z,
1183 IIO_EV_TYPE_THRESH,
1184 IIO_EV_DIR_RISING),
1185 data->timestamp);
1188 static irqreturn_t kxcjk1013_event_handler(int irq, void *private)
1190 struct iio_dev *indio_dev = private;
1191 struct kxcjk1013_data *data = iio_priv(indio_dev);
1192 int ret;
1194 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_SRC1);
1195 if (ret < 0) {
1196 dev_err(&data->client->dev, "Error reading reg_int_src1\n");
1197 goto ack_intr;
1200 if (ret & KXCJK1013_REG_INT_SRC1_BIT_WUFS) {
1201 if (data->chipset == KXTF9)
1202 iio_push_event(indio_dev,
1203 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1205 IIO_MOD_X_AND_Y_AND_Z,
1206 IIO_EV_TYPE_THRESH,
1207 IIO_EV_DIR_RISING),
1208 data->timestamp);
1209 else
1210 kxcjk1013_report_motion_event(indio_dev);
1213 ack_intr:
1214 if (data->dready_trigger_on)
1215 return IRQ_HANDLED;
1217 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_REL);
1218 if (ret < 0)
1219 dev_err(&data->client->dev, "Error reading reg_int_rel\n");
1221 return IRQ_HANDLED;
1224 static irqreturn_t kxcjk1013_data_rdy_trig_poll(int irq, void *private)
1226 struct iio_dev *indio_dev = private;
1227 struct kxcjk1013_data *data = iio_priv(indio_dev);
1229 data->timestamp = iio_get_time_ns(indio_dev);
1231 if (data->dready_trigger_on)
1232 iio_trigger_poll(data->dready_trig);
1233 else if (data->motion_trigger_on)
1234 iio_trigger_poll(data->motion_trig);
1236 if (data->ev_enable_state)
1237 return IRQ_WAKE_THREAD;
1238 else
1239 return IRQ_HANDLED;
1242 static const char *kxcjk1013_match_acpi_device(struct device *dev,
1243 enum kx_chipset *chipset,
1244 bool *is_smo8500_device)
1246 const struct acpi_device_id *id;
1248 id = acpi_match_device(dev->driver->acpi_match_table, dev);
1249 if (!id)
1250 return NULL;
1252 if (strcmp(id->id, "SMO8500") == 0)
1253 *is_smo8500_device = true;
1255 *chipset = (enum kx_chipset)id->driver_data;
1257 return dev_name(dev);
1260 static int kxcjk1013_probe(struct i2c_client *client,
1261 const struct i2c_device_id *id)
1263 struct kxcjk1013_data *data;
1264 struct iio_dev *indio_dev;
1265 struct kxcjk_1013_platform_data *pdata;
1266 const char *name;
1267 int ret;
1269 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1270 if (!indio_dev)
1271 return -ENOMEM;
1273 data = iio_priv(indio_dev);
1274 i2c_set_clientdata(client, indio_dev);
1275 data->client = client;
1277 pdata = dev_get_platdata(&client->dev);
1278 if (pdata)
1279 data->active_high_intr = pdata->active_high_intr;
1280 else
1281 data->active_high_intr = true; /* default polarity */
1283 if (id) {
1284 data->chipset = (enum kx_chipset)(id->driver_data);
1285 name = id->name;
1286 } else if (ACPI_HANDLE(&client->dev)) {
1287 name = kxcjk1013_match_acpi_device(&client->dev,
1288 &data->chipset,
1289 &data->is_smo8500_device);
1290 } else
1291 return -ENODEV;
1293 ret = kxcjk1013_chip_init(data);
1294 if (ret < 0)
1295 return ret;
1297 mutex_init(&data->mutex);
1299 indio_dev->dev.parent = &client->dev;
1300 indio_dev->channels = kxcjk1013_channels;
1301 indio_dev->num_channels = ARRAY_SIZE(kxcjk1013_channels);
1302 indio_dev->available_scan_masks = kxcjk1013_scan_masks;
1303 indio_dev->name = name;
1304 indio_dev->modes = INDIO_DIRECT_MODE;
1305 indio_dev->info = &kxcjk1013_info;
1307 if (client->irq > 0 && !data->is_smo8500_device) {
1308 ret = devm_request_threaded_irq(&client->dev, client->irq,
1309 kxcjk1013_data_rdy_trig_poll,
1310 kxcjk1013_event_handler,
1311 IRQF_TRIGGER_RISING,
1312 KXCJK1013_IRQ_NAME,
1313 indio_dev);
1314 if (ret)
1315 goto err_poweroff;
1317 data->dready_trig = devm_iio_trigger_alloc(&client->dev,
1318 "%s-dev%d",
1319 indio_dev->name,
1320 indio_dev->id);
1321 if (!data->dready_trig) {
1322 ret = -ENOMEM;
1323 goto err_poweroff;
1326 data->motion_trig = devm_iio_trigger_alloc(&client->dev,
1327 "%s-any-motion-dev%d",
1328 indio_dev->name,
1329 indio_dev->id);
1330 if (!data->motion_trig) {
1331 ret = -ENOMEM;
1332 goto err_poweroff;
1335 data->dready_trig->dev.parent = &client->dev;
1336 data->dready_trig->ops = &kxcjk1013_trigger_ops;
1337 iio_trigger_set_drvdata(data->dready_trig, indio_dev);
1338 indio_dev->trig = data->dready_trig;
1339 iio_trigger_get(indio_dev->trig);
1340 ret = iio_trigger_register(data->dready_trig);
1341 if (ret)
1342 goto err_poweroff;
1344 data->motion_trig->dev.parent = &client->dev;
1345 data->motion_trig->ops = &kxcjk1013_trigger_ops;
1346 iio_trigger_set_drvdata(data->motion_trig, indio_dev);
1347 ret = iio_trigger_register(data->motion_trig);
1348 if (ret) {
1349 data->motion_trig = NULL;
1350 goto err_trigger_unregister;
1354 ret = iio_triggered_buffer_setup(indio_dev,
1355 &iio_pollfunc_store_time,
1356 kxcjk1013_trigger_handler,
1357 &kxcjk1013_buffer_setup_ops);
1358 if (ret < 0) {
1359 dev_err(&client->dev, "iio triggered buffer setup failed\n");
1360 goto err_trigger_unregister;
1363 ret = pm_runtime_set_active(&client->dev);
1364 if (ret)
1365 goto err_buffer_cleanup;
1367 pm_runtime_enable(&client->dev);
1368 pm_runtime_set_autosuspend_delay(&client->dev,
1369 KXCJK1013_SLEEP_DELAY_MS);
1370 pm_runtime_use_autosuspend(&client->dev);
1372 ret = iio_device_register(indio_dev);
1373 if (ret < 0) {
1374 dev_err(&client->dev, "unable to register iio device\n");
1375 goto err_buffer_cleanup;
1378 return 0;
1380 err_buffer_cleanup:
1381 if (data->dready_trig)
1382 iio_triggered_buffer_cleanup(indio_dev);
1383 err_trigger_unregister:
1384 if (data->dready_trig)
1385 iio_trigger_unregister(data->dready_trig);
1386 if (data->motion_trig)
1387 iio_trigger_unregister(data->motion_trig);
1388 err_poweroff:
1389 kxcjk1013_set_mode(data, STANDBY);
1391 return ret;
1394 static int kxcjk1013_remove(struct i2c_client *client)
1396 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1397 struct kxcjk1013_data *data = iio_priv(indio_dev);
1399 iio_device_unregister(indio_dev);
1401 pm_runtime_disable(&client->dev);
1402 pm_runtime_set_suspended(&client->dev);
1403 pm_runtime_put_noidle(&client->dev);
1405 if (data->dready_trig) {
1406 iio_triggered_buffer_cleanup(indio_dev);
1407 iio_trigger_unregister(data->dready_trig);
1408 iio_trigger_unregister(data->motion_trig);
1411 mutex_lock(&data->mutex);
1412 kxcjk1013_set_mode(data, STANDBY);
1413 mutex_unlock(&data->mutex);
1415 return 0;
1418 #ifdef CONFIG_PM_SLEEP
1419 static int kxcjk1013_suspend(struct device *dev)
1421 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1422 struct kxcjk1013_data *data = iio_priv(indio_dev);
1423 int ret;
1425 mutex_lock(&data->mutex);
1426 ret = kxcjk1013_set_mode(data, STANDBY);
1427 mutex_unlock(&data->mutex);
1429 return ret;
1432 static int kxcjk1013_resume(struct device *dev)
1434 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1435 struct kxcjk1013_data *data = iio_priv(indio_dev);
1436 int ret = 0;
1438 mutex_lock(&data->mutex);
1439 ret = kxcjk1013_set_mode(data, OPERATION);
1440 mutex_unlock(&data->mutex);
1442 return ret;
1444 #endif
1446 #ifdef CONFIG_PM
1447 static int kxcjk1013_runtime_suspend(struct device *dev)
1449 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1450 struct kxcjk1013_data *data = iio_priv(indio_dev);
1451 int ret;
1453 ret = kxcjk1013_set_mode(data, STANDBY);
1454 if (ret < 0) {
1455 dev_err(&data->client->dev, "powering off device failed\n");
1456 return -EAGAIN;
1458 return 0;
1461 static int kxcjk1013_runtime_resume(struct device *dev)
1463 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1464 struct kxcjk1013_data *data = iio_priv(indio_dev);
1465 int ret;
1466 int sleep_val;
1468 ret = kxcjk1013_set_mode(data, OPERATION);
1469 if (ret < 0)
1470 return ret;
1472 sleep_val = kxcjk1013_get_startup_times(data);
1473 if (sleep_val < 20000)
1474 usleep_range(sleep_val, 20000);
1475 else
1476 msleep_interruptible(sleep_val/1000);
1478 return 0;
1480 #endif
1482 static const struct dev_pm_ops kxcjk1013_pm_ops = {
1483 SET_SYSTEM_SLEEP_PM_OPS(kxcjk1013_suspend, kxcjk1013_resume)
1484 SET_RUNTIME_PM_OPS(kxcjk1013_runtime_suspend,
1485 kxcjk1013_runtime_resume, NULL)
1488 static const struct acpi_device_id kx_acpi_match[] = {
1489 {"KXCJ1013", KXCJK1013},
1490 {"KXCJ1008", KXCJ91008},
1491 {"KXCJ9000", KXCJ91008},
1492 {"KIOX000A", KXCJ91008},
1493 {"KXTJ1009", KXTJ21009},
1494 {"SMO8500", KXCJ91008},
1495 { },
1497 MODULE_DEVICE_TABLE(acpi, kx_acpi_match);
1499 static const struct i2c_device_id kxcjk1013_id[] = {
1500 {"kxcjk1013", KXCJK1013},
1501 {"kxcj91008", KXCJ91008},
1502 {"kxtj21009", KXTJ21009},
1503 {"kxtf9", KXTF9},
1504 {"SMO8500", KXCJ91008},
1508 MODULE_DEVICE_TABLE(i2c, kxcjk1013_id);
1510 static struct i2c_driver kxcjk1013_driver = {
1511 .driver = {
1512 .name = KXCJK1013_DRV_NAME,
1513 .acpi_match_table = ACPI_PTR(kx_acpi_match),
1514 .pm = &kxcjk1013_pm_ops,
1516 .probe = kxcjk1013_probe,
1517 .remove = kxcjk1013_remove,
1518 .id_table = kxcjk1013_id,
1520 module_i2c_driver(kxcjk1013_driver);
1522 MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
1523 MODULE_LICENSE("GPL v2");
1524 MODULE_DESCRIPTION("KXCJK1013 accelerometer driver");