Linux 4.16.11
[linux/fpc-iii.git] / drivers / media / dvb-frontends / atbm8830.c
blob7b0f3239dbba5ab70d387003f484ce0211411aa1
1 /*
2 * Support for AltoBeam GB20600 (a.k.a DMB-TH) demodulator
3 * ATBM8830, ATBM8831
5 * Copyright (C) 2009 David T.L. Wong <davidtlwong@gmail.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 #include <asm/div64.h>
19 #include <media/dvb_frontend.h>
21 #include "atbm8830.h"
22 #include "atbm8830_priv.h"
24 #define dprintk(args...) \
25 do { \
26 if (debug) \
27 printk(KERN_DEBUG "atbm8830: " args); \
28 } while (0)
30 static int debug;
32 module_param(debug, int, 0644);
33 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
35 static int atbm8830_write_reg(struct atbm_state *priv, u16 reg, u8 data)
37 int ret = 0;
38 u8 dev_addr;
39 u8 buf1[] = { reg >> 8, reg & 0xFF };
40 u8 buf2[] = { data };
41 struct i2c_msg msg1 = { .flags = 0, .buf = buf1, .len = 2 };
42 struct i2c_msg msg2 = { .flags = 0, .buf = buf2, .len = 1 };
44 dev_addr = priv->config->demod_address;
45 msg1.addr = dev_addr;
46 msg2.addr = dev_addr;
48 if (debug >= 2)
49 dprintk("%s: reg=0x%04X, data=0x%02X\n", __func__, reg, data);
51 ret = i2c_transfer(priv->i2c, &msg1, 1);
52 if (ret != 1)
53 return -EIO;
55 ret = i2c_transfer(priv->i2c, &msg2, 1);
56 return (ret != 1) ? -EIO : 0;
59 static int atbm8830_read_reg(struct atbm_state *priv, u16 reg, u8 *p_data)
61 int ret;
62 u8 dev_addr;
64 u8 buf1[] = { reg >> 8, reg & 0xFF };
65 u8 buf2[] = { 0 };
66 struct i2c_msg msg1 = { .flags = 0, .buf = buf1, .len = 2 };
67 struct i2c_msg msg2 = { .flags = I2C_M_RD, .buf = buf2, .len = 1 };
69 dev_addr = priv->config->demod_address;
70 msg1.addr = dev_addr;
71 msg2.addr = dev_addr;
73 ret = i2c_transfer(priv->i2c, &msg1, 1);
74 if (ret != 1) {
75 dprintk("%s: error reg=0x%04x, ret=%i\n", __func__, reg, ret);
76 return -EIO;
79 ret = i2c_transfer(priv->i2c, &msg2, 1);
80 if (ret != 1)
81 return -EIO;
83 *p_data = buf2[0];
84 if (debug >= 2)
85 dprintk("%s: reg=0x%04X, data=0x%02X\n",
86 __func__, reg, buf2[0]);
88 return 0;
91 /* Lock register latch so that multi-register read is atomic */
92 static inline int atbm8830_reglatch_lock(struct atbm_state *priv, int lock)
94 return atbm8830_write_reg(priv, REG_READ_LATCH, lock ? 1 : 0);
97 static int set_osc_freq(struct atbm_state *priv, u32 freq /*in kHz*/)
99 u32 val;
100 u64 t;
102 /* 0x100000 * freq / 30.4MHz */
103 t = (u64)0x100000 * freq;
104 do_div(t, 30400);
105 val = t;
107 atbm8830_write_reg(priv, REG_OSC_CLK, val);
108 atbm8830_write_reg(priv, REG_OSC_CLK + 1, val >> 8);
109 atbm8830_write_reg(priv, REG_OSC_CLK + 2, val >> 16);
111 return 0;
114 static int set_if_freq(struct atbm_state *priv, u32 freq /*in kHz*/)
117 u32 fs = priv->config->osc_clk_freq;
118 u64 t;
119 u32 val;
120 u8 dat;
122 if (freq != 0) {
123 /* 2 * PI * (freq - fs) / fs * (2 ^ 22) */
124 t = (u64) 2 * 31416 * (freq - fs);
125 t <<= 22;
126 do_div(t, fs);
127 do_div(t, 1000);
128 val = t;
130 atbm8830_write_reg(priv, REG_TUNER_BASEBAND, 1);
131 atbm8830_write_reg(priv, REG_IF_FREQ, val);
132 atbm8830_write_reg(priv, REG_IF_FREQ+1, val >> 8);
133 atbm8830_write_reg(priv, REG_IF_FREQ+2, val >> 16);
135 atbm8830_read_reg(priv, REG_ADC_CONFIG, &dat);
136 dat &= 0xFC;
137 atbm8830_write_reg(priv, REG_ADC_CONFIG, dat);
138 } else {
139 /* Zero IF */
140 atbm8830_write_reg(priv, REG_TUNER_BASEBAND, 0);
142 atbm8830_read_reg(priv, REG_ADC_CONFIG, &dat);
143 dat &= 0xFC;
144 dat |= 0x02;
145 atbm8830_write_reg(priv, REG_ADC_CONFIG, dat);
147 if (priv->config->zif_swap_iq)
148 atbm8830_write_reg(priv, REG_SWAP_I_Q, 0x03);
149 else
150 atbm8830_write_reg(priv, REG_SWAP_I_Q, 0x01);
153 return 0;
156 static int is_locked(struct atbm_state *priv, u8 *locked)
158 u8 status;
160 atbm8830_read_reg(priv, REG_LOCK_STATUS, &status);
162 if (locked != NULL)
163 *locked = (status == 1);
164 return 0;
167 static int set_agc_config(struct atbm_state *priv,
168 u8 min, u8 max, u8 hold_loop)
170 /* no effect if both min and max are zero */
171 if (!min && !max)
172 return 0;
174 atbm8830_write_reg(priv, REG_AGC_MIN, min);
175 atbm8830_write_reg(priv, REG_AGC_MAX, max);
176 atbm8830_write_reg(priv, REG_AGC_HOLD_LOOP, hold_loop);
178 return 0;
181 static int set_static_channel_mode(struct atbm_state *priv)
183 int i;
185 for (i = 0; i < 5; i++)
186 atbm8830_write_reg(priv, 0x099B + i, 0x08);
188 atbm8830_write_reg(priv, 0x095B, 0x7F);
189 atbm8830_write_reg(priv, 0x09CB, 0x01);
190 atbm8830_write_reg(priv, 0x09CC, 0x7F);
191 atbm8830_write_reg(priv, 0x09CD, 0x7F);
192 atbm8830_write_reg(priv, 0x0E01, 0x20);
194 /* For single carrier */
195 atbm8830_write_reg(priv, 0x0B03, 0x0A);
196 atbm8830_write_reg(priv, 0x0935, 0x10);
197 atbm8830_write_reg(priv, 0x0936, 0x08);
198 atbm8830_write_reg(priv, 0x093E, 0x08);
199 atbm8830_write_reg(priv, 0x096E, 0x06);
201 /* frame_count_max0 */
202 atbm8830_write_reg(priv, 0x0B09, 0x00);
203 /* frame_count_max1 */
204 atbm8830_write_reg(priv, 0x0B0A, 0x08);
206 return 0;
209 static int set_ts_config(struct atbm_state *priv)
211 const struct atbm8830_config *cfg = priv->config;
213 /*Set parallel/serial ts mode*/
214 atbm8830_write_reg(priv, REG_TS_SERIAL, cfg->serial_ts ? 1 : 0);
215 atbm8830_write_reg(priv, REG_TS_CLK_MODE, cfg->serial_ts ? 1 : 0);
216 /*Set ts sampling edge*/
217 atbm8830_write_reg(priv, REG_TS_SAMPLE_EDGE,
218 cfg->ts_sampling_edge ? 1 : 0);
219 /*Set ts clock freerun*/
220 atbm8830_write_reg(priv, REG_TS_CLK_FREERUN,
221 cfg->ts_clk_gated ? 0 : 1);
223 return 0;
226 static int atbm8830_init(struct dvb_frontend *fe)
228 struct atbm_state *priv = fe->demodulator_priv;
229 const struct atbm8830_config *cfg = priv->config;
231 /*Set oscillator frequency*/
232 set_osc_freq(priv, cfg->osc_clk_freq);
234 /*Set IF frequency*/
235 set_if_freq(priv, cfg->if_freq);
237 /*Set AGC Config*/
238 set_agc_config(priv, cfg->agc_min, cfg->agc_max,
239 cfg->agc_hold_loop);
241 /*Set static channel mode*/
242 set_static_channel_mode(priv);
244 set_ts_config(priv);
245 /*Turn off DSP reset*/
246 atbm8830_write_reg(priv, 0x000A, 0);
248 /*SW version test*/
249 atbm8830_write_reg(priv, 0x020C, 11);
251 /* Run */
252 atbm8830_write_reg(priv, REG_DEMOD_RUN, 1);
254 return 0;
258 static void atbm8830_release(struct dvb_frontend *fe)
260 struct atbm_state *state = fe->demodulator_priv;
261 dprintk("%s\n", __func__);
263 kfree(state);
266 static int atbm8830_set_fe(struct dvb_frontend *fe)
268 struct atbm_state *priv = fe->demodulator_priv;
269 int i;
270 u8 locked = 0;
271 dprintk("%s\n", __func__);
273 /* set frequency */
274 if (fe->ops.tuner_ops.set_params) {
275 if (fe->ops.i2c_gate_ctrl)
276 fe->ops.i2c_gate_ctrl(fe, 1);
277 fe->ops.tuner_ops.set_params(fe);
278 if (fe->ops.i2c_gate_ctrl)
279 fe->ops.i2c_gate_ctrl(fe, 0);
282 /* start auto lock */
283 for (i = 0; i < 10; i++) {
284 mdelay(100);
285 dprintk("Try %d\n", i);
286 is_locked(priv, &locked);
287 if (locked != 0) {
288 dprintk("ATBM8830 locked!\n");
289 break;
293 return 0;
296 static int atbm8830_get_fe(struct dvb_frontend *fe,
297 struct dtv_frontend_properties *c)
299 dprintk("%s\n", __func__);
301 /* TODO: get real readings from device */
302 /* inversion status */
303 c->inversion = INVERSION_OFF;
305 /* bandwidth */
306 c->bandwidth_hz = 8000000;
308 c->code_rate_HP = FEC_AUTO;
309 c->code_rate_LP = FEC_AUTO;
311 c->modulation = QAM_AUTO;
313 /* transmission mode */
314 c->transmission_mode = TRANSMISSION_MODE_AUTO;
316 /* guard interval */
317 c->guard_interval = GUARD_INTERVAL_AUTO;
319 /* hierarchy */
320 c->hierarchy = HIERARCHY_NONE;
322 return 0;
325 static int atbm8830_get_tune_settings(struct dvb_frontend *fe,
326 struct dvb_frontend_tune_settings *fesettings)
328 fesettings->min_delay_ms = 0;
329 fesettings->step_size = 0;
330 fesettings->max_drift = 0;
331 return 0;
334 static int atbm8830_read_status(struct dvb_frontend *fe,
335 enum fe_status *fe_status)
337 struct atbm_state *priv = fe->demodulator_priv;
338 u8 locked = 0;
339 u8 agc_locked = 0;
341 dprintk("%s\n", __func__);
342 *fe_status = 0;
344 is_locked(priv, &locked);
345 if (locked) {
346 *fe_status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
347 FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
349 dprintk("%s: fe_status=0x%x\n", __func__, *fe_status);
351 atbm8830_read_reg(priv, REG_AGC_LOCK, &agc_locked);
352 dprintk("AGC Lock: %d\n", agc_locked);
354 return 0;
357 static int atbm8830_read_ber(struct dvb_frontend *fe, u32 *ber)
359 struct atbm_state *priv = fe->demodulator_priv;
360 u32 frame_err;
361 u8 t;
363 dprintk("%s\n", __func__);
365 atbm8830_reglatch_lock(priv, 1);
367 atbm8830_read_reg(priv, REG_FRAME_ERR_CNT + 1, &t);
368 frame_err = t & 0x7F;
369 frame_err <<= 8;
370 atbm8830_read_reg(priv, REG_FRAME_ERR_CNT, &t);
371 frame_err |= t;
373 atbm8830_reglatch_lock(priv, 0);
375 *ber = frame_err * 100 / 32767;
377 dprintk("%s: ber=0x%x\n", __func__, *ber);
378 return 0;
381 static int atbm8830_read_signal_strength(struct dvb_frontend *fe, u16 *signal)
383 struct atbm_state *priv = fe->demodulator_priv;
384 u32 pwm;
385 u8 t;
387 dprintk("%s\n", __func__);
388 atbm8830_reglatch_lock(priv, 1);
390 atbm8830_read_reg(priv, REG_AGC_PWM_VAL + 1, &t);
391 pwm = t & 0x03;
392 pwm <<= 8;
393 atbm8830_read_reg(priv, REG_AGC_PWM_VAL, &t);
394 pwm |= t;
396 atbm8830_reglatch_lock(priv, 0);
398 dprintk("AGC PWM = 0x%02X\n", pwm);
399 pwm = 0x400 - pwm;
401 *signal = pwm * 0x10000 / 0x400;
403 return 0;
406 static int atbm8830_read_snr(struct dvb_frontend *fe, u16 *snr)
408 dprintk("%s\n", __func__);
409 *snr = 0;
410 return 0;
413 static int atbm8830_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
415 dprintk("%s\n", __func__);
416 *ucblocks = 0;
417 return 0;
420 static int atbm8830_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
422 struct atbm_state *priv = fe->demodulator_priv;
424 return atbm8830_write_reg(priv, REG_I2C_GATE, enable ? 1 : 0);
427 static const struct dvb_frontend_ops atbm8830_ops = {
428 .delsys = { SYS_DTMB },
429 .info = {
430 .name = "AltoBeam ATBM8830/8831 DMB-TH",
431 .frequency_min = 474000000,
432 .frequency_max = 858000000,
433 .frequency_stepsize = 10000,
434 .caps =
435 FE_CAN_FEC_AUTO |
436 FE_CAN_QAM_AUTO |
437 FE_CAN_TRANSMISSION_MODE_AUTO |
438 FE_CAN_GUARD_INTERVAL_AUTO
441 .release = atbm8830_release,
443 .init = atbm8830_init,
444 .sleep = NULL,
445 .write = NULL,
446 .i2c_gate_ctrl = atbm8830_i2c_gate_ctrl,
448 .set_frontend = atbm8830_set_fe,
449 .get_frontend = atbm8830_get_fe,
450 .get_tune_settings = atbm8830_get_tune_settings,
452 .read_status = atbm8830_read_status,
453 .read_ber = atbm8830_read_ber,
454 .read_signal_strength = atbm8830_read_signal_strength,
455 .read_snr = atbm8830_read_snr,
456 .read_ucblocks = atbm8830_read_ucblocks,
459 struct dvb_frontend *atbm8830_attach(const struct atbm8830_config *config,
460 struct i2c_adapter *i2c)
462 struct atbm_state *priv = NULL;
463 u8 data = 0;
465 dprintk("%s()\n", __func__);
467 if (config == NULL || i2c == NULL)
468 return NULL;
470 priv = kzalloc(sizeof(struct atbm_state), GFP_KERNEL);
471 if (priv == NULL)
472 goto error_out;
474 priv->config = config;
475 priv->i2c = i2c;
477 /* check if the demod is there */
478 if (atbm8830_read_reg(priv, REG_CHIP_ID, &data) != 0) {
479 dprintk("%s atbm8830/8831 not found at i2c addr 0x%02X\n",
480 __func__, priv->config->demod_address);
481 goto error_out;
483 dprintk("atbm8830 chip id: 0x%02X\n", data);
485 memcpy(&priv->frontend.ops, &atbm8830_ops,
486 sizeof(struct dvb_frontend_ops));
487 priv->frontend.demodulator_priv = priv;
489 atbm8830_init(&priv->frontend);
491 atbm8830_i2c_gate_ctrl(&priv->frontend, 1);
493 return &priv->frontend;
495 error_out:
496 dprintk("%s() error_out\n", __func__);
497 kfree(priv);
498 return NULL;
501 EXPORT_SYMBOL(atbm8830_attach);
503 MODULE_DESCRIPTION("AltoBeam ATBM8830/8831 GB20600 demodulator driver");
504 MODULE_AUTHOR("David T. L. Wong <davidtlwong@gmail.com>");
505 MODULE_LICENSE("GPL");