drivers/media/dvb-frontends/gp8psk-fe.h

   1 /*
   2  * gp8psk_fe driver
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2, or (at your option)
   7  * any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #ifndef GP8PSK_FE_H
  16 #define GP8PSK_FE_H
  17
  18 #include <linux/types.h>
  19
  20 /* gp8psk commands */
  21
  22 #define GET_8PSK_CONFIG                 0x80    /* in */
  23 #define SET_8PSK_CONFIG                 0x81
  24 #define I2C_WRITE                       0x83
  25 #define I2C_READ                        0x84
  26 #define ARM_TRANSFER                    0x85
  27 #define TUNE_8PSK                       0x86
  28 #define GET_SIGNAL_STRENGTH             0x87    /* in */
  29 #define LOAD_BCM4500                    0x88
  30 #define BOOT_8PSK                       0x89    /* in */
  31 #define START_INTERSIL                  0x8A    /* in */
  32 #define SET_LNB_VOLTAGE                 0x8B
  33 #define SET_22KHZ_TONE                  0x8C
  34 #define SEND_DISEQC_COMMAND             0x8D
  35 #define SET_DVB_MODE                    0x8E
  36 #define SET_DN_SWITCH                   0x8F
  37 #define GET_SIGNAL_LOCK                 0x90    /* in */
  38 #define GET_FW_VERS                     0x92
  39 #define GET_SERIAL_NUMBER               0x93    /* in */
  40 #define USE_EXTRA_VOLT                  0x94
  41 #define GET_FPGA_VERS                   0x95
  42 #define CW3K_INIT                       0x9d
  43
  44 /* PSK_configuration bits */
  45 #define bm8pskStarted                   0x01
  46 #define bm8pskFW_Loaded                 0x02
  47 #define bmIntersilOn                    0x04
  48 #define bmDVBmode                       0x08
  49 #define bm22kHz                         0x10
  50 #define bmSEL18V                        0x20
  51 #define bmDCtuned                       0x40
  52 #define bmArmed                         0x80
  53
  54 /* Satellite modulation modes */
  55 #define ADV_MOD_DVB_QPSK 0     /* DVB-S QPSK */
  56 #define ADV_MOD_TURBO_QPSK 1   /* Turbo QPSK */
  57 #define ADV_MOD_TURBO_8PSK 2   /* Turbo 8PSK (also used for Trellis 8PSK) */
  58 #define ADV_MOD_TURBO_16QAM 3  /* Turbo 16QAM (also used for Trellis 8PSK) */
  59
  60 #define ADV_MOD_DCII_C_QPSK 4  /* Digicipher II Combo */
  61 #define ADV_MOD_DCII_I_QPSK 5  /* Digicipher II I-stream */
  62 #define ADV_MOD_DCII_Q_QPSK 6  /* Digicipher II Q-stream */
  63 #define ADV_MOD_DCII_C_OQPSK 7 /* Digicipher II offset QPSK */
  64 #define ADV_MOD_DSS_QPSK 8     /* DSS (DIRECTV) QPSK */
  65 #define ADV_MOD_DVB_BPSK 9     /* DVB-S BPSK */
  66
  67 /* firmware revision id's */
  68 #define GP8PSK_FW_REV1                  0x020604
  69 #define GP8PSK_FW_REV2                  0x020704
  70 #define GP8PSK_FW_VERS(_fw_vers) \
  71         ((_fw_vers)[2]<<0x10 | (_fw_vers)[1]<<0x08 | (_fw_vers)[0])
  72
  73 struct gp8psk_fe_ops {
  74         int (*in)(void *priv, u8 req, u16 value, u16 index, u8 *b, int blen);
  75         int (*out)(void *priv, u8 req, u16 value, u16 index, u8 *b, int blen);
  76         int (*reload)(void *priv);
  77 };
  78
  79 struct dvb_frontend *gp8psk_fe_attach(const struct gp8psk_fe_ops *ops,
  80                                       void *priv, bool is_rev1);
  81
  82 #endif