?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Linux 4.16.11
[linux/fpc-iii.git] / drivers / media / dvb-frontends / mn88473.c
blobca722084e534fcfa096e2e3d19df26e1e0d8cbc9
1 /*
2 * Panasonic MN88473 DVB-T/T2/C demodulator driver
3 *
4 * Copyright (C) 2014 Antti Palosaari <crope@iki.fi>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17 #include "mn88473_priv.h"
18
19 static int mn88473_get_tune_settings(struct dvb_frontend *fe,
20 struct dvb_frontend_tune_settings *s)
21 {
22 s->min_delay_ms = 1000;
23 return 0;
24 }
25
26 static int mn88473_set_frontend(struct dvb_frontend *fe)
27 {
28 struct i2c_client *client = fe->demodulator_priv;
29 struct mn88473_dev *dev = i2c_get_clientdata(client);
30 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
31 int ret, i;
32 unsigned int uitmp;
33 u32 if_frequency;
34 u8 delivery_system_val, if_val[3], *conf_val_ptr;
35 u8 reg_bank2_2d_val, reg_bank0_d2_val;
36
37 dev_dbg(&client->dev,
38 "delivery_system=%u modulation=%u frequency=%u bandwidth_hz=%u symbol_rate=%u inversion=%d stream_id=%d\n",
39 c->delivery_system, c->modulation, c->frequency,
40 c->bandwidth_hz, c->symbol_rate, c->inversion, c->stream_id);
41
42 if (!dev->active) {
43 ret = -EAGAIN;
44 goto err;
45 }
46
47 switch (c->delivery_system) {
48 case SYS_DVBT:
49 delivery_system_val = 0x02;
50 reg_bank2_2d_val = 0x23;
51 reg_bank0_d2_val = 0x2a;
52 break;
53 case SYS_DVBT2:
54 delivery_system_val = 0x03;
55 reg_bank2_2d_val = 0x3b;
56 reg_bank0_d2_val = 0x29;
57 break;
58 case SYS_DVBC_ANNEX_A:
59 delivery_system_val = 0x04;
60 reg_bank2_2d_val = 0x3b;
61 reg_bank0_d2_val = 0x29;
62 break;
63 default:
64 ret = -EINVAL;
65 goto err;
66 }
67
68 switch (c->delivery_system) {
69 case SYS_DVBT:
70 case SYS_DVBT2:
71 switch (c->bandwidth_hz) {
72 case 6000000:
73 conf_val_ptr = "\xe9\x55\x55\x1c\x29\x1c\x29";
74 break;
75 case 7000000:
76 conf_val_ptr = "\xc8\x00\x00\x17\x0a\x17\x0a";
77 break;
78 case 8000000:
79 conf_val_ptr = "\xaf\x00\x00\x11\xec\x11\xec";
80 break;
81 default:
82 ret = -EINVAL;
83 goto err;
84 }
85 break;
86 case SYS_DVBC_ANNEX_A:
87 conf_val_ptr = "\x10\xab\x0d\xae\x1d\x9d";
88 break;
89 default:
90 break;
91 }
92
93 /* Program tuner */
94 if (fe->ops.tuner_ops.set_params) {
95 ret = fe->ops.tuner_ops.set_params(fe);
96 if (ret)
97 goto err;
98 }
99
100 if (fe->ops.tuner_ops.get_if_frequency) {
101 ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency);
102 if (ret)
103 goto err;
104
105 dev_dbg(&client->dev, "get_if_frequency=%u\n", if_frequency);
106 } else {
107 ret = -EINVAL;
108 goto err;
109 }
110
111 /* Calculate IF registers */
112 uitmp = DIV_ROUND_CLOSEST_ULL((u64) if_frequency * 0x1000000, dev->clk);
113 if_val[0] = (uitmp >> 16) & 0xff;
114 if_val[1] = (uitmp >> 8) & 0xff;
115 if_val[2] = (uitmp >> 0) & 0xff;
116
117 ret = regmap_write(dev->regmap[2], 0x05, 0x00);
118 if (ret)
119 goto err;
120 ret = regmap_write(dev->regmap[2], 0xfb, 0x13);
121 if (ret)
122 goto err;
123 ret = regmap_write(dev->regmap[2], 0xef, 0x13);
124 if (ret)
125 goto err;
126 ret = regmap_write(dev->regmap[2], 0xf9, 0x13);
127 if (ret)
128 goto err;
129 ret = regmap_write(dev->regmap[2], 0x00, 0x18);
130 if (ret)
131 goto err;
132 ret = regmap_write(dev->regmap[2], 0x01, 0x01);
133 if (ret)
134 goto err;
135 ret = regmap_write(dev->regmap[2], 0x02, 0x21);
136 if (ret)
137 goto err;
138 ret = regmap_write(dev->regmap[2], 0x03, delivery_system_val);
139 if (ret)
140 goto err;
141 ret = regmap_write(dev->regmap[2], 0x0b, 0x00);
142 if (ret)
143 goto err;
144
145 for (i = 0; i < sizeof(if_val); i++) {
146 ret = regmap_write(dev->regmap[2], 0x10 + i, if_val[i]);
147 if (ret)
148 goto err;
149 }
150
151 switch (c->delivery_system) {
152 case SYS_DVBT:
153 case SYS_DVBT2:
154 for (i = 0; i < 7; i++) {
155 ret = regmap_write(dev->regmap[2], 0x13 + i,
156 conf_val_ptr[i]);
157 if (ret)
158 goto err;
159 }
160 break;
161 case SYS_DVBC_ANNEX_A:
162 ret = regmap_bulk_write(dev->regmap[1], 0x10, conf_val_ptr, 6);
163 if (ret)
164 goto err;
165 break;
166 default:
167 break;
168 }
169
170 ret = regmap_write(dev->regmap[2], 0x2d, reg_bank2_2d_val);
171 if (ret)
172 goto err;
173 ret = regmap_write(dev->regmap[2], 0x2e, 0x00);
174 if (ret)
175 goto err;
176 ret = regmap_write(dev->regmap[2], 0x56, 0x0d);
177 if (ret)
178 goto err;
179 ret = regmap_bulk_write(dev->regmap[0], 0x01,
180 "\xba\x13\x80\xba\x91\xdd\xe7\x28", 8);
181 if (ret)
182 goto err;
183 ret = regmap_write(dev->regmap[0], 0x0a, 0x1a);
184 if (ret)
185 goto err;
186 ret = regmap_write(dev->regmap[0], 0x13, 0x1f);
187 if (ret)
188 goto err;
189 ret = regmap_write(dev->regmap[0], 0x19, 0x03);
190 if (ret)
191 goto err;
192 ret = regmap_write(dev->regmap[0], 0x1d, 0xb0);
193 if (ret)
194 goto err;
195 ret = regmap_write(dev->regmap[0], 0x2a, 0x72);
196 if (ret)
197 goto err;
198 ret = regmap_write(dev->regmap[0], 0x2d, 0x00);
199 if (ret)
200 goto err;
201 ret = regmap_write(dev->regmap[0], 0x3c, 0x00);
202 if (ret)
203 goto err;
204 ret = regmap_write(dev->regmap[0], 0x3f, 0xf8);
205 if (ret)
206 goto err;
207 ret = regmap_bulk_write(dev->regmap[0], 0x40, "\xf4\x08", 2);
208 if (ret)
209 goto err;
210 ret = regmap_write(dev->regmap[0], 0xd2, reg_bank0_d2_val);
211 if (ret)
212 goto err;
213 ret = regmap_write(dev->regmap[0], 0xd4, 0x55);
214 if (ret)
215 goto err;
216 ret = regmap_write(dev->regmap[1], 0xbe, 0x08);
217 if (ret)
218 goto err;
219 ret = regmap_write(dev->regmap[0], 0xb2, 0x37);
220 if (ret)
221 goto err;
222 ret = regmap_write(dev->regmap[0], 0xd7, 0x04);
223 if (ret)
224 goto err;
225
226 /* PLP */
227 if (c->delivery_system == SYS_DVBT2) {
228 ret = regmap_write(dev->regmap[2], 0x36,
229 (c->stream_id == NO_STREAM_ID_FILTER) ? 0 :
230 c->stream_id );
231 if (ret)
232 goto err;
233 }
234
235 /* Reset FSM */
236 ret = regmap_write(dev->regmap[2], 0xf8, 0x9f);
237 if (ret)
238 goto err;
239
240 return 0;
241 err:
242 dev_dbg(&client->dev, "failed=%d\n", ret);
243 return ret;
244 }
245
246 static int mn88473_read_status(struct dvb_frontend *fe, enum fe_status *status)
247 {
248 struct i2c_client *client = fe->demodulator_priv;
249 struct mn88473_dev *dev = i2c_get_clientdata(client);
250 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
251 int ret, i, stmp;
252 unsigned int utmp, utmp1, utmp2;
253 u8 buf[5];
254
255 if (!dev->active) {
256 ret = -EAGAIN;
257 goto err;
258 }
259
260 /* Lock detection */
261 switch (c->delivery_system) {
262 case SYS_DVBT:
263 ret = regmap_read(dev->regmap[0], 0x62, &utmp);
264 if (ret)
265 goto err;
266
267 if (!(utmp & 0xa0)) {
268 if ((utmp & 0x0f) >= 0x09)
269 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
270 FE_HAS_VITERBI | FE_HAS_SYNC |
271 FE_HAS_LOCK;
272 else if ((utmp & 0x0f) >= 0x03)
273 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER;
274 } else {
275 *status = 0;
276 }
277 break;
278 case SYS_DVBT2:
279 ret = regmap_read(dev->regmap[2], 0x8b, &utmp);
280 if (ret)
281 goto err;
282
283 if (!(utmp & 0x40)) {
284 if ((utmp & 0x0f) >= 0x0d)
285 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
286 FE_HAS_VITERBI | FE_HAS_SYNC |
287 FE_HAS_LOCK;
288 else if ((utmp & 0x0f) >= 0x0a)
289 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
290 FE_HAS_VITERBI;
291 else if ((utmp & 0x0f) >= 0x07)
292 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER;
293 } else {
294 *status = 0;
295 }
296 break;
297 case SYS_DVBC_ANNEX_A:
298 ret = regmap_read(dev->regmap[1], 0x85, &utmp);
299 if (ret)
300 goto err;
301
302 if (!(utmp & 0x40)) {
303 ret = regmap_read(dev->regmap[1], 0x89, &utmp);
304 if (ret)
305 goto err;
306
307 if (utmp & 0x01)
308 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
309 FE_HAS_VITERBI | FE_HAS_SYNC |
310 FE_HAS_LOCK;
311 } else {
312 *status = 0;
313 }
314 break;
315 default:
316 ret = -EINVAL;
317 goto err;
318 }
319
320 /* Signal strength */
321 if (*status & FE_HAS_SIGNAL) {
322 for (i = 0; i < 2; i++) {
323 ret = regmap_bulk_read(dev->regmap[2], 0x86 + i,
324 &buf[i], 1);
325 if (ret)
326 goto err;
327 }
328
329 /* AGCRD[15:6] gives us a 10bit value ([5:0] are always 0) */
330 utmp1 = buf[0] << 8 | buf[1] << 0 | buf[0] >> 2;
331 dev_dbg(&client->dev, "strength=%u\n", utmp1);
332
333 c->strength.stat[0].scale = FE_SCALE_RELATIVE;
334 c->strength.stat[0].uvalue = utmp1;
335 } else {
336 c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
337 }
338
339 /* CNR */
340 if (*status & FE_HAS_VITERBI && c->delivery_system == SYS_DVBT) {
341 /* DVB-T CNR */
342 ret = regmap_bulk_read(dev->regmap[0], 0x8f, buf, 2);
343 if (ret)
344 goto err;
345
346 utmp = buf[0] << 8 | buf[1] << 0;
347 if (utmp) {
348 /* CNR[dB]: 10 * (log10(65536 / value) + 0.2) */
349 /* log10(65536) = 80807124, 0.2 = 3355443 */
350 stmp = div_u64(((u64)80807124 - intlog10(utmp)
351 + 3355443) * 10000, 1 << 24);
352 dev_dbg(&client->dev, "cnr=%d value=%u\n", stmp, utmp);
353 } else {
354 stmp = 0;
355 }
356
357 c->cnr.stat[0].svalue = stmp;
358 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
359 } else if (*status & FE_HAS_VITERBI &&
360 c->delivery_system == SYS_DVBT2) {
361 /* DVB-T2 CNR */
362 for (i = 0; i < 3; i++) {
363 ret = regmap_bulk_read(dev->regmap[2], 0xb7 + i,
364 &buf[i], 1);
365 if (ret)
366 goto err;
367 }
368
369 utmp = buf[1] << 8 | buf[2] << 0;
370 utmp1 = (buf[0] >> 2) & 0x01; /* 0=SISO, 1=MISO */
371 if (utmp) {
372 if (utmp1) {
373 /* CNR[dB]: 10 * (log10(16384 / value) - 0.6) */
374 /* log10(16384) = 70706234, 0.6 = 10066330 */
375 stmp = div_u64(((u64)70706234 - intlog10(utmp)
376 - 10066330) * 10000, 1 << 24);
377 dev_dbg(&client->dev, "cnr=%d value=%u MISO\n",
378 stmp, utmp);
379 } else {
380 /* CNR[dB]: 10 * (log10(65536 / value) + 0.2) */
381 /* log10(65536) = 80807124, 0.2 = 3355443 */
382 stmp = div_u64(((u64)80807124 - intlog10(utmp)
383 + 3355443) * 10000, 1 << 24);
384 dev_dbg(&client->dev, "cnr=%d value=%u SISO\n",
385 stmp, utmp);
386 }
387 } else {
388 stmp = 0;
389 }
390
391 c->cnr.stat[0].svalue = stmp;
392 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
393 } else if (*status & FE_HAS_VITERBI &&
394 c->delivery_system == SYS_DVBC_ANNEX_A) {
395 /* DVB-C CNR */
396 ret = regmap_bulk_read(dev->regmap[1], 0xa1, buf, 4);
397 if (ret)
398 goto err;
399
400 utmp1 = buf[0] << 8 | buf[1] << 0; /* signal */
401 utmp2 = buf[2] << 8 | buf[3] << 0; /* noise */
402 if (utmp1 && utmp2) {
403 /* CNR[dB]: 10 * log10(8 * (signal / noise)) */
404 /* log10(8) = 15151336 */
405 stmp = div_u64(((u64)15151336 + intlog10(utmp1)
406 - intlog10(utmp2)) * 10000, 1 << 24);
407 dev_dbg(&client->dev, "cnr=%d signal=%u noise=%u\n",
408 stmp, utmp1, utmp2);
409 } else {
410 stmp = 0;
411 }
412
413 c->cnr.stat[0].svalue = stmp;
414 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
415 } else {
416 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
417 }
418
419 /* BER */
420 if (*status & FE_HAS_LOCK && (c->delivery_system == SYS_DVBT ||
421 c->delivery_system == SYS_DVBC_ANNEX_A)) {
422 /* DVB-T & DVB-C BER */
423 ret = regmap_bulk_read(dev->regmap[0], 0x92, buf, 5);
424 if (ret)
425 goto err;
426
427 utmp1 = buf[0] << 16 | buf[1] << 8 | buf[2] << 0;
428 utmp2 = buf[3] << 8 | buf[4] << 0;
429 utmp2 = utmp2 * 8 * 204;
430 dev_dbg(&client->dev, "post_bit_error=%u post_bit_count=%u\n",
431 utmp1, utmp2);
432
433 c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
434 c->post_bit_error.stat[0].uvalue += utmp1;
435 c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER;
436 c->post_bit_count.stat[0].uvalue += utmp2;
437 } else {
438 c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
439 c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
440 }
441
442 /* PER */
443 if (*status & FE_HAS_LOCK) {
444 ret = regmap_bulk_read(dev->regmap[0], 0xdd, buf, 4);
445 if (ret)
446 goto err;
447
448 utmp1 = buf[0] << 8 | buf[1] << 0;
449 utmp2 = buf[2] << 8 | buf[3] << 0;
450 dev_dbg(&client->dev, "block_error=%u block_count=%u\n",
451 utmp1, utmp2);
452
453 c->block_error.stat[0].scale = FE_SCALE_COUNTER;
454 c->block_error.stat[0].uvalue += utmp1;
455 c->block_count.stat[0].scale = FE_SCALE_COUNTER;
456 c->block_count.stat[0].uvalue += utmp2;
457 } else {
458 c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
459 c->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
460 }
461
462 return 0;
463 err:
464 dev_dbg(&client->dev, "failed=%d\n", ret);
465 return ret;
466 }
467
468 static int mn88473_init(struct dvb_frontend *fe)
469 {
470 struct i2c_client *client = fe->demodulator_priv;
471 struct mn88473_dev *dev = i2c_get_clientdata(client);
472 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
473 int ret, len, remain;
474 unsigned int uitmp;
475 const struct firmware *fw;
476 const char *name = MN88473_FIRMWARE;
477
478 dev_dbg(&client->dev, "\n");
479
480 /* Check if firmware is already running */
481 ret = regmap_read(dev->regmap[0], 0xf5, &uitmp);
482 if (ret)
483 goto err;
484
485 if (!(uitmp & 0x01))
486 goto warm;
487
488 /* Request the firmware, this will block and timeout */
489 ret = request_firmware(&fw, name, &client->dev);
490 if (ret) {
491 dev_err(&client->dev, "firmware file '%s' not found\n", name);
492 goto err;
493 }
494
495 dev_info(&client->dev, "downloading firmware from file '%s'\n", name);
496
497 ret = regmap_write(dev->regmap[0], 0xf5, 0x03);
498 if (ret)
499 goto err_release_firmware;
500
501 for (remain = fw->size; remain > 0; remain -= (dev->i2c_wr_max - 1)) {
502 len = min(dev->i2c_wr_max - 1, remain);
503 ret = regmap_bulk_write(dev->regmap[0], 0xf6,
504 &fw->data[fw->size - remain], len);
505 if (ret) {
506 dev_err(&client->dev, "firmware download failed %d\n",
507 ret);
508 goto err_release_firmware;
509 }
510 }
511
512 release_firmware(fw);
513
514 /* Parity check of firmware */
515 ret = regmap_read(dev->regmap[0], 0xf8, &uitmp);
516 if (ret)
517 goto err;
518
519 if (uitmp & 0x10) {
520 dev_err(&client->dev, "firmware parity check failed\n");
521 ret = -EINVAL;
522 goto err;
523 }
524
525 ret = regmap_write(dev->regmap[0], 0xf5, 0x00);
526 if (ret)
527 goto err;
528 warm:
529 /* TS config */
530 ret = regmap_write(dev->regmap[2], 0x09, 0x08);
531 if (ret)
532 goto err;
533 ret = regmap_write(dev->regmap[2], 0x08, 0x1d);
534 if (ret)
535 goto err;
536
537 dev->active = true;
538
539 /* init stats here to indicate which stats are supported */
540 c->strength.len = 1;
541 c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
542 c->cnr.len = 1;
543 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
544 c->post_bit_error.len = 1;
545 c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
546 c->post_bit_count.len = 1;
547 c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
548 c->block_error.len = 1;
549 c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
550 c->block_count.len = 1;
551 c->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
552
553 return 0;
554 err_release_firmware:
555 release_firmware(fw);
556 err:
557 dev_dbg(&client->dev, "failed=%d\n", ret);
558 return ret;
559 }
560
561 static int mn88473_sleep(struct dvb_frontend *fe)
562 {
563 struct i2c_client *client = fe->demodulator_priv;
564 struct mn88473_dev *dev = i2c_get_clientdata(client);
565 int ret;
566
567 dev_dbg(&client->dev, "\n");
568
569 dev->active = false;
570
571 ret = regmap_write(dev->regmap[2], 0x05, 0x3e);
572 if (ret)
573 goto err;
574
575 return 0;
576 err:
577 dev_dbg(&client->dev, "failed=%d\n", ret);
578 return ret;
579 }
580
581 static const struct dvb_frontend_ops mn88473_ops = {
582 .delsys = {SYS_DVBT, SYS_DVBT2, SYS_DVBC_ANNEX_A},
583 .info = {
584 .name = "Panasonic MN88473",
585 .symbol_rate_min = 1000000,
586 .symbol_rate_max = 7200000,
587 .caps = FE_CAN_FEC_1_2 |
588 FE_CAN_FEC_2_3 |
589 FE_CAN_FEC_3_4 |
590 FE_CAN_FEC_5_6 |
591 FE_CAN_FEC_7_8 |
592 FE_CAN_FEC_AUTO |
593 FE_CAN_QPSK |
594 FE_CAN_QAM_16 |
595 FE_CAN_QAM_32 |
596 FE_CAN_QAM_64 |
597 FE_CAN_QAM_128 |
598 FE_CAN_QAM_256 |
599 FE_CAN_QAM_AUTO |
600 FE_CAN_TRANSMISSION_MODE_AUTO |
601 FE_CAN_GUARD_INTERVAL_AUTO |
602 FE_CAN_HIERARCHY_AUTO |
603 FE_CAN_MUTE_TS |
604 FE_CAN_2G_MODULATION |
605 FE_CAN_MULTISTREAM
606 },
607
608 .get_tune_settings = mn88473_get_tune_settings,
609
610 .init = mn88473_init,
611 .sleep = mn88473_sleep,
612
613 .set_frontend = mn88473_set_frontend,
614
615 .read_status = mn88473_read_status,
616 };
617
618 static int mn88473_probe(struct i2c_client *client,
619 const struct i2c_device_id *id)
620 {
621 struct mn88473_config *config = client->dev.platform_data;
622 struct mn88473_dev *dev;
623 int ret;
624 unsigned int uitmp;
625 static const struct regmap_config regmap_config = {
626 .reg_bits = 8,
627 .val_bits = 8,
628 };
629
630 dev_dbg(&client->dev, "\n");
631
632 /* Caller really need to provide pointer for frontend we create */
633 if (config->fe == NULL) {
634 dev_err(&client->dev, "frontend pointer not defined\n");
635 ret = -EINVAL;
636 goto err;
637 }
638
639 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
640 if (dev == NULL) {
641 ret = -ENOMEM;
642 goto err;
643 }
644
645 if (config->i2c_wr_max)
646 dev->i2c_wr_max = config->i2c_wr_max;
647 else
648 dev->i2c_wr_max = ~0;
649
650 if (config->xtal)
651 dev->clk = config->xtal;
652 else
653 dev->clk = 25000000;
654 dev->client[0] = client;
655 dev->regmap[0] = regmap_init_i2c(dev->client[0], &regmap_config);
656 if (IS_ERR(dev->regmap[0])) {
657 ret = PTR_ERR(dev->regmap[0]);
658 goto err_kfree;
659 }
660
661 /*
662 * Chip has three I2C addresses for different register banks. Used
663 * addresses are 0x18, 0x1a and 0x1c. We register two dummy clients,
664 * 0x1a and 0x1c, in order to get own I2C client for each register bank.
665 *
666 * Also, register bank 2 do not support sequential I/O. Only single
667 * register write or read is allowed to that bank.
668 */
669 dev->client[1] = i2c_new_dummy(client->adapter, 0x1a);
670 if (dev->client[1] == NULL) {
671 ret = -ENODEV;
672 dev_err(&client->dev, "I2C registration failed\n");
673 if (ret)
674 goto err_regmap_0_regmap_exit;
675 }
676 dev->regmap[1] = regmap_init_i2c(dev->client[1], &regmap_config);
677 if (IS_ERR(dev->regmap[1])) {
678 ret = PTR_ERR(dev->regmap[1]);
679 goto err_client_1_i2c_unregister_device;
680 }
681 i2c_set_clientdata(dev->client[1], dev);
682
683 dev->client[2] = i2c_new_dummy(client->adapter, 0x1c);
684 if (dev->client[2] == NULL) {
685 ret = -ENODEV;
686 dev_err(&client->dev, "2nd I2C registration failed\n");
687 if (ret)
688 goto err_regmap_1_regmap_exit;
689 }
690 dev->regmap[2] = regmap_init_i2c(dev->client[2], &regmap_config);
691 if (IS_ERR(dev->regmap[2])) {
692 ret = PTR_ERR(dev->regmap[2]);
693 goto err_client_2_i2c_unregister_device;
694 }
695 i2c_set_clientdata(dev->client[2], dev);
696
697 /* Check demod answers with correct chip id */
698 ret = regmap_read(dev->regmap[2], 0xff, &uitmp);
699 if (ret)
700 goto err_regmap_2_regmap_exit;
701
702 dev_dbg(&client->dev, "chip id=%02x\n", uitmp);
703
704 if (uitmp != 0x03) {
705 ret = -ENODEV;
706 goto err_regmap_2_regmap_exit;
707 }
708
709 /* Sleep because chip is active by default */
710 ret = regmap_write(dev->regmap[2], 0x05, 0x3e);
711 if (ret)
712 goto err_regmap_2_regmap_exit;
713
714 /* Create dvb frontend */
715 memcpy(&dev->frontend.ops, &mn88473_ops, sizeof(dev->frontend.ops));
716 dev->frontend.demodulator_priv = client;
717 *config->fe = &dev->frontend;
718 i2c_set_clientdata(client, dev);
719
720 dev_info(&client->dev, "Panasonic MN88473 successfully identified\n");
721
722 return 0;
723 err_regmap_2_regmap_exit:
724 regmap_exit(dev->regmap[2]);
725 err_client_2_i2c_unregister_device:
726 i2c_unregister_device(dev->client[2]);
727 err_regmap_1_regmap_exit:
728 regmap_exit(dev->regmap[1]);
729 err_client_1_i2c_unregister_device:
730 i2c_unregister_device(dev->client[1]);
731 err_regmap_0_regmap_exit:
732 regmap_exit(dev->regmap[0]);
733 err_kfree:
734 kfree(dev);
735 err:
736 dev_dbg(&client->dev, "failed=%d\n", ret);
737 return ret;
738 }
739
740 static int mn88473_remove(struct i2c_client *client)
741 {
742 struct mn88473_dev *dev = i2c_get_clientdata(client);
743
744 dev_dbg(&client->dev, "\n");
745
746 regmap_exit(dev->regmap[2]);
747 i2c_unregister_device(dev->client[2]);
748
749 regmap_exit(dev->regmap[1]);
750 i2c_unregister_device(dev->client[1]);
751
752 regmap_exit(dev->regmap[0]);
753
754 kfree(dev);
755
756 return 0;
757 }
758
759 static const struct i2c_device_id mn88473_id_table[] = {
760 {"mn88473", 0},
761 {}
762 };
763 MODULE_DEVICE_TABLE(i2c, mn88473_id_table);
764
765 static struct i2c_driver mn88473_driver = {
766 .driver = {
767 .name = "mn88473",
768 .suppress_bind_attrs = true,
769 },
770 .probe = mn88473_probe,
771 .remove = mn88473_remove,
772 .id_table = mn88473_id_table,
773 };
774
775 module_i2c_driver(mn88473_driver);
776
777 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
778 MODULE_DESCRIPTION("Panasonic MN88473 DVB-T/T2/C demodulator driver");
779 MODULE_LICENSE("GPL");
780 MODULE_FIRMWARE(MN88473_FIRMWARE);
Linux with added FPC-III support