Linux 4.16.11
[linux/fpc-iii.git] / drivers / media / dvb-frontends / sp887x.c
blob572a297811fe0ca38c44f0209145d67578ba7621
1 /*
2 Driver for the Spase sp887x demodulator
3 */
5 /*
6 * This driver needs external firmware. Please use the command
7 * "<kerneldir>/Documentation/dvb/get_dvb_firmware sp887x" to
8 * download/extract it, and then copy it to /usr/lib/hotplug/firmware
9 * or /lib/firmware (depending on configuration of firmware hotplug).
11 #define SP887X_DEFAULT_FIRMWARE "dvb-fe-sp887x.fw"
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/device.h>
16 #include <linux/firmware.h>
17 #include <linux/string.h>
18 #include <linux/slab.h>
20 #include <media/dvb_frontend.h>
21 #include "sp887x.h"
24 struct sp887x_state {
25 struct i2c_adapter* i2c;
26 const struct sp887x_config* config;
27 struct dvb_frontend frontend;
29 /* demodulator private data */
30 u8 initialised:1;
33 static int debug;
34 #define dprintk(args...) \
35 do { \
36 if (debug) printk(KERN_DEBUG "sp887x: " args); \
37 } while (0)
39 static int i2c_writebytes (struct sp887x_state* state, u8 *buf, u8 len)
41 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = len };
42 int err;
44 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
45 printk ("%s: i2c write error (addr %02x, err == %i)\n",
46 __func__, state->config->demod_address, err);
47 return -EREMOTEIO;
50 return 0;
53 static int sp887x_writereg (struct sp887x_state* state, u16 reg, u16 data)
55 u8 b0 [] = { reg >> 8 , reg & 0xff, data >> 8, data & 0xff };
56 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 4 };
57 int ret;
59 if ((ret = i2c_transfer(state->i2c, &msg, 1)) != 1) {
61 * in case of soft reset we ignore ACK errors...
63 if (!(reg == 0xf1a && data == 0x000 &&
64 (ret == -EREMOTEIO || ret == -EFAULT)))
66 printk("%s: writereg error (reg %03x, data %03x, ret == %i)\n",
67 __func__, reg & 0xffff, data & 0xffff, ret);
68 return ret;
72 return 0;
75 static int sp887x_readreg (struct sp887x_state* state, u16 reg)
77 u8 b0 [] = { reg >> 8 , reg & 0xff };
78 u8 b1 [2];
79 int ret;
80 struct i2c_msg msg[] = {{ .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 2 },
81 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 2 }};
83 if ((ret = i2c_transfer(state->i2c, msg, 2)) != 2) {
84 printk("%s: readreg error (ret == %i)\n", __func__, ret);
85 return -1;
88 return (((b1[0] << 8) | b1[1]) & 0xfff);
91 static void sp887x_microcontroller_stop (struct sp887x_state* state)
93 dprintk("%s\n", __func__);
94 sp887x_writereg(state, 0xf08, 0x000);
95 sp887x_writereg(state, 0xf09, 0x000);
97 /* microcontroller STOP */
98 sp887x_writereg(state, 0xf00, 0x000);
101 static void sp887x_microcontroller_start (struct sp887x_state* state)
103 dprintk("%s\n", __func__);
104 sp887x_writereg(state, 0xf08, 0x000);
105 sp887x_writereg(state, 0xf09, 0x000);
107 /* microcontroller START */
108 sp887x_writereg(state, 0xf00, 0x001);
111 static void sp887x_setup_agc (struct sp887x_state* state)
113 /* setup AGC parameters */
114 dprintk("%s\n", __func__);
115 sp887x_writereg(state, 0x33c, 0x054);
116 sp887x_writereg(state, 0x33b, 0x04c);
117 sp887x_writereg(state, 0x328, 0x000);
118 sp887x_writereg(state, 0x327, 0x005);
119 sp887x_writereg(state, 0x326, 0x001);
120 sp887x_writereg(state, 0x325, 0x001);
121 sp887x_writereg(state, 0x324, 0x001);
122 sp887x_writereg(state, 0x318, 0x050);
123 sp887x_writereg(state, 0x317, 0x3fe);
124 sp887x_writereg(state, 0x316, 0x001);
125 sp887x_writereg(state, 0x313, 0x005);
126 sp887x_writereg(state, 0x312, 0x002);
127 sp887x_writereg(state, 0x306, 0x000);
128 sp887x_writereg(state, 0x303, 0x000);
131 #define BLOCKSIZE 30
132 #define FW_SIZE 0x4000
134 * load firmware and setup MPEG interface...
136 static int sp887x_initial_setup (struct dvb_frontend* fe, const struct firmware *fw)
138 struct sp887x_state* state = fe->demodulator_priv;
139 u8 buf [BLOCKSIZE+2];
140 int i;
141 int fw_size = fw->size;
142 const unsigned char *mem = fw->data;
144 dprintk("%s\n", __func__);
146 /* ignore the first 10 bytes, then we expect 0x4000 bytes of firmware */
147 if (fw_size < FW_SIZE+10)
148 return -ENODEV;
150 mem = fw->data + 10;
152 /* soft reset */
153 sp887x_writereg(state, 0xf1a, 0x000);
155 sp887x_microcontroller_stop (state);
157 printk ("%s: firmware upload... ", __func__);
159 /* setup write pointer to -1 (end of memory) */
160 /* bit 0x8000 in address is set to enable 13bit mode */
161 sp887x_writereg(state, 0x8f08, 0x1fff);
163 /* dummy write (wrap around to start of memory) */
164 sp887x_writereg(state, 0x8f0a, 0x0000);
166 for (i = 0; i < FW_SIZE; i += BLOCKSIZE) {
167 int c = BLOCKSIZE;
168 int err;
170 if (i+c > FW_SIZE)
171 c = FW_SIZE - i;
173 /* bit 0x8000 in address is set to enable 13bit mode */
174 /* bit 0x4000 enables multibyte read/write transfers */
175 /* write register is 0xf0a */
176 buf[0] = 0xcf;
177 buf[1] = 0x0a;
179 memcpy(&buf[2], mem + i, c);
181 if ((err = i2c_writebytes (state, buf, c+2)) < 0) {
182 printk ("failed.\n");
183 printk ("%s: i2c error (err == %i)\n", __func__, err);
184 return err;
188 /* don't write RS bytes between packets */
189 sp887x_writereg(state, 0xc13, 0x001);
191 /* suppress clock if (!data_valid) */
192 sp887x_writereg(state, 0xc14, 0x000);
194 /* setup MPEG interface... */
195 sp887x_writereg(state, 0xc1a, 0x872);
196 sp887x_writereg(state, 0xc1b, 0x001);
197 sp887x_writereg(state, 0xc1c, 0x000); /* parallel mode (serial mode == 1) */
198 sp887x_writereg(state, 0xc1a, 0x871);
200 /* ADC mode, 2 for MT8872, 3 for SP8870/SP8871 */
201 sp887x_writereg(state, 0x301, 0x002);
203 sp887x_setup_agc(state);
205 /* bit 0x010: enable data valid signal */
206 sp887x_writereg(state, 0xd00, 0x010);
207 sp887x_writereg(state, 0x0d1, 0x000);
208 return 0;
211 static int configure_reg0xc05(struct dtv_frontend_properties *p, u16 *reg0xc05)
213 int known_parameters = 1;
215 *reg0xc05 = 0x000;
217 switch (p->modulation) {
218 case QPSK:
219 break;
220 case QAM_16:
221 *reg0xc05 |= (1 << 10);
222 break;
223 case QAM_64:
224 *reg0xc05 |= (2 << 10);
225 break;
226 case QAM_AUTO:
227 known_parameters = 0;
228 break;
229 default:
230 return -EINVAL;
233 switch (p->hierarchy) {
234 case HIERARCHY_NONE:
235 break;
236 case HIERARCHY_1:
237 *reg0xc05 |= (1 << 7);
238 break;
239 case HIERARCHY_2:
240 *reg0xc05 |= (2 << 7);
241 break;
242 case HIERARCHY_4:
243 *reg0xc05 |= (3 << 7);
244 break;
245 case HIERARCHY_AUTO:
246 known_parameters = 0;
247 break;
248 default:
249 return -EINVAL;
252 switch (p->code_rate_HP) {
253 case FEC_1_2:
254 break;
255 case FEC_2_3:
256 *reg0xc05 |= (1 << 3);
257 break;
258 case FEC_3_4:
259 *reg0xc05 |= (2 << 3);
260 break;
261 case FEC_5_6:
262 *reg0xc05 |= (3 << 3);
263 break;
264 case FEC_7_8:
265 *reg0xc05 |= (4 << 3);
266 break;
267 case FEC_AUTO:
268 known_parameters = 0;
269 break;
270 default:
271 return -EINVAL;
274 if (known_parameters)
275 *reg0xc05 |= (2 << 1); /* use specified parameters */
276 else
277 *reg0xc05 |= (1 << 1); /* enable autoprobing */
279 return 0;
283 * estimates division of two 24bit numbers,
284 * derived from the ves1820/stv0299 driver code
286 static void divide (int n, int d, int *quotient_i, int *quotient_f)
288 unsigned int q, r;
290 r = (n % d) << 8;
291 q = (r / d);
293 if (quotient_i)
294 *quotient_i = q;
296 if (quotient_f) {
297 r = (r % d) << 8;
298 q = (q << 8) | (r / d);
299 r = (r % d) << 8;
300 *quotient_f = (q << 8) | (r / d);
304 static void sp887x_correct_offsets (struct sp887x_state* state,
305 struct dtv_frontend_properties *p,
306 int actual_freq)
308 static const u32 srate_correction [] = { 1879617, 4544878, 8098561 };
309 int bw_index;
310 int freq_offset = actual_freq - p->frequency;
311 int sysclock = 61003; //[kHz]
312 int ifreq = 36000000;
313 int freq;
314 int frequency_shift;
316 switch (p->bandwidth_hz) {
317 default:
318 case 8000000:
319 bw_index = 0;
320 break;
321 case 7000000:
322 bw_index = 1;
323 break;
324 case 6000000:
325 bw_index = 2;
326 break;
329 if (p->inversion == INVERSION_ON)
330 freq = ifreq - freq_offset;
331 else
332 freq = ifreq + freq_offset;
334 divide(freq / 333, sysclock, NULL, &frequency_shift);
336 if (p->inversion == INVERSION_ON)
337 frequency_shift = -frequency_shift;
339 /* sample rate correction */
340 sp887x_writereg(state, 0x319, srate_correction[bw_index] >> 12);
341 sp887x_writereg(state, 0x31a, srate_correction[bw_index] & 0xfff);
343 /* carrier offset correction */
344 sp887x_writereg(state, 0x309, frequency_shift >> 12);
345 sp887x_writereg(state, 0x30a, frequency_shift & 0xfff);
348 static int sp887x_setup_frontend_parameters(struct dvb_frontend *fe)
350 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
351 struct sp887x_state* state = fe->demodulator_priv;
352 unsigned actual_freq;
353 int err;
354 u16 val, reg0xc05;
356 if (p->bandwidth_hz != 8000000 &&
357 p->bandwidth_hz != 7000000 &&
358 p->bandwidth_hz != 6000000)
359 return -EINVAL;
361 if ((err = configure_reg0xc05(p, &reg0xc05)))
362 return err;
364 sp887x_microcontroller_stop(state);
366 /* setup the PLL */
367 if (fe->ops.tuner_ops.set_params) {
368 fe->ops.tuner_ops.set_params(fe);
369 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
371 if (fe->ops.tuner_ops.get_frequency) {
372 fe->ops.tuner_ops.get_frequency(fe, &actual_freq);
373 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
374 } else {
375 actual_freq = p->frequency;
378 /* read status reg in order to clear <pending irqs */
379 sp887x_readreg(state, 0x200);
381 sp887x_correct_offsets(state, p, actual_freq);
383 /* filter for 6/7/8 Mhz channel */
384 if (p->bandwidth_hz == 6000000)
385 val = 2;
386 else if (p->bandwidth_hz == 7000000)
387 val = 1;
388 else
389 val = 0;
391 sp887x_writereg(state, 0x311, val);
393 /* scan order: 2k first = 0, 8k first = 1 */
394 if (p->transmission_mode == TRANSMISSION_MODE_2K)
395 sp887x_writereg(state, 0x338, 0x000);
396 else
397 sp887x_writereg(state, 0x338, 0x001);
399 sp887x_writereg(state, 0xc05, reg0xc05);
401 if (p->bandwidth_hz == 6000000)
402 val = 2 << 3;
403 else if (p->bandwidth_hz == 7000000)
404 val = 3 << 3;
405 else
406 val = 0 << 3;
408 /* enable OFDM and SAW bits as lock indicators in sync register 0xf17,
409 * optimize algorithm for given bandwidth...
411 sp887x_writereg(state, 0xf14, 0x160 | val);
412 sp887x_writereg(state, 0xf15, 0x000);
414 sp887x_microcontroller_start(state);
415 return 0;
418 static int sp887x_read_status(struct dvb_frontend *fe, enum fe_status *status)
420 struct sp887x_state* state = fe->demodulator_priv;
421 u16 snr12 = sp887x_readreg(state, 0xf16);
422 u16 sync0x200 = sp887x_readreg(state, 0x200);
423 u16 sync0xf17 = sp887x_readreg(state, 0xf17);
425 *status = 0;
427 if (snr12 > 0x00f)
428 *status |= FE_HAS_SIGNAL;
430 //if (sync0x200 & 0x004)
431 // *status |= FE_HAS_SYNC | FE_HAS_CARRIER;
433 //if (sync0x200 & 0x008)
434 // *status |= FE_HAS_VITERBI;
436 if ((sync0xf17 & 0x00f) == 0x002) {
437 *status |= FE_HAS_LOCK;
438 *status |= FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_CARRIER;
441 if (sync0x200 & 0x001) { /* tuner adjustment requested...*/
442 int steps = (sync0x200 >> 4) & 0x00f;
443 if (steps & 0x008)
444 steps = -steps;
445 dprintk("sp887x: implement tuner adjustment (%+i steps)!!\n",
446 steps);
449 return 0;
452 static int sp887x_read_ber(struct dvb_frontend* fe, u32* ber)
454 struct sp887x_state* state = fe->demodulator_priv;
456 *ber = (sp887x_readreg(state, 0xc08) & 0x3f) |
457 (sp887x_readreg(state, 0xc07) << 6);
458 sp887x_writereg(state, 0xc08, 0x000);
459 sp887x_writereg(state, 0xc07, 0x000);
460 if (*ber >= 0x3fff0)
461 *ber = ~0;
463 return 0;
466 static int sp887x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
468 struct sp887x_state* state = fe->demodulator_priv;
470 u16 snr12 = sp887x_readreg(state, 0xf16);
471 u32 signal = 3 * (snr12 << 4);
472 *strength = (signal < 0xffff) ? signal : 0xffff;
474 return 0;
477 static int sp887x_read_snr(struct dvb_frontend* fe, u16* snr)
479 struct sp887x_state* state = fe->demodulator_priv;
481 u16 snr12 = sp887x_readreg(state, 0xf16);
482 *snr = (snr12 << 4) | (snr12 >> 8);
484 return 0;
487 static int sp887x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
489 struct sp887x_state* state = fe->demodulator_priv;
491 *ucblocks = sp887x_readreg(state, 0xc0c);
492 if (*ucblocks == 0xfff)
493 *ucblocks = ~0;
495 return 0;
498 static int sp887x_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
500 struct sp887x_state* state = fe->demodulator_priv;
502 if (enable) {
503 return sp887x_writereg(state, 0x206, 0x001);
504 } else {
505 return sp887x_writereg(state, 0x206, 0x000);
509 static int sp887x_sleep(struct dvb_frontend* fe)
511 struct sp887x_state* state = fe->demodulator_priv;
513 /* tristate TS output and disable interface pins */
514 sp887x_writereg(state, 0xc18, 0x000);
516 return 0;
519 static int sp887x_init(struct dvb_frontend* fe)
521 struct sp887x_state* state = fe->demodulator_priv;
522 const struct firmware *fw = NULL;
523 int ret;
525 if (!state->initialised) {
526 /* request the firmware, this will block until someone uploads it */
527 printk("sp887x: waiting for firmware upload (%s)...\n", SP887X_DEFAULT_FIRMWARE);
528 ret = state->config->request_firmware(fe, &fw, SP887X_DEFAULT_FIRMWARE);
529 if (ret) {
530 printk("sp887x: no firmware upload (timeout or file not found?)\n");
531 return ret;
534 ret = sp887x_initial_setup(fe, fw);
535 release_firmware(fw);
536 if (ret) {
537 printk("sp887x: writing firmware to device failed\n");
538 return ret;
540 printk("sp887x: firmware upload complete\n");
541 state->initialised = 1;
544 /* enable TS output and interface pins */
545 sp887x_writereg(state, 0xc18, 0x00d);
547 return 0;
550 static int sp887x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
552 fesettings->min_delay_ms = 350;
553 fesettings->step_size = 166666*2;
554 fesettings->max_drift = (166666*2)+1;
555 return 0;
558 static void sp887x_release(struct dvb_frontend* fe)
560 struct sp887x_state* state = fe->demodulator_priv;
561 kfree(state);
564 static const struct dvb_frontend_ops sp887x_ops;
566 struct dvb_frontend* sp887x_attach(const struct sp887x_config* config,
567 struct i2c_adapter* i2c)
569 struct sp887x_state* state = NULL;
571 /* allocate memory for the internal state */
572 state = kzalloc(sizeof(struct sp887x_state), GFP_KERNEL);
573 if (state == NULL) goto error;
575 /* setup the state */
576 state->config = config;
577 state->i2c = i2c;
578 state->initialised = 0;
580 /* check if the demod is there */
581 if (sp887x_readreg(state, 0x0200) < 0) goto error;
583 /* create dvb_frontend */
584 memcpy(&state->frontend.ops, &sp887x_ops, sizeof(struct dvb_frontend_ops));
585 state->frontend.demodulator_priv = state;
586 return &state->frontend;
588 error:
589 kfree(state);
590 return NULL;
593 static const struct dvb_frontend_ops sp887x_ops = {
594 .delsys = { SYS_DVBT },
595 .info = {
596 .name = "Spase SP887x DVB-T",
597 .frequency_min = 50500000,
598 .frequency_max = 858000000,
599 .frequency_stepsize = 166666,
600 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
601 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
602 FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 |
603 FE_CAN_RECOVER
606 .release = sp887x_release,
608 .init = sp887x_init,
609 .sleep = sp887x_sleep,
610 .i2c_gate_ctrl = sp887x_i2c_gate_ctrl,
612 .set_frontend = sp887x_setup_frontend_parameters,
613 .get_tune_settings = sp887x_get_tune_settings,
615 .read_status = sp887x_read_status,
616 .read_ber = sp887x_read_ber,
617 .read_signal_strength = sp887x_read_signal_strength,
618 .read_snr = sp887x_read_snr,
619 .read_ucblocks = sp887x_read_ucblocks,
622 module_param(debug, int, 0644);
623 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
625 MODULE_DESCRIPTION("Spase sp887x DVB-T demodulator driver");
626 MODULE_LICENSE("GPL");
628 EXPORT_SYMBOL(sp887x_attach);