drivers/media/pci/cx18/cx18-io.h

   1 /*
   2  *  cx18 driver PCI memory mapped IO access routines
   3  *
   4  *  Copyright (C) 2007  Hans Verkuil <hverkuil@xs4all.nl>
   5  *  Copyright (C) 2008  Andy Walls <awalls@md.metrocast.net>
   6  *
   7  *  This program is free software; you can redistribute it and/or modify
   8  *  it under the terms of the GNU General Public License as published by
   9  *  the Free Software Foundation; either version 2 of the License, or
  10  *  (at your option) any later version.
  11  *
  12  *  This program is distributed in the hope that it will be useful,
  13  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  *  GNU General Public License for more details.
  16  */
  17
  18 #ifndef CX18_IO_H
  19 #define CX18_IO_H
  20
  21 #include "cx18-driver.h"
  22
  23 /*
  24  * Readback and retry of MMIO access for reliability:
  25  * The concept was suggested by Steve Toth <stoth@linuxtv.org>.
  26  * The implmentation is the fault of Andy Walls <awalls@md.metrocast.net>.
  27  *
  28  * *write* functions are implied to retry the mmio unless suffixed with _noretry
  29  * *read* functions never retry the mmio (it never helps to do so)
  30  */
  31
  32 /* Non byteswapping memory mapped IO */
  33 static inline u32 cx18_raw_readl(struct cx18 *cx, const void __iomem *addr)
  34 {
  35         return __raw_readl(addr);
  36 }
  37
  38 static inline
  39 void cx18_raw_writel_noretry(struct cx18 *cx, u32 val, void __iomem *addr)
  40 {
  41         __raw_writel(val, addr);
  42 }
  43
  44 static inline void cx18_raw_writel(struct cx18 *cx, u32 val, void __iomem *addr)
  45 {
  46         int i;
  47         for (i = 0; i < CX18_MAX_MMIO_WR_RETRIES; i++) {
  48                 cx18_raw_writel_noretry(cx, val, addr);
  49                 if (val == cx18_raw_readl(cx, addr))
  50                         break;
  51         }
  52 }
  53
  54 /* Normal memory mapped IO */
  55 static inline u32 cx18_readl(struct cx18 *cx, const void __iomem *addr)
  56 {
  57         return readl(addr);
  58 }
  59
  60 static inline
  61 void cx18_writel_noretry(struct cx18 *cx, u32 val, void __iomem *addr)
  62 {
  63         writel(val, addr);
  64 }
  65
  66 static inline void cx18_writel(struct cx18 *cx, u32 val, void __iomem *addr)
  67 {
  68         int i;
  69         for (i = 0; i < CX18_MAX_MMIO_WR_RETRIES; i++) {
  70                 cx18_writel_noretry(cx, val, addr);
  71                 if (val == cx18_readl(cx, addr))
  72                         break;
  73         }
  74 }
  75
  76 static inline
  77 void cx18_writel_expect(struct cx18 *cx, u32 val, void __iomem *addr,
  78                         u32 eval, u32 mask)
  79 {
  80         int i;
  81         u32 r;
  82         eval &= mask;
  83         for (i = 0; i < CX18_MAX_MMIO_WR_RETRIES; i++) {
  84                 cx18_writel_noretry(cx, val, addr);
  85                 r = cx18_readl(cx, addr);
  86                 if (r == 0xffffffff && eval != 0xffffffff)
  87                         continue;
  88                 if (eval == (r & mask))
  89                         break;
  90         }
  91 }
  92
  93 static inline u16 cx18_readw(struct cx18 *cx, const void __iomem *addr)
  94 {
  95         return readw(addr);
  96 }
  97
  98 static inline
  99 void cx18_writew_noretry(struct cx18 *cx, u16 val, void __iomem *addr)
 100 {
 101         writew(val, addr);
 102 }
 103
 104 static inline void cx18_writew(struct cx18 *cx, u16 val, void __iomem *addr)
 105 {
 106         int i;
 107         for (i = 0; i < CX18_MAX_MMIO_WR_RETRIES; i++) {
 108                 cx18_writew_noretry(cx, val, addr);
 109                 if (val == cx18_readw(cx, addr))
 110                         break;
 111         }
 112 }
 113
 114 static inline u8 cx18_readb(struct cx18 *cx, const void __iomem *addr)
 115 {
 116         return readb(addr);
 117 }
 118
 119 static inline
 120 void cx18_writeb_noretry(struct cx18 *cx, u8 val, void __iomem *addr)
 121 {
 122         writeb(val, addr);
 123 }
 124
 125 static inline void cx18_writeb(struct cx18 *cx, u8 val, void __iomem *addr)
 126 {
 127         int i;
 128         for (i = 0; i < CX18_MAX_MMIO_WR_RETRIES; i++) {
 129                 cx18_writeb_noretry(cx, val, addr);
 130                 if (val == cx18_readb(cx, addr))
 131                         break;
 132         }
 133 }
 134
 135 static inline
 136 void cx18_memcpy_fromio(struct cx18 *cx, void *to,
 137                         const void __iomem *from, unsigned int len)
 138 {
 139         memcpy_fromio(to, from, len);
 140 }
 141
 142 void cx18_memset_io(struct cx18 *cx, void __iomem *addr, int val, size_t count);
 143
 144
 145 /* Access "register" region of CX23418 memory mapped I/O */
 146 static inline void cx18_write_reg_noretry(struct cx18 *cx, u32 val, u32 reg)
 147 {
 148         cx18_writel_noretry(cx, val, cx->reg_mem + reg);
 149 }
 150
 151 static inline void cx18_write_reg(struct cx18 *cx, u32 val, u32 reg)
 152 {
 153         cx18_writel(cx, val, cx->reg_mem + reg);
 154 }
 155
 156 static inline void cx18_write_reg_expect(struct cx18 *cx, u32 val, u32 reg,
 157                                          u32 eval, u32 mask)
 158 {
 159         cx18_writel_expect(cx, val, cx->reg_mem + reg, eval, mask);
 160 }
 161
 162 static inline u32 cx18_read_reg(struct cx18 *cx, u32 reg)
 163 {
 164         return cx18_readl(cx, cx->reg_mem + reg);
 165 }
 166
 167
 168 /* Access "encoder memory" region of CX23418 memory mapped I/O */
 169 static inline void cx18_write_enc(struct cx18 *cx, u32 val, u32 addr)
 170 {
 171         cx18_writel(cx, val, cx->enc_mem + addr);
 172 }
 173
 174 static inline u32 cx18_read_enc(struct cx18 *cx, u32 addr)
 175 {
 176         return cx18_readl(cx, cx->enc_mem + addr);
 177 }
 178
 179 void cx18_sw1_irq_enable(struct cx18 *cx, u32 val);
 180 void cx18_sw1_irq_disable(struct cx18 *cx, u32 val);
 181 void cx18_sw2_irq_enable(struct cx18 *cx, u32 val);
 182 void cx18_sw2_irq_disable(struct cx18 *cx, u32 val);
 183 void cx18_sw2_irq_disable_cpu(struct cx18 *cx, u32 val);
 184 void cx18_setup_page(struct cx18 *cx, u32 addr);
 185
 186 #endif /* CX18_IO_H */