2 * R-Car Gen3 Digital Radio Interface (DRIF) driver
4 * Copyright (C) 2017 Renesas Electronics Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
18 * The R-Car DRIF is a receive only MSIOF like controller with an
19 * external master device driving the SCK. It receives data into a FIFO,
20 * then this driver uses the SYS-DMAC engine to move the data from
21 * the device to memory.
23 * Each DRIF channel DRIFx (as per datasheet) contains two internal
24 * channels DRIFx0 & DRIFx1 within itself with each having its own resources
25 * like module clk, register set, irq and dma. These internal channels share
26 * common CLK & SYNC from master. The two data pins D0 & D1 shall be
27 * considered to represent the two internal channels. This internal split
28 * is not visible to the master device.
30 * Depending on the master device, a DRIF channel can use
31 * (1) both internal channels (D0 & D1) to receive data in parallel (or)
32 * (2) one internal channel (D0 or D1) to receive data
34 * The primary design goal of this controller is to act as a Digital Radio
35 * Interface that receives digital samples from a tuner device. Hence the
36 * driver exposes the device as a V4L2 SDR device. In order to qualify as
37 * a V4L2 SDR device, it should possess a tuner interface as mandated by the
38 * framework. This driver expects a tuner driver (sub-device) to bind
39 * asynchronously with this device and the combined drivers shall expose
40 * a V4L2 compliant SDR device. The DRIF driver is independent of the
43 * The DRIF h/w can support I2S mode and Frame start synchronization pulse mode.
44 * This driver is tested for I2S mode only because of the availability of
45 * suitable master devices. Hence, not all configurable options of DRIF h/w
46 * like lsb/msb first, syncdl, dtdl etc. are exposed via DT and I2S defaults
47 * are used. These can be exposed later if needed after testing.
49 #include <linux/bitops.h>
50 #include <linux/clk.h>
51 #include <linux/dma-mapping.h>
52 #include <linux/dmaengine.h>
53 #include <linux/ioctl.h>
54 #include <linux/iopoll.h>
55 #include <linux/module.h>
56 #include <linux/of_graph.h>
57 #include <linux/of_device.h>
58 #include <linux/platform_device.h>
59 #include <linux/sched.h>
60 #include <media/v4l2-async.h>
61 #include <media/v4l2-ctrls.h>
62 #include <media/v4l2-device.h>
63 #include <media/v4l2-event.h>
64 #include <media/v4l2-fh.h>
65 #include <media/v4l2-ioctl.h>
66 #include <media/videobuf2-v4l2.h>
67 #include <media/videobuf2-vmalloc.h>
69 /* DRIF register offsets */
70 #define RCAR_DRIF_SITMDR1 0x00
71 #define RCAR_DRIF_SITMDR2 0x04
72 #define RCAR_DRIF_SITMDR3 0x08
73 #define RCAR_DRIF_SIRMDR1 0x10
74 #define RCAR_DRIF_SIRMDR2 0x14
75 #define RCAR_DRIF_SIRMDR3 0x18
76 #define RCAR_DRIF_SICTR 0x28
77 #define RCAR_DRIF_SIFCTR 0x30
78 #define RCAR_DRIF_SISTR 0x40
79 #define RCAR_DRIF_SIIER 0x44
80 #define RCAR_DRIF_SIRFDR 0x60
82 #define RCAR_DRIF_RFOVF BIT(3) /* Receive FIFO overflow */
83 #define RCAR_DRIF_RFUDF BIT(4) /* Receive FIFO underflow */
84 #define RCAR_DRIF_RFSERR BIT(5) /* Receive frame sync error */
85 #define RCAR_DRIF_REOF BIT(7) /* Frame reception end */
86 #define RCAR_DRIF_RDREQ BIT(12) /* Receive data xfer req */
87 #define RCAR_DRIF_RFFUL BIT(13) /* Receive FIFO full */
90 #define RCAR_DRIF_SIRMDR1_SYNCMD_FRAME (0 << 28)
91 #define RCAR_DRIF_SIRMDR1_SYNCMD_LR (3 << 28)
93 #define RCAR_DRIF_SIRMDR1_SYNCAC_POL_HIGH (0 << 25)
94 #define RCAR_DRIF_SIRMDR1_SYNCAC_POL_LOW (1 << 25)
96 #define RCAR_DRIF_SIRMDR1_MSB_FIRST (0 << 24)
97 #define RCAR_DRIF_SIRMDR1_LSB_FIRST (1 << 24)
99 #define RCAR_DRIF_SIRMDR1_DTDL_0 (0 << 20)
100 #define RCAR_DRIF_SIRMDR1_DTDL_1 (1 << 20)
101 #define RCAR_DRIF_SIRMDR1_DTDL_2 (2 << 20)
102 #define RCAR_DRIF_SIRMDR1_DTDL_0PT5 (5 << 20)
103 #define RCAR_DRIF_SIRMDR1_DTDL_1PT5 (6 << 20)
105 #define RCAR_DRIF_SIRMDR1_SYNCDL_0 (0 << 20)
106 #define RCAR_DRIF_SIRMDR1_SYNCDL_1 (1 << 20)
107 #define RCAR_DRIF_SIRMDR1_SYNCDL_2 (2 << 20)
108 #define RCAR_DRIF_SIRMDR1_SYNCDL_3 (3 << 20)
109 #define RCAR_DRIF_SIRMDR1_SYNCDL_0PT5 (5 << 20)
110 #define RCAR_DRIF_SIRMDR1_SYNCDL_1PT5 (6 << 20)
112 #define RCAR_DRIF_MDR_GRPCNT(n) (((n) - 1) << 30)
113 #define RCAR_DRIF_MDR_BITLEN(n) (((n) - 1) << 24)
114 #define RCAR_DRIF_MDR_WDCNT(n) (((n) - 1) << 16)
116 /* Hidden Transmit register that controls CLK & SYNC */
117 #define RCAR_DRIF_SITMDR1_PCON BIT(30)
119 #define RCAR_DRIF_SICTR_RX_RISING_EDGE BIT(26)
120 #define RCAR_DRIF_SICTR_RX_EN BIT(8)
121 #define RCAR_DRIF_SICTR_RESET BIT(0)
124 #define RCAR_DRIF_NUM_HWBUFS 32
125 #define RCAR_DRIF_MAX_DEVS 4
126 #define RCAR_DRIF_DEFAULT_NUM_HWBUFS 16
127 #define RCAR_DRIF_DEFAULT_HWBUF_SIZE (4 * PAGE_SIZE)
128 #define RCAR_DRIF_MAX_CHANNEL 2
129 #define RCAR_SDR_BUFFER_SIZE SZ_64K
131 /* Internal buffer status flags */
132 #define RCAR_DRIF_BUF_DONE BIT(0) /* DMA completed */
133 #define RCAR_DRIF_BUF_OVERFLOW BIT(1) /* Overflow detected */
135 #define to_rcar_drif_buf_pair(sdr, ch_num, idx) \
136 (&((sdr)->ch[!(ch_num)]->buf[(idx)]))
138 #define for_each_rcar_drif_channel(ch, ch_mask) \
139 for_each_set_bit(ch, ch_mask, RCAR_DRIF_MAX_CHANNEL)
142 #define rdrif_dbg(sdr, fmt, arg...) \
143 dev_dbg(sdr->v4l2_dev.dev, fmt, ## arg)
145 #define rdrif_err(sdr, fmt, arg...) \
146 dev_err(sdr->v4l2_dev.dev, fmt, ## arg)
149 struct rcar_drif_format
{
157 /* Format descriptions for capture */
158 static const struct rcar_drif_format formats
[] = {
160 .pixelformat
= V4L2_SDR_FMT_PCU16BE
,
161 .buffersize
= RCAR_SDR_BUFFER_SIZE
,
167 .pixelformat
= V4L2_SDR_FMT_PCU18BE
,
168 .buffersize
= RCAR_SDR_BUFFER_SIZE
,
174 .pixelformat
= V4L2_SDR_FMT_PCU20BE
,
175 .buffersize
= RCAR_SDR_BUFFER_SIZE
,
182 /* Buffer for a received frame from one or both internal channels */
183 struct rcar_drif_frame_buf
{
184 /* Common v4l buffer stuff -- must be first */
185 struct vb2_v4l2_buffer vb
;
186 struct list_head list
;
189 /* OF graph endpoint's V4L2 async data */
190 struct rcar_drif_graph_ep
{
191 struct v4l2_subdev
*subdev
; /* Async matched subdev */
192 struct v4l2_async_subdev asd
; /* Async sub-device descriptor */
196 struct rcar_drif_hwbuf
{
197 void *addr
; /* CPU-side address */
198 unsigned int status
; /* Buffer status flags */
201 /* Internal channel */
203 struct rcar_drif_sdr
*sdr
; /* Group device */
204 struct platform_device
*pdev
; /* Channel's pdev */
205 void __iomem
*base
; /* Base register address */
206 resource_size_t start
; /* I/O resource offset */
207 struct dma_chan
*dmach
; /* Reserved DMA channel */
208 struct clk
*clk
; /* Module clock */
209 struct rcar_drif_hwbuf buf
[RCAR_DRIF_NUM_HWBUFS
]; /* H/W bufs */
210 dma_addr_t dma_handle
; /* Handle for all bufs */
211 unsigned int num
; /* Channel number */
212 bool acting_sdr
; /* Channel acting as SDR device */
216 struct rcar_drif_sdr
{
217 struct device
*dev
; /* Platform device */
218 struct video_device
*vdev
; /* V4L2 SDR device */
219 struct v4l2_device v4l2_dev
; /* V4L2 device */
221 /* Videobuf2 queue and queued buffers list */
222 struct vb2_queue vb_queue
;
223 struct list_head queued_bufs
;
224 spinlock_t queued_bufs_lock
; /* Protects queued_bufs */
225 spinlock_t dma_lock
; /* To serialize DMA cb of channels */
227 struct mutex v4l2_mutex
; /* To serialize ioctls */
228 struct mutex vb_queue_mutex
; /* To serialize streaming ioctls */
229 struct v4l2_ctrl_handler ctrl_hdl
; /* SDR control handler */
230 struct v4l2_async_notifier notifier
; /* For subdev (tuner) */
231 struct rcar_drif_graph_ep ep
; /* Endpoint V4L2 async data */
233 /* Current V4L2 SDR format ptr */
234 const struct rcar_drif_format
*fmt
;
236 /* Device tree SYNC properties */
240 struct rcar_drif
*ch
[RCAR_DRIF_MAX_CHANNEL
]; /* DRIFx0,1 */
241 unsigned long hw_ch_mask
; /* Enabled channels per DT */
242 unsigned long cur_ch_mask
; /* Used channels for an SDR FMT */
243 u32 num_hw_ch
; /* Num of DT enabled channels */
244 u32 num_cur_ch
; /* Num of used channels */
245 u32 hwbuf_size
; /* Each DMA buffer size */
246 u32 produced
; /* Buffers produced by sdr dev */
249 /* Register access functions */
250 static void rcar_drif_write(struct rcar_drif
*ch
, u32 offset
, u32 data
)
252 writel(data
, ch
->base
+ offset
);
255 static u32
rcar_drif_read(struct rcar_drif
*ch
, u32 offset
)
257 return readl(ch
->base
+ offset
);
260 /* Release DMA channels */
261 static void rcar_drif_release_dmachannels(struct rcar_drif_sdr
*sdr
)
265 for_each_rcar_drif_channel(i
, &sdr
->cur_ch_mask
)
266 if (sdr
->ch
[i
]->dmach
) {
267 dma_release_channel(sdr
->ch
[i
]->dmach
);
268 sdr
->ch
[i
]->dmach
= NULL
;
272 /* Allocate DMA channels */
273 static int rcar_drif_alloc_dmachannels(struct rcar_drif_sdr
*sdr
)
275 struct dma_slave_config dma_cfg
;
279 for_each_rcar_drif_channel(i
, &sdr
->cur_ch_mask
) {
280 struct rcar_drif
*ch
= sdr
->ch
[i
];
282 ch
->dmach
= dma_request_slave_channel(&ch
->pdev
->dev
, "rx");
284 rdrif_err(sdr
, "ch%u: dma channel req failed\n", i
);
288 /* Configure slave */
289 memset(&dma_cfg
, 0, sizeof(dma_cfg
));
290 dma_cfg
.src_addr
= (phys_addr_t
)(ch
->start
+ RCAR_DRIF_SIRFDR
);
291 dma_cfg
.src_addr_width
= DMA_SLAVE_BUSWIDTH_4_BYTES
;
292 ret
= dmaengine_slave_config(ch
->dmach
, &dma_cfg
);
294 rdrif_err(sdr
, "ch%u: dma slave config failed\n", i
);
301 rcar_drif_release_dmachannels(sdr
);
305 /* Release queued vb2 buffers */
306 static void rcar_drif_release_queued_bufs(struct rcar_drif_sdr
*sdr
,
307 enum vb2_buffer_state state
)
309 struct rcar_drif_frame_buf
*fbuf
, *tmp
;
312 spin_lock_irqsave(&sdr
->queued_bufs_lock
, flags
);
313 list_for_each_entry_safe(fbuf
, tmp
, &sdr
->queued_bufs
, list
) {
314 list_del(&fbuf
->list
);
315 vb2_buffer_done(&fbuf
->vb
.vb2_buf
, state
);
317 spin_unlock_irqrestore(&sdr
->queued_bufs_lock
, flags
);
320 /* Set MDR defaults */
321 static inline void rcar_drif_set_mdr1(struct rcar_drif_sdr
*sdr
)
325 /* Set defaults for enabled internal channels */
326 for_each_rcar_drif_channel(i
, &sdr
->cur_ch_mask
) {
327 /* Refer MSIOF section in manual for this register setting */
328 rcar_drif_write(sdr
->ch
[i
], RCAR_DRIF_SITMDR1
,
329 RCAR_DRIF_SITMDR1_PCON
);
331 /* Setup MDR1 value */
332 rcar_drif_write(sdr
->ch
[i
], RCAR_DRIF_SIRMDR1
, sdr
->mdr1
);
334 rdrif_dbg(sdr
, "ch%u: mdr1 = 0x%08x",
335 i
, rcar_drif_read(sdr
->ch
[i
], RCAR_DRIF_SIRMDR1
));
339 /* Set DRIF receive format */
340 static int rcar_drif_set_format(struct rcar_drif_sdr
*sdr
)
344 rdrif_dbg(sdr
, "setfmt: bitlen %u wdcnt %u num_ch %u\n",
345 sdr
->fmt
->bitlen
, sdr
->fmt
->wdcnt
, sdr
->fmt
->num_ch
);
348 if (sdr
->fmt
->num_ch
> sdr
->num_cur_ch
) {
349 rdrif_err(sdr
, "fmt num_ch %u cur_ch %u mismatch\n",
350 sdr
->fmt
->num_ch
, sdr
->num_cur_ch
);
354 /* Setup group, bitlen & wdcnt */
355 for_each_rcar_drif_channel(i
, &sdr
->cur_ch_mask
) {
359 mdr
= RCAR_DRIF_MDR_GRPCNT(2) |
360 RCAR_DRIF_MDR_BITLEN(sdr
->fmt
->bitlen
) |
361 RCAR_DRIF_MDR_WDCNT(sdr
->fmt
->wdcnt
);
362 rcar_drif_write(sdr
->ch
[i
], RCAR_DRIF_SIRMDR2
, mdr
);
364 mdr
= RCAR_DRIF_MDR_BITLEN(sdr
->fmt
->bitlen
) |
365 RCAR_DRIF_MDR_WDCNT(sdr
->fmt
->wdcnt
);
366 rcar_drif_write(sdr
->ch
[i
], RCAR_DRIF_SIRMDR3
, mdr
);
368 rdrif_dbg(sdr
, "ch%u: new mdr[2,3] = 0x%08x, 0x%08x\n",
369 i
, rcar_drif_read(sdr
->ch
[i
], RCAR_DRIF_SIRMDR2
),
370 rcar_drif_read(sdr
->ch
[i
], RCAR_DRIF_SIRMDR3
));
375 /* Release DMA buffers */
376 static void rcar_drif_release_buf(struct rcar_drif_sdr
*sdr
)
380 for_each_rcar_drif_channel(i
, &sdr
->cur_ch_mask
) {
381 struct rcar_drif
*ch
= sdr
->ch
[i
];
383 /* First entry contains the dma buf ptr */
384 if (ch
->buf
[0].addr
) {
385 dma_free_coherent(&ch
->pdev
->dev
,
386 sdr
->hwbuf_size
* RCAR_DRIF_NUM_HWBUFS
,
387 ch
->buf
[0].addr
, ch
->dma_handle
);
388 ch
->buf
[0].addr
= NULL
;
393 /* Request DMA buffers */
394 static int rcar_drif_request_buf(struct rcar_drif_sdr
*sdr
)
400 for_each_rcar_drif_channel(i
, &sdr
->cur_ch_mask
) {
401 struct rcar_drif
*ch
= sdr
->ch
[i
];
403 /* Allocate DMA buffers */
404 addr
= dma_alloc_coherent(&ch
->pdev
->dev
,
405 sdr
->hwbuf_size
* RCAR_DRIF_NUM_HWBUFS
,
406 &ch
->dma_handle
, GFP_KERNEL
);
409 "ch%u: dma alloc failed. num hwbufs %u size %u\n",
410 i
, RCAR_DRIF_NUM_HWBUFS
, sdr
->hwbuf_size
);
414 /* Split the chunk and populate bufctxt */
415 for (j
= 0; j
< RCAR_DRIF_NUM_HWBUFS
; j
++) {
416 ch
->buf
[j
].addr
= addr
+ (j
* sdr
->hwbuf_size
);
417 ch
->buf
[j
].status
= 0;
425 /* Setup vb_queue minimum buffer requirements */
426 static int rcar_drif_queue_setup(struct vb2_queue
*vq
,
427 unsigned int *num_buffers
, unsigned int *num_planes
,
428 unsigned int sizes
[], struct device
*alloc_devs
[])
430 struct rcar_drif_sdr
*sdr
= vb2_get_drv_priv(vq
);
432 /* Need at least 16 buffers */
433 if (vq
->num_buffers
+ *num_buffers
< 16)
434 *num_buffers
= 16 - vq
->num_buffers
;
437 sizes
[0] = PAGE_ALIGN(sdr
->fmt
->buffersize
);
438 rdrif_dbg(sdr
, "num_bufs %d sizes[0] %d\n", *num_buffers
, sizes
[0]);
444 static void rcar_drif_buf_queue(struct vb2_buffer
*vb
)
446 struct vb2_v4l2_buffer
*vbuf
= to_vb2_v4l2_buffer(vb
);
447 struct rcar_drif_sdr
*sdr
= vb2_get_drv_priv(vb
->vb2_queue
);
448 struct rcar_drif_frame_buf
*fbuf
=
449 container_of(vbuf
, struct rcar_drif_frame_buf
, vb
);
452 rdrif_dbg(sdr
, "buf_queue idx %u\n", vb
->index
);
453 spin_lock_irqsave(&sdr
->queued_bufs_lock
, flags
);
454 list_add_tail(&fbuf
->list
, &sdr
->queued_bufs
);
455 spin_unlock_irqrestore(&sdr
->queued_bufs_lock
, flags
);
458 /* Get a frame buf from list */
459 static struct rcar_drif_frame_buf
*
460 rcar_drif_get_fbuf(struct rcar_drif_sdr
*sdr
)
462 struct rcar_drif_frame_buf
*fbuf
;
465 spin_lock_irqsave(&sdr
->queued_bufs_lock
, flags
);
466 fbuf
= list_first_entry_or_null(&sdr
->queued_bufs
, struct
467 rcar_drif_frame_buf
, list
);
470 * App is late in enqueing buffers. Samples lost & there will
471 * be a gap in sequence number when app recovers
473 rdrif_dbg(sdr
, "\napp late: prod %u\n", sdr
->produced
);
474 spin_unlock_irqrestore(&sdr
->queued_bufs_lock
, flags
);
477 list_del(&fbuf
->list
);
478 spin_unlock_irqrestore(&sdr
->queued_bufs_lock
, flags
);
483 /* Helpers to set/clear buf pair status */
484 static inline bool rcar_drif_bufs_done(struct rcar_drif_hwbuf
**buf
)
486 return (buf
[0]->status
& buf
[1]->status
& RCAR_DRIF_BUF_DONE
);
489 static inline bool rcar_drif_bufs_overflow(struct rcar_drif_hwbuf
**buf
)
491 return ((buf
[0]->status
| buf
[1]->status
) & RCAR_DRIF_BUF_OVERFLOW
);
494 static inline void rcar_drif_bufs_clear(struct rcar_drif_hwbuf
**buf
,
499 for (i
= 0; i
< RCAR_DRIF_MAX_CHANNEL
; i
++)
500 buf
[i
]->status
&= ~bit
;
503 /* Channel DMA complete */
504 static void rcar_drif_channel_complete(struct rcar_drif
*ch
, u32 idx
)
508 ch
->buf
[idx
].status
|= RCAR_DRIF_BUF_DONE
;
510 /* Check for DRIF errors */
511 str
= rcar_drif_read(ch
, RCAR_DRIF_SISTR
);
512 if (unlikely(str
& RCAR_DRIF_RFOVF
)) {
513 /* Writing the same clears it */
514 rcar_drif_write(ch
, RCAR_DRIF_SISTR
, str
);
516 /* Overflow: some samples are lost */
517 ch
->buf
[idx
].status
|= RCAR_DRIF_BUF_OVERFLOW
;
521 /* DMA callback for each stage */
522 static void rcar_drif_dma_complete(void *dma_async_param
)
524 struct rcar_drif
*ch
= dma_async_param
;
525 struct rcar_drif_sdr
*sdr
= ch
->sdr
;
526 struct rcar_drif_hwbuf
*buf
[RCAR_DRIF_MAX_CHANNEL
];
527 struct rcar_drif_frame_buf
*fbuf
;
528 bool overflow
= false;
532 spin_lock(&sdr
->dma_lock
);
534 /* DMA can be terminated while the callback was waiting on lock */
535 if (!vb2_is_streaming(&sdr
->vb_queue
)) {
536 spin_unlock(&sdr
->dma_lock
);
540 idx
= sdr
->produced
% RCAR_DRIF_NUM_HWBUFS
;
541 rcar_drif_channel_complete(ch
, idx
);
543 if (sdr
->num_cur_ch
== RCAR_DRIF_MAX_CHANNEL
) {
544 buf
[0] = ch
->num
? to_rcar_drif_buf_pair(sdr
, ch
->num
, idx
) :
546 buf
[1] = ch
->num
? &ch
->buf
[idx
] :
547 to_rcar_drif_buf_pair(sdr
, ch
->num
, idx
);
549 /* Check if both DMA buffers are done */
550 if (!rcar_drif_bufs_done(buf
)) {
551 spin_unlock(&sdr
->dma_lock
);
555 /* Clear buf done status */
556 rcar_drif_bufs_clear(buf
, RCAR_DRIF_BUF_DONE
);
558 if (rcar_drif_bufs_overflow(buf
)) {
560 /* Clear the flag in status */
561 rcar_drif_bufs_clear(buf
, RCAR_DRIF_BUF_OVERFLOW
);
564 buf
[0] = &ch
->buf
[idx
];
565 if (buf
[0]->status
& RCAR_DRIF_BUF_OVERFLOW
) {
567 /* Clear the flag in status */
568 buf
[0]->status
&= ~RCAR_DRIF_BUF_OVERFLOW
;
572 /* Buffer produced for consumption */
573 produced
= sdr
->produced
++;
574 spin_unlock(&sdr
->dma_lock
);
576 rdrif_dbg(sdr
, "ch%u: prod %u\n", ch
->num
, produced
);
579 fbuf
= rcar_drif_get_fbuf(sdr
);
583 for (i
= 0; i
< RCAR_DRIF_MAX_CHANNEL
; i
++)
584 memcpy(vb2_plane_vaddr(&fbuf
->vb
.vb2_buf
, 0) +
585 i
* sdr
->hwbuf_size
, buf
[i
]->addr
, sdr
->hwbuf_size
);
587 fbuf
->vb
.field
= V4L2_FIELD_NONE
;
588 fbuf
->vb
.sequence
= produced
;
589 fbuf
->vb
.vb2_buf
.timestamp
= ktime_get_ns();
590 vb2_set_plane_payload(&fbuf
->vb
.vb2_buf
, 0, sdr
->fmt
->buffersize
);
592 /* Set error state on overflow */
593 vb2_buffer_done(&fbuf
->vb
.vb2_buf
,
594 overflow
? VB2_BUF_STATE_ERROR
: VB2_BUF_STATE_DONE
);
597 static int rcar_drif_qbuf(struct rcar_drif
*ch
)
599 struct rcar_drif_sdr
*sdr
= ch
->sdr
;
600 dma_addr_t addr
= ch
->dma_handle
;
601 struct dma_async_tx_descriptor
*rxd
;
605 /* Setup cyclic DMA with given buffers */
606 rxd
= dmaengine_prep_dma_cyclic(ch
->dmach
, addr
,
607 sdr
->hwbuf_size
* RCAR_DRIF_NUM_HWBUFS
,
608 sdr
->hwbuf_size
, DMA_DEV_TO_MEM
,
609 DMA_PREP_INTERRUPT
| DMA_CTRL_ACK
);
611 rdrif_err(sdr
, "ch%u: prep dma cyclic failed\n", ch
->num
);
615 /* Submit descriptor */
616 rxd
->callback
= rcar_drif_dma_complete
;
617 rxd
->callback_param
= ch
;
618 cookie
= dmaengine_submit(rxd
);
619 if (dma_submit_error(cookie
)) {
620 rdrif_err(sdr
, "ch%u: dma submit failed\n", ch
->num
);
624 dma_async_issue_pending(ch
->dmach
);
628 /* Enable reception */
629 static int rcar_drif_enable_rx(struct rcar_drif_sdr
*sdr
)
636 * When both internal channels are enabled, they can be synchronized
641 for_each_rcar_drif_channel(i
, &sdr
->cur_ch_mask
) {
642 ctr
= rcar_drif_read(sdr
->ch
[i
], RCAR_DRIF_SICTR
);
643 ctr
|= (RCAR_DRIF_SICTR_RX_RISING_EDGE
|
644 RCAR_DRIF_SICTR_RX_EN
);
645 rcar_drif_write(sdr
->ch
[i
], RCAR_DRIF_SICTR
, ctr
);
648 /* Check receive enabled */
649 for_each_rcar_drif_channel(i
, &sdr
->cur_ch_mask
) {
650 ret
= readl_poll_timeout(sdr
->ch
[i
]->base
+ RCAR_DRIF_SICTR
,
651 ctr
, ctr
& RCAR_DRIF_SICTR_RX_EN
, 7, 100000);
653 rdrif_err(sdr
, "ch%u: rx en failed. ctr 0x%08x\n", i
,
654 rcar_drif_read(sdr
->ch
[i
], RCAR_DRIF_SICTR
));
661 /* Disable reception */
662 static void rcar_drif_disable_rx(struct rcar_drif_sdr
*sdr
)
668 /* Disable receive */
669 for_each_rcar_drif_channel(i
, &sdr
->cur_ch_mask
) {
670 ctr
= rcar_drif_read(sdr
->ch
[i
], RCAR_DRIF_SICTR
);
671 ctr
&= ~RCAR_DRIF_SICTR_RX_EN
;
672 rcar_drif_write(sdr
->ch
[i
], RCAR_DRIF_SICTR
, ctr
);
675 /* Check receive disabled */
676 for_each_rcar_drif_channel(i
, &sdr
->cur_ch_mask
) {
677 ret
= readl_poll_timeout(sdr
->ch
[i
]->base
+ RCAR_DRIF_SICTR
,
678 ctr
, !(ctr
& RCAR_DRIF_SICTR_RX_EN
), 7, 100000);
680 dev_warn(&sdr
->vdev
->dev
,
681 "ch%u: failed to disable rx. ctr 0x%08x\n",
682 i
, rcar_drif_read(sdr
->ch
[i
], RCAR_DRIF_SICTR
));
687 static void rcar_drif_stop_channel(struct rcar_drif
*ch
)
689 /* Disable DMA receive interrupt */
690 rcar_drif_write(ch
, RCAR_DRIF_SIIER
, 0x00000000);
692 /* Terminate all DMA transfers */
693 dmaengine_terminate_sync(ch
->dmach
);
696 /* Stop receive operation */
697 static void rcar_drif_stop(struct rcar_drif_sdr
*sdr
)
702 rcar_drif_disable_rx(sdr
);
704 for_each_rcar_drif_channel(i
, &sdr
->cur_ch_mask
)
705 rcar_drif_stop_channel(sdr
->ch
[i
]);
709 static int rcar_drif_start_channel(struct rcar_drif
*ch
)
711 struct rcar_drif_sdr
*sdr
= ch
->sdr
;
716 rcar_drif_write(ch
, RCAR_DRIF_SICTR
, RCAR_DRIF_SICTR_RESET
);
717 ret
= readl_poll_timeout(ch
->base
+ RCAR_DRIF_SICTR
, ctr
,
718 !(ctr
& RCAR_DRIF_SICTR_RESET
), 7, 100000);
720 rdrif_err(sdr
, "ch%u: failed to reset rx. ctr 0x%08x\n",
721 ch
->num
, rcar_drif_read(ch
, RCAR_DRIF_SICTR
));
725 /* Queue buffers for DMA */
726 ret
= rcar_drif_qbuf(ch
);
730 /* Clear status register flags */
731 str
= RCAR_DRIF_RFFUL
| RCAR_DRIF_REOF
| RCAR_DRIF_RFSERR
|
732 RCAR_DRIF_RFUDF
| RCAR_DRIF_RFOVF
;
733 rcar_drif_write(ch
, RCAR_DRIF_SISTR
, str
);
735 /* Enable DMA receive interrupt */
736 rcar_drif_write(ch
, RCAR_DRIF_SIIER
, 0x00009000);
741 /* Start receive operation */
742 static int rcar_drif_start(struct rcar_drif_sdr
*sdr
)
744 unsigned long enabled
= 0;
748 for_each_rcar_drif_channel(i
, &sdr
->cur_ch_mask
) {
749 ret
= rcar_drif_start_channel(sdr
->ch
[i
]);
755 ret
= rcar_drif_enable_rx(sdr
);
763 rcar_drif_disable_rx(sdr
);
765 for_each_rcar_drif_channel(i
, &enabled
)
766 rcar_drif_stop_channel(sdr
->ch
[i
]);
771 /* Start streaming */
772 static int rcar_drif_start_streaming(struct vb2_queue
*vq
, unsigned int count
)
774 struct rcar_drif_sdr
*sdr
= vb2_get_drv_priv(vq
);
775 unsigned long enabled
= 0;
779 mutex_lock(&sdr
->v4l2_mutex
);
781 for_each_rcar_drif_channel(i
, &sdr
->cur_ch_mask
) {
782 ret
= clk_prepare_enable(sdr
->ch
[i
]->clk
);
788 /* Set default MDRx settings */
789 rcar_drif_set_mdr1(sdr
);
792 ret
= rcar_drif_set_format(sdr
);
796 if (sdr
->num_cur_ch
== RCAR_DRIF_MAX_CHANNEL
)
797 sdr
->hwbuf_size
= sdr
->fmt
->buffersize
/ RCAR_DRIF_MAX_CHANNEL
;
799 sdr
->hwbuf_size
= sdr
->fmt
->buffersize
;
801 rdrif_dbg(sdr
, "num hwbufs %u, hwbuf_size %u\n",
802 RCAR_DRIF_NUM_HWBUFS
, sdr
->hwbuf_size
);
804 /* Alloc DMA channel */
805 ret
= rcar_drif_alloc_dmachannels(sdr
);
809 /* Request buffers */
810 ret
= rcar_drif_request_buf(sdr
);
815 ret
= rcar_drif_start(sdr
);
819 mutex_unlock(&sdr
->v4l2_mutex
);
824 rcar_drif_release_queued_bufs(sdr
, VB2_BUF_STATE_QUEUED
);
825 rcar_drif_release_buf(sdr
);
826 rcar_drif_release_dmachannels(sdr
);
827 for_each_rcar_drif_channel(i
, &enabled
)
828 clk_disable_unprepare(sdr
->ch
[i
]->clk
);
830 mutex_unlock(&sdr
->v4l2_mutex
);
836 static void rcar_drif_stop_streaming(struct vb2_queue
*vq
)
838 struct rcar_drif_sdr
*sdr
= vb2_get_drv_priv(vq
);
841 mutex_lock(&sdr
->v4l2_mutex
);
843 /* Stop hardware streaming */
846 /* Return all queued buffers to vb2 */
847 rcar_drif_release_queued_bufs(sdr
, VB2_BUF_STATE_ERROR
);
850 rcar_drif_release_buf(sdr
);
852 /* Release DMA channel resources */
853 rcar_drif_release_dmachannels(sdr
);
855 for_each_rcar_drif_channel(i
, &sdr
->cur_ch_mask
)
856 clk_disable_unprepare(sdr
->ch
[i
]->clk
);
858 mutex_unlock(&sdr
->v4l2_mutex
);
862 static const struct vb2_ops rcar_drif_vb2_ops
= {
863 .queue_setup
= rcar_drif_queue_setup
,
864 .buf_queue
= rcar_drif_buf_queue
,
865 .start_streaming
= rcar_drif_start_streaming
,
866 .stop_streaming
= rcar_drif_stop_streaming
,
867 .wait_prepare
= vb2_ops_wait_prepare
,
868 .wait_finish
= vb2_ops_wait_finish
,
871 static int rcar_drif_querycap(struct file
*file
, void *fh
,
872 struct v4l2_capability
*cap
)
874 struct rcar_drif_sdr
*sdr
= video_drvdata(file
);
876 strlcpy(cap
->driver
, KBUILD_MODNAME
, sizeof(cap
->driver
));
877 strlcpy(cap
->card
, sdr
->vdev
->name
, sizeof(cap
->card
));
878 snprintf(cap
->bus_info
, sizeof(cap
->bus_info
), "platform:%s",
884 static int rcar_drif_set_default_format(struct rcar_drif_sdr
*sdr
)
888 for (i
= 0; i
< ARRAY_SIZE(formats
); i
++) {
889 /* Matching fmt based on required channels is set as default */
890 if (sdr
->num_hw_ch
== formats
[i
].num_ch
) {
891 sdr
->fmt
= &formats
[i
];
892 sdr
->cur_ch_mask
= sdr
->hw_ch_mask
;
893 sdr
->num_cur_ch
= sdr
->num_hw_ch
;
894 dev_dbg(sdr
->dev
, "default fmt[%u]: mask %lu num %u\n",
895 i
, sdr
->cur_ch_mask
, sdr
->num_cur_ch
);
902 static int rcar_drif_enum_fmt_sdr_cap(struct file
*file
, void *priv
,
903 struct v4l2_fmtdesc
*f
)
905 if (f
->index
>= ARRAY_SIZE(formats
))
908 f
->pixelformat
= formats
[f
->index
].pixelformat
;
913 static int rcar_drif_g_fmt_sdr_cap(struct file
*file
, void *priv
,
914 struct v4l2_format
*f
)
916 struct rcar_drif_sdr
*sdr
= video_drvdata(file
);
918 f
->fmt
.sdr
.pixelformat
= sdr
->fmt
->pixelformat
;
919 f
->fmt
.sdr
.buffersize
= sdr
->fmt
->buffersize
;
924 static int rcar_drif_s_fmt_sdr_cap(struct file
*file
, void *priv
,
925 struct v4l2_format
*f
)
927 struct rcar_drif_sdr
*sdr
= video_drvdata(file
);
928 struct vb2_queue
*q
= &sdr
->vb_queue
;
934 for (i
= 0; i
< ARRAY_SIZE(formats
); i
++) {
935 if (formats
[i
].pixelformat
== f
->fmt
.sdr
.pixelformat
)
939 if (i
== ARRAY_SIZE(formats
))
940 i
= 0; /* Set the 1st format as default on no match */
942 sdr
->fmt
= &formats
[i
];
943 f
->fmt
.sdr
.pixelformat
= sdr
->fmt
->pixelformat
;
944 f
->fmt
.sdr
.buffersize
= formats
[i
].buffersize
;
945 memset(f
->fmt
.sdr
.reserved
, 0, sizeof(f
->fmt
.sdr
.reserved
));
948 * If a format demands one channel only out of two
949 * enabled channels, pick the 0th channel.
951 if (formats
[i
].num_ch
< sdr
->num_hw_ch
) {
952 sdr
->cur_ch_mask
= BIT(0);
953 sdr
->num_cur_ch
= formats
[i
].num_ch
;
955 sdr
->cur_ch_mask
= sdr
->hw_ch_mask
;
956 sdr
->num_cur_ch
= sdr
->num_hw_ch
;
959 rdrif_dbg(sdr
, "cur: idx %u mask %lu num %u\n",
960 i
, sdr
->cur_ch_mask
, sdr
->num_cur_ch
);
965 static int rcar_drif_try_fmt_sdr_cap(struct file
*file
, void *priv
,
966 struct v4l2_format
*f
)
970 for (i
= 0; i
< ARRAY_SIZE(formats
); i
++) {
971 if (formats
[i
].pixelformat
== f
->fmt
.sdr
.pixelformat
) {
972 f
->fmt
.sdr
.buffersize
= formats
[i
].buffersize
;
977 f
->fmt
.sdr
.pixelformat
= formats
[0].pixelformat
;
978 f
->fmt
.sdr
.buffersize
= formats
[0].buffersize
;
979 memset(f
->fmt
.sdr
.reserved
, 0, sizeof(f
->fmt
.sdr
.reserved
));
984 /* Tuner subdev ioctls */
985 static int rcar_drif_enum_freq_bands(struct file
*file
, void *priv
,
986 struct v4l2_frequency_band
*band
)
988 struct rcar_drif_sdr
*sdr
= video_drvdata(file
);
990 return v4l2_subdev_call(sdr
->ep
.subdev
, tuner
, enum_freq_bands
, band
);
993 static int rcar_drif_g_frequency(struct file
*file
, void *priv
,
994 struct v4l2_frequency
*f
)
996 struct rcar_drif_sdr
*sdr
= video_drvdata(file
);
998 return v4l2_subdev_call(sdr
->ep
.subdev
, tuner
, g_frequency
, f
);
1001 static int rcar_drif_s_frequency(struct file
*file
, void *priv
,
1002 const struct v4l2_frequency
*f
)
1004 struct rcar_drif_sdr
*sdr
= video_drvdata(file
);
1006 return v4l2_subdev_call(sdr
->ep
.subdev
, tuner
, s_frequency
, f
);
1009 static int rcar_drif_g_tuner(struct file
*file
, void *priv
,
1010 struct v4l2_tuner
*vt
)
1012 struct rcar_drif_sdr
*sdr
= video_drvdata(file
);
1014 return v4l2_subdev_call(sdr
->ep
.subdev
, tuner
, g_tuner
, vt
);
1017 static int rcar_drif_s_tuner(struct file
*file
, void *priv
,
1018 const struct v4l2_tuner
*vt
)
1020 struct rcar_drif_sdr
*sdr
= video_drvdata(file
);
1022 return v4l2_subdev_call(sdr
->ep
.subdev
, tuner
, s_tuner
, vt
);
1025 static const struct v4l2_ioctl_ops rcar_drif_ioctl_ops
= {
1026 .vidioc_querycap
= rcar_drif_querycap
,
1028 .vidioc_enum_fmt_sdr_cap
= rcar_drif_enum_fmt_sdr_cap
,
1029 .vidioc_g_fmt_sdr_cap
= rcar_drif_g_fmt_sdr_cap
,
1030 .vidioc_s_fmt_sdr_cap
= rcar_drif_s_fmt_sdr_cap
,
1031 .vidioc_try_fmt_sdr_cap
= rcar_drif_try_fmt_sdr_cap
,
1033 .vidioc_reqbufs
= vb2_ioctl_reqbufs
,
1034 .vidioc_create_bufs
= vb2_ioctl_create_bufs
,
1035 .vidioc_prepare_buf
= vb2_ioctl_prepare_buf
,
1036 .vidioc_querybuf
= vb2_ioctl_querybuf
,
1037 .vidioc_qbuf
= vb2_ioctl_qbuf
,
1038 .vidioc_dqbuf
= vb2_ioctl_dqbuf
,
1040 .vidioc_streamon
= vb2_ioctl_streamon
,
1041 .vidioc_streamoff
= vb2_ioctl_streamoff
,
1043 .vidioc_s_frequency
= rcar_drif_s_frequency
,
1044 .vidioc_g_frequency
= rcar_drif_g_frequency
,
1045 .vidioc_s_tuner
= rcar_drif_s_tuner
,
1046 .vidioc_g_tuner
= rcar_drif_g_tuner
,
1047 .vidioc_enum_freq_bands
= rcar_drif_enum_freq_bands
,
1048 .vidioc_subscribe_event
= v4l2_ctrl_subscribe_event
,
1049 .vidioc_unsubscribe_event
= v4l2_event_unsubscribe
,
1050 .vidioc_log_status
= v4l2_ctrl_log_status
,
1053 static const struct v4l2_file_operations rcar_drif_fops
= {
1054 .owner
= THIS_MODULE
,
1055 .open
= v4l2_fh_open
,
1056 .release
= vb2_fop_release
,
1057 .read
= vb2_fop_read
,
1058 .poll
= vb2_fop_poll
,
1059 .mmap
= vb2_fop_mmap
,
1060 .unlocked_ioctl
= video_ioctl2
,
1063 static int rcar_drif_sdr_register(struct rcar_drif_sdr
*sdr
)
1067 /* Init video_device structure */
1068 sdr
->vdev
= video_device_alloc();
1072 snprintf(sdr
->vdev
->name
, sizeof(sdr
->vdev
->name
), "R-Car DRIF");
1073 sdr
->vdev
->fops
= &rcar_drif_fops
;
1074 sdr
->vdev
->ioctl_ops
= &rcar_drif_ioctl_ops
;
1075 sdr
->vdev
->release
= video_device_release
;
1076 sdr
->vdev
->lock
= &sdr
->v4l2_mutex
;
1077 sdr
->vdev
->queue
= &sdr
->vb_queue
;
1078 sdr
->vdev
->queue
->lock
= &sdr
->vb_queue_mutex
;
1079 sdr
->vdev
->ctrl_handler
= &sdr
->ctrl_hdl
;
1080 sdr
->vdev
->v4l2_dev
= &sdr
->v4l2_dev
;
1081 sdr
->vdev
->device_caps
= V4L2_CAP_SDR_CAPTURE
| V4L2_CAP_TUNER
|
1082 V4L2_CAP_STREAMING
| V4L2_CAP_READWRITE
;
1083 video_set_drvdata(sdr
->vdev
, sdr
);
1085 /* Register V4L2 SDR device */
1086 ret
= video_register_device(sdr
->vdev
, VFL_TYPE_SDR
, -1);
1088 video_device_release(sdr
->vdev
);
1090 dev_err(sdr
->dev
, "failed video_register_device (%d)\n", ret
);
1096 static void rcar_drif_sdr_unregister(struct rcar_drif_sdr
*sdr
)
1098 video_unregister_device(sdr
->vdev
);
1102 /* Sub-device bound callback */
1103 static int rcar_drif_notify_bound(struct v4l2_async_notifier
*notifier
,
1104 struct v4l2_subdev
*subdev
,
1105 struct v4l2_async_subdev
*asd
)
1107 struct rcar_drif_sdr
*sdr
=
1108 container_of(notifier
, struct rcar_drif_sdr
, notifier
);
1110 if (sdr
->ep
.asd
.match
.fwnode
!=
1111 of_fwnode_handle(subdev
->dev
->of_node
)) {
1112 rdrif_err(sdr
, "subdev %s cannot bind\n", subdev
->name
);
1116 v4l2_set_subdev_hostdata(subdev
, sdr
);
1117 sdr
->ep
.subdev
= subdev
;
1118 rdrif_dbg(sdr
, "bound asd %s\n", subdev
->name
);
1123 /* Sub-device unbind callback */
1124 static void rcar_drif_notify_unbind(struct v4l2_async_notifier
*notifier
,
1125 struct v4l2_subdev
*subdev
,
1126 struct v4l2_async_subdev
*asd
)
1128 struct rcar_drif_sdr
*sdr
=
1129 container_of(notifier
, struct rcar_drif_sdr
, notifier
);
1131 if (sdr
->ep
.subdev
!= subdev
) {
1132 rdrif_err(sdr
, "subdev %s is not bound\n", subdev
->name
);
1136 /* Free ctrl handler if initialized */
1137 v4l2_ctrl_handler_free(&sdr
->ctrl_hdl
);
1138 sdr
->v4l2_dev
.ctrl_handler
= NULL
;
1139 sdr
->ep
.subdev
= NULL
;
1141 rcar_drif_sdr_unregister(sdr
);
1142 rdrif_dbg(sdr
, "unbind asd %s\n", subdev
->name
);
1145 /* Sub-device registered notification callback */
1146 static int rcar_drif_notify_complete(struct v4l2_async_notifier
*notifier
)
1148 struct rcar_drif_sdr
*sdr
=
1149 container_of(notifier
, struct rcar_drif_sdr
, notifier
);
1153 * The subdev tested at this point uses 4 controls. Using 10 as a worst
1154 * case scenario hint. When less controls are needed there will be some
1155 * unused memory and when more controls are needed the framework uses
1156 * hash to manage controls within this number.
1158 ret
= v4l2_ctrl_handler_init(&sdr
->ctrl_hdl
, 10);
1162 sdr
->v4l2_dev
.ctrl_handler
= &sdr
->ctrl_hdl
;
1163 ret
= v4l2_device_register_subdev_nodes(&sdr
->v4l2_dev
);
1165 rdrif_err(sdr
, "failed: register subdev nodes ret %d\n", ret
);
1169 ret
= v4l2_ctrl_add_handler(&sdr
->ctrl_hdl
,
1170 sdr
->ep
.subdev
->ctrl_handler
, NULL
);
1172 rdrif_err(sdr
, "failed: ctrl add hdlr ret %d\n", ret
);
1176 ret
= rcar_drif_sdr_register(sdr
);
1183 v4l2_ctrl_handler_free(&sdr
->ctrl_hdl
);
1188 static const struct v4l2_async_notifier_operations rcar_drif_notify_ops
= {
1189 .bound
= rcar_drif_notify_bound
,
1190 .unbind
= rcar_drif_notify_unbind
,
1191 .complete
= rcar_drif_notify_complete
,
1194 /* Read endpoint properties */
1195 static void rcar_drif_get_ep_properties(struct rcar_drif_sdr
*sdr
,
1196 struct fwnode_handle
*fwnode
)
1200 /* Set the I2S defaults for SIRMDR1*/
1201 sdr
->mdr1
= RCAR_DRIF_SIRMDR1_SYNCMD_LR
| RCAR_DRIF_SIRMDR1_MSB_FIRST
|
1202 RCAR_DRIF_SIRMDR1_DTDL_1
| RCAR_DRIF_SIRMDR1_SYNCDL_0
;
1204 /* Parse sync polarity from endpoint */
1205 if (!fwnode_property_read_u32(fwnode
, "sync-active", &val
))
1206 sdr
->mdr1
|= val
? RCAR_DRIF_SIRMDR1_SYNCAC_POL_HIGH
:
1207 RCAR_DRIF_SIRMDR1_SYNCAC_POL_LOW
;
1209 sdr
->mdr1
|= RCAR_DRIF_SIRMDR1_SYNCAC_POL_HIGH
; /* default */
1211 dev_dbg(sdr
->dev
, "mdr1 0x%08x\n", sdr
->mdr1
);
1214 /* Parse sub-devs (tuner) to find a matching device */
1215 static int rcar_drif_parse_subdevs(struct rcar_drif_sdr
*sdr
)
1217 struct v4l2_async_notifier
*notifier
= &sdr
->notifier
;
1218 struct fwnode_handle
*fwnode
, *ep
;
1220 notifier
->subdevs
= devm_kzalloc(sdr
->dev
, sizeof(*notifier
->subdevs
),
1222 if (!notifier
->subdevs
)
1225 ep
= fwnode_graph_get_next_endpoint(of_fwnode_handle(sdr
->dev
->of_node
),
1230 notifier
->subdevs
[notifier
->num_subdevs
] = &sdr
->ep
.asd
;
1231 fwnode
= fwnode_graph_get_remote_port_parent(ep
);
1233 dev_warn(sdr
->dev
, "bad remote port parent\n");
1234 fwnode_handle_put(ep
);
1238 sdr
->ep
.asd
.match
.fwnode
= fwnode
;
1239 sdr
->ep
.asd
.match_type
= V4L2_ASYNC_MATCH_FWNODE
;
1240 notifier
->num_subdevs
++;
1242 /* Get the endpoint properties */
1243 rcar_drif_get_ep_properties(sdr
, ep
);
1245 fwnode_handle_put(fwnode
);
1246 fwnode_handle_put(ep
);
1251 /* Check if the given device is the primary bond */
1252 static bool rcar_drif_primary_bond(struct platform_device
*pdev
)
1254 return of_property_read_bool(pdev
->dev
.of_node
, "renesas,primary-bond");
1257 /* Check if both devices of the bond are enabled */
1258 static struct device_node
*rcar_drif_bond_enabled(struct platform_device
*p
)
1260 struct device_node
*np
;
1262 np
= of_parse_phandle(p
->dev
.of_node
, "renesas,bonding", 0);
1263 if (np
&& of_device_is_available(np
))
1269 /* Check if the bonded device is probed */
1270 static int rcar_drif_bond_available(struct rcar_drif_sdr
*sdr
,
1271 struct device_node
*np
)
1273 struct platform_device
*pdev
;
1274 struct rcar_drif
*ch
;
1277 pdev
= of_find_device_by_node(np
);
1279 dev_err(sdr
->dev
, "failed to get bonded device from node\n");
1283 device_lock(&pdev
->dev
);
1284 ch
= platform_get_drvdata(pdev
);
1286 /* Update sdr data in the bonded device */
1289 /* Update sdr with bonded device data */
1290 sdr
->ch
[ch
->num
] = ch
;
1291 sdr
->hw_ch_mask
|= BIT(ch
->num
);
1294 dev_info(sdr
->dev
, "defer probe\n");
1295 ret
= -EPROBE_DEFER
;
1297 device_unlock(&pdev
->dev
);
1299 put_device(&pdev
->dev
);
1304 /* V4L2 SDR device probe */
1305 static int rcar_drif_sdr_probe(struct rcar_drif_sdr
*sdr
)
1309 /* Validate any supported format for enabled channels */
1310 ret
= rcar_drif_set_default_format(sdr
);
1312 dev_err(sdr
->dev
, "failed to set default format\n");
1317 sdr
->hwbuf_size
= RCAR_DRIF_DEFAULT_HWBUF_SIZE
;
1319 mutex_init(&sdr
->v4l2_mutex
);
1320 mutex_init(&sdr
->vb_queue_mutex
);
1321 spin_lock_init(&sdr
->queued_bufs_lock
);
1322 spin_lock_init(&sdr
->dma_lock
);
1323 INIT_LIST_HEAD(&sdr
->queued_bufs
);
1325 /* Init videobuf2 queue structure */
1326 sdr
->vb_queue
.type
= V4L2_BUF_TYPE_SDR_CAPTURE
;
1327 sdr
->vb_queue
.io_modes
= VB2_READ
| VB2_MMAP
| VB2_DMABUF
;
1328 sdr
->vb_queue
.drv_priv
= sdr
;
1329 sdr
->vb_queue
.buf_struct_size
= sizeof(struct rcar_drif_frame_buf
);
1330 sdr
->vb_queue
.ops
= &rcar_drif_vb2_ops
;
1331 sdr
->vb_queue
.mem_ops
= &vb2_vmalloc_memops
;
1332 sdr
->vb_queue
.timestamp_flags
= V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC
;
1334 /* Init videobuf2 queue */
1335 ret
= vb2_queue_init(&sdr
->vb_queue
);
1337 dev_err(sdr
->dev
, "failed: vb2_queue_init ret %d\n", ret
);
1341 /* Register the v4l2_device */
1342 ret
= v4l2_device_register(sdr
->dev
, &sdr
->v4l2_dev
);
1344 dev_err(sdr
->dev
, "failed: v4l2_device_register ret %d\n", ret
);
1349 * Parse subdevs after v4l2_device_register because if the subdev
1350 * is already probed, bound and complete will be called immediately
1352 ret
= rcar_drif_parse_subdevs(sdr
);
1356 sdr
->notifier
.ops
= &rcar_drif_notify_ops
;
1358 /* Register notifier */
1359 ret
= v4l2_async_notifier_register(&sdr
->v4l2_dev
, &sdr
->notifier
);
1361 dev_err(sdr
->dev
, "failed: notifier register ret %d\n", ret
);
1368 v4l2_device_unregister(&sdr
->v4l2_dev
);
1373 /* V4L2 SDR device remove */
1374 static void rcar_drif_sdr_remove(struct rcar_drif_sdr
*sdr
)
1376 v4l2_async_notifier_unregister(&sdr
->notifier
);
1377 v4l2_device_unregister(&sdr
->v4l2_dev
);
1380 /* DRIF channel probe */
1381 static int rcar_drif_probe(struct platform_device
*pdev
)
1383 struct rcar_drif_sdr
*sdr
;
1384 struct device_node
*np
;
1385 struct rcar_drif
*ch
;
1386 struct resource
*res
;
1389 /* Reserve memory for enabled channel */
1390 ch
= devm_kzalloc(&pdev
->dev
, sizeof(*ch
), GFP_KERNEL
);
1397 ch
->clk
= devm_clk_get(&pdev
->dev
, "fck");
1398 if (IS_ERR(ch
->clk
)) {
1399 ret
= PTR_ERR(ch
->clk
);
1400 dev_err(&pdev
->dev
, "clk get failed (%d)\n", ret
);
1405 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1406 ch
->base
= devm_ioremap_resource(&pdev
->dev
, res
);
1407 if (IS_ERR(ch
->base
)) {
1408 ret
= PTR_ERR(ch
->base
);
1409 dev_err(&pdev
->dev
, "ioremap failed (%d)\n", ret
);
1412 ch
->start
= res
->start
;
1413 platform_set_drvdata(pdev
, ch
);
1415 /* Check if both channels of the bond are enabled */
1416 np
= rcar_drif_bond_enabled(pdev
);
1418 /* Check if current channel acting as primary-bond */
1419 if (!rcar_drif_primary_bond(pdev
)) {
1420 ch
->num
= 1; /* Primary bond is channel 0 always */
1426 /* Reserve memory for SDR structure */
1427 sdr
= devm_kzalloc(&pdev
->dev
, sizeof(*sdr
), GFP_KERNEL
);
1433 sdr
->dev
= &pdev
->dev
;
1435 /* Establish links between SDR and channel(s) */
1436 sdr
->ch
[ch
->num
] = ch
;
1437 sdr
->hw_ch_mask
= BIT(ch
->num
);
1439 /* Check if bonded device is ready */
1440 ret
= rcar_drif_bond_available(sdr
, np
);
1445 sdr
->num_hw_ch
= hweight_long(sdr
->hw_ch_mask
);
1447 return rcar_drif_sdr_probe(sdr
);
1450 /* DRIF channel remove */
1451 static int rcar_drif_remove(struct platform_device
*pdev
)
1453 struct rcar_drif
*ch
= platform_get_drvdata(pdev
);
1454 struct rcar_drif_sdr
*sdr
= ch
->sdr
;
1456 /* Channel 0 will be the SDR instance */
1461 rcar_drif_sdr_remove(sdr
);
1466 /* FIXME: Implement suspend/resume support */
1467 static int __maybe_unused
rcar_drif_suspend(struct device
*dev
)
1472 static int __maybe_unused
rcar_drif_resume(struct device
*dev
)
1477 static SIMPLE_DEV_PM_OPS(rcar_drif_pm_ops
, rcar_drif_suspend
,
1480 static const struct of_device_id rcar_drif_of_table
[] = {
1481 { .compatible
= "renesas,rcar-gen3-drif" },
1484 MODULE_DEVICE_TABLE(of
, rcar_drif_of_table
);
1486 #define RCAR_DRIF_DRV_NAME "rcar_drif"
1487 static struct platform_driver rcar_drif_driver
= {
1489 .name
= RCAR_DRIF_DRV_NAME
,
1490 .of_match_table
= of_match_ptr(rcar_drif_of_table
),
1491 .pm
= &rcar_drif_pm_ops
,
1493 .probe
= rcar_drif_probe
,
1494 .remove
= rcar_drif_remove
,
1497 module_platform_driver(rcar_drif_driver
);
1499 MODULE_DESCRIPTION("Renesas R-Car Gen3 DRIF driver");
1500 MODULE_ALIAS("platform:" RCAR_DRIF_DRV_NAME
);
1501 MODULE_LICENSE("GPL v2");
1502 MODULE_AUTHOR("Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>");