2 * vsp1_bru.c -- R-Car VSP1 Blend ROP Unit
4 * Copyright (C) 2013 Renesas Corporation
6 * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
14 #include <linux/device.h>
15 #include <linux/gfp.h>
17 #include <media/v4l2-subdev.h>
22 #include "vsp1_pipe.h"
23 #include "vsp1_rwpf.h"
24 #include "vsp1_video.h"
26 #define BRU_MIN_SIZE 1U
27 #define BRU_MAX_SIZE 8190U
29 /* -----------------------------------------------------------------------------
33 static inline void vsp1_bru_write(struct vsp1_bru
*bru
, struct vsp1_dl_list
*dl
,
36 vsp1_dl_list_write(dl
, bru
->base
+ reg
, data
);
39 /* -----------------------------------------------------------------------------
43 static int bru_s_ctrl(struct v4l2_ctrl
*ctrl
)
45 struct vsp1_bru
*bru
=
46 container_of(ctrl
->handler
, struct vsp1_bru
, ctrls
);
49 case V4L2_CID_BG_COLOR
:
50 bru
->bgcolor
= ctrl
->val
;
57 static const struct v4l2_ctrl_ops bru_ctrl_ops
= {
61 /* -----------------------------------------------------------------------------
62 * V4L2 Subdevice Operations
66 * The BRU can't perform format conversion, all sink and source formats must be
67 * identical. We pick the format on the first sink pad (pad 0) and propagate it
71 static int bru_enum_mbus_code(struct v4l2_subdev
*subdev
,
72 struct v4l2_subdev_pad_config
*cfg
,
73 struct v4l2_subdev_mbus_code_enum
*code
)
75 static const unsigned int codes
[] = {
76 MEDIA_BUS_FMT_ARGB8888_1X32
,
77 MEDIA_BUS_FMT_AYUV8_1X32
,
80 return vsp1_subdev_enum_mbus_code(subdev
, cfg
, code
, codes
,
84 static int bru_enum_frame_size(struct v4l2_subdev
*subdev
,
85 struct v4l2_subdev_pad_config
*cfg
,
86 struct v4l2_subdev_frame_size_enum
*fse
)
91 if (fse
->code
!= MEDIA_BUS_FMT_ARGB8888_1X32
&&
92 fse
->code
!= MEDIA_BUS_FMT_AYUV8_1X32
)
95 fse
->min_width
= BRU_MIN_SIZE
;
96 fse
->max_width
= BRU_MAX_SIZE
;
97 fse
->min_height
= BRU_MIN_SIZE
;
98 fse
->max_height
= BRU_MAX_SIZE
;
103 static struct v4l2_rect
*bru_get_compose(struct vsp1_bru
*bru
,
104 struct v4l2_subdev_pad_config
*cfg
,
107 return v4l2_subdev_get_try_compose(&bru
->entity
.subdev
, cfg
, pad
);
110 static void bru_try_format(struct vsp1_bru
*bru
,
111 struct v4l2_subdev_pad_config
*config
,
112 unsigned int pad
, struct v4l2_mbus_framefmt
*fmt
)
114 struct v4l2_mbus_framefmt
*format
;
117 case BRU_PAD_SINK(0):
118 /* Default to YUV if the requested format is not supported. */
119 if (fmt
->code
!= MEDIA_BUS_FMT_ARGB8888_1X32
&&
120 fmt
->code
!= MEDIA_BUS_FMT_AYUV8_1X32
)
121 fmt
->code
= MEDIA_BUS_FMT_AYUV8_1X32
;
125 /* The BRU can't perform format conversion. */
126 format
= vsp1_entity_get_pad_format(&bru
->entity
, config
,
128 fmt
->code
= format
->code
;
132 fmt
->width
= clamp(fmt
->width
, BRU_MIN_SIZE
, BRU_MAX_SIZE
);
133 fmt
->height
= clamp(fmt
->height
, BRU_MIN_SIZE
, BRU_MAX_SIZE
);
134 fmt
->field
= V4L2_FIELD_NONE
;
135 fmt
->colorspace
= V4L2_COLORSPACE_SRGB
;
138 static int bru_set_format(struct v4l2_subdev
*subdev
,
139 struct v4l2_subdev_pad_config
*cfg
,
140 struct v4l2_subdev_format
*fmt
)
142 struct vsp1_bru
*bru
= to_bru(subdev
);
143 struct v4l2_subdev_pad_config
*config
;
144 struct v4l2_mbus_framefmt
*format
;
147 mutex_lock(&bru
->entity
.lock
);
149 config
= vsp1_entity_get_pad_config(&bru
->entity
, cfg
, fmt
->which
);
155 bru_try_format(bru
, config
, fmt
->pad
, &fmt
->format
);
157 format
= vsp1_entity_get_pad_format(&bru
->entity
, config
, fmt
->pad
);
158 *format
= fmt
->format
;
160 /* Reset the compose rectangle */
161 if (fmt
->pad
!= bru
->entity
.source_pad
) {
162 struct v4l2_rect
*compose
;
164 compose
= bru_get_compose(bru
, config
, fmt
->pad
);
167 compose
->width
= format
->width
;
168 compose
->height
= format
->height
;
171 /* Propagate the format code to all pads */
172 if (fmt
->pad
== BRU_PAD_SINK(0)) {
175 for (i
= 0; i
<= bru
->entity
.source_pad
; ++i
) {
176 format
= vsp1_entity_get_pad_format(&bru
->entity
,
178 format
->code
= fmt
->format
.code
;
183 mutex_unlock(&bru
->entity
.lock
);
187 static int bru_get_selection(struct v4l2_subdev
*subdev
,
188 struct v4l2_subdev_pad_config
*cfg
,
189 struct v4l2_subdev_selection
*sel
)
191 struct vsp1_bru
*bru
= to_bru(subdev
);
192 struct v4l2_subdev_pad_config
*config
;
194 if (sel
->pad
== bru
->entity
.source_pad
)
197 switch (sel
->target
) {
198 case V4L2_SEL_TGT_COMPOSE_BOUNDS
:
201 sel
->r
.width
= BRU_MAX_SIZE
;
202 sel
->r
.height
= BRU_MAX_SIZE
;
205 case V4L2_SEL_TGT_COMPOSE
:
206 config
= vsp1_entity_get_pad_config(&bru
->entity
, cfg
,
211 mutex_lock(&bru
->entity
.lock
);
212 sel
->r
= *bru_get_compose(bru
, config
, sel
->pad
);
213 mutex_unlock(&bru
->entity
.lock
);
221 static int bru_set_selection(struct v4l2_subdev
*subdev
,
222 struct v4l2_subdev_pad_config
*cfg
,
223 struct v4l2_subdev_selection
*sel
)
225 struct vsp1_bru
*bru
= to_bru(subdev
);
226 struct v4l2_subdev_pad_config
*config
;
227 struct v4l2_mbus_framefmt
*format
;
228 struct v4l2_rect
*compose
;
231 if (sel
->pad
== bru
->entity
.source_pad
)
234 if (sel
->target
!= V4L2_SEL_TGT_COMPOSE
)
237 mutex_lock(&bru
->entity
.lock
);
239 config
= vsp1_entity_get_pad_config(&bru
->entity
, cfg
, sel
->which
);
246 * The compose rectangle top left corner must be inside the output
249 format
= vsp1_entity_get_pad_format(&bru
->entity
, config
,
250 bru
->entity
.source_pad
);
251 sel
->r
.left
= clamp_t(unsigned int, sel
->r
.left
, 0, format
->width
- 1);
252 sel
->r
.top
= clamp_t(unsigned int, sel
->r
.top
, 0, format
->height
- 1);
255 * Scaling isn't supported, the compose rectangle size must be identical
256 * to the sink format size.
258 format
= vsp1_entity_get_pad_format(&bru
->entity
, config
, sel
->pad
);
259 sel
->r
.width
= format
->width
;
260 sel
->r
.height
= format
->height
;
262 compose
= bru_get_compose(bru
, config
, sel
->pad
);
266 mutex_unlock(&bru
->entity
.lock
);
270 static const struct v4l2_subdev_pad_ops bru_pad_ops
= {
271 .init_cfg
= vsp1_entity_init_cfg
,
272 .enum_mbus_code
= bru_enum_mbus_code
,
273 .enum_frame_size
= bru_enum_frame_size
,
274 .get_fmt
= vsp1_subdev_get_pad_format
,
275 .set_fmt
= bru_set_format
,
276 .get_selection
= bru_get_selection
,
277 .set_selection
= bru_set_selection
,
280 static const struct v4l2_subdev_ops bru_ops
= {
284 /* -----------------------------------------------------------------------------
285 * VSP1 Entity Operations
288 static void bru_configure(struct vsp1_entity
*entity
,
289 struct vsp1_pipeline
*pipe
,
290 struct vsp1_dl_list
*dl
,
291 enum vsp1_entity_params params
)
293 struct vsp1_bru
*bru
= to_bru(&entity
->subdev
);
294 struct v4l2_mbus_framefmt
*format
;
298 if (params
!= VSP1_ENTITY_PARAMS_INIT
)
301 format
= vsp1_entity_get_pad_format(&bru
->entity
, bru
->entity
.config
,
302 bru
->entity
.source_pad
);
305 * The hardware is extremely flexible but we have no userspace API to
306 * expose all the parameters, nor is it clear whether we would have use
307 * cases for all the supported modes. Let's just harcode the parameters
308 * to sane default values for now.
312 * Disable dithering and enable color data normalization unless the
313 * format at the pipeline output is premultiplied.
315 flags
= pipe
->output
? pipe
->output
->format
.flags
: 0;
316 vsp1_bru_write(bru
, dl
, VI6_BRU_INCTRL
,
317 flags
& V4L2_PIX_FMT_FLAG_PREMUL_ALPHA
?
318 0 : VI6_BRU_INCTRL_NRM
);
321 * Set the background position to cover the whole output image and
322 * configure its color.
324 vsp1_bru_write(bru
, dl
, VI6_BRU_VIRRPF_SIZE
,
325 (format
->width
<< VI6_BRU_VIRRPF_SIZE_HSIZE_SHIFT
) |
326 (format
->height
<< VI6_BRU_VIRRPF_SIZE_VSIZE_SHIFT
));
327 vsp1_bru_write(bru
, dl
, VI6_BRU_VIRRPF_LOC
, 0);
329 vsp1_bru_write(bru
, dl
, VI6_BRU_VIRRPF_COL
, bru
->bgcolor
|
330 (0xff << VI6_BRU_VIRRPF_COL_A_SHIFT
));
333 * Route BRU input 1 as SRC input to the ROP unit and configure the ROP
334 * unit with a NOP operation to make BRU input 1 available as the
335 * Blend/ROP unit B SRC input. Only needed for BRU, the BRS has no ROP
338 if (entity
->type
== VSP1_ENTITY_BRU
)
339 vsp1_bru_write(bru
, dl
, VI6_BRU_ROP
,
340 VI6_BRU_ROP_DSTSEL_BRUIN(1) |
341 VI6_BRU_ROP_CROP(VI6_ROP_NOP
) |
342 VI6_BRU_ROP_AROP(VI6_ROP_NOP
));
344 for (i
= 0; i
< bru
->entity
.source_pad
; ++i
) {
345 bool premultiplied
= false;
349 * Configure all Blend/ROP units corresponding to an enabled BRU
350 * input for alpha blending. Blend/ROP units corresponding to
351 * disabled BRU inputs are used in ROP NOP mode to ignore the
354 if (bru
->inputs
[i
].rpf
) {
355 ctrl
|= VI6_BRU_CTRL_RBC
;
357 premultiplied
= bru
->inputs
[i
].rpf
->format
.flags
358 & V4L2_PIX_FMT_FLAG_PREMUL_ALPHA
;
360 ctrl
|= VI6_BRU_CTRL_CROP(VI6_ROP_NOP
)
361 | VI6_BRU_CTRL_AROP(VI6_ROP_NOP
);
365 * Select the virtual RPF as the Blend/ROP unit A DST input to
366 * serve as a background color.
369 ctrl
|= VI6_BRU_CTRL_DSTSEL_VRPF
;
372 * Route inputs 0 to 3 as SRC inputs to Blend/ROP units A to D
373 * in that order. In the BRU the Blend/ROP unit B SRC is
374 * hardwired to the ROP unit output, the corresponding register
375 * bits must be set to 0. The BRS has no ROP unit and doesn't
376 * need any special processing.
378 if (!(entity
->type
== VSP1_ENTITY_BRU
&& i
== 1))
379 ctrl
|= VI6_BRU_CTRL_SRCSEL_BRUIN(i
);
381 vsp1_bru_write(bru
, dl
, VI6_BRU_CTRL(i
), ctrl
);
384 * Harcode the blending formula to
386 * DSTc = DSTc * (1 - SRCa) + SRCc * SRCa
387 * DSTa = DSTa * (1 - SRCa) + SRCa
389 * when the SRC input isn't premultiplied, and to
391 * DSTc = DSTc * (1 - SRCa) + SRCc
392 * DSTa = DSTa * (1 - SRCa) + SRCa
396 vsp1_bru_write(bru
, dl
, VI6_BRU_BLD(i
),
397 VI6_BRU_BLD_CCMDX_255_SRC_A
|
398 (premultiplied
? VI6_BRU_BLD_CCMDY_COEFY
:
399 VI6_BRU_BLD_CCMDY_SRC_A
) |
400 VI6_BRU_BLD_ACMDX_255_SRC_A
|
401 VI6_BRU_BLD_ACMDY_COEFY
|
402 (0xff << VI6_BRU_BLD_COEFY_SHIFT
));
406 static const struct vsp1_entity_operations bru_entity_ops
= {
407 .configure
= bru_configure
,
410 /* -----------------------------------------------------------------------------
411 * Initialization and Cleanup
414 struct vsp1_bru
*vsp1_bru_create(struct vsp1_device
*vsp1
,
415 enum vsp1_entity_type type
)
417 struct vsp1_bru
*bru
;
418 unsigned int num_pads
;
422 bru
= devm_kzalloc(vsp1
->dev
, sizeof(*bru
), GFP_KERNEL
);
424 return ERR_PTR(-ENOMEM
);
426 bru
->base
= type
== VSP1_ENTITY_BRU
? VI6_BRU_BASE
: VI6_BRS_BASE
;
427 bru
->entity
.ops
= &bru_entity_ops
;
428 bru
->entity
.type
= type
;
430 if (type
== VSP1_ENTITY_BRU
) {
431 num_pads
= vsp1
->info
->num_bru_inputs
+ 1;
438 ret
= vsp1_entity_init(vsp1
, &bru
->entity
, name
, num_pads
, &bru_ops
,
439 MEDIA_ENT_F_PROC_VIDEO_COMPOSER
);
443 /* Initialize the control handler. */
444 v4l2_ctrl_handler_init(&bru
->ctrls
, 1);
445 v4l2_ctrl_new_std(&bru
->ctrls
, &bru_ctrl_ops
, V4L2_CID_BG_COLOR
,
450 bru
->entity
.subdev
.ctrl_handler
= &bru
->ctrls
;
452 if (bru
->ctrls
.error
) {
453 dev_err(vsp1
->dev
, "%s: failed to initialize controls\n", name
);
454 ret
= bru
->ctrls
.error
;
455 vsp1_entity_destroy(&bru
->entity
);