Linux 4.16.11
[linux/fpc-iii.git] / drivers / mfd / t7l66xb.c
blob43d8683266de298aea8bbdb0388a9fba10a2c1cd
1 /*
3 * Toshiba T7L66XB core mfd support
5 * Copyright (c) 2005, 2007, 2008 Ian Molton
6 * Copyright (c) 2008 Dmitry Baryshkov
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * T7L66 features:
14 * Supported in this driver:
15 * SD/MMC
16 * SM/NAND flash controller
18 * As yet not supported
19 * GPIO interface (on NAND pins)
20 * Serial interface
21 * TFT 'interface converter'
22 * PCMCIA interface logic
25 #include <linux/kernel.h>
26 #include <linux/module.h>
27 #include <linux/err.h>
28 #include <linux/io.h>
29 #include <linux/slab.h>
30 #include <linux/irq.h>
31 #include <linux/clk.h>
32 #include <linux/platform_device.h>
33 #include <linux/mfd/core.h>
34 #include <linux/mfd/tmio.h>
35 #include <linux/mfd/t7l66xb.h>
37 enum {
38 T7L66XB_CELL_NAND,
39 T7L66XB_CELL_MMC,
42 static const struct resource t7l66xb_mmc_resources[] = {
44 .start = 0x800,
45 .end = 0x9ff,
46 .flags = IORESOURCE_MEM,
49 .start = IRQ_T7L66XB_MMC,
50 .end = IRQ_T7L66XB_MMC,
51 .flags = IORESOURCE_IRQ,
55 #define SCR_REVID 0x08 /* b Revision ID */
56 #define SCR_IMR 0x42 /* b Interrupt Mask */
57 #define SCR_DEV_CTL 0xe0 /* b Device control */
58 #define SCR_ISR 0xe1 /* b Interrupt Status */
59 #define SCR_GPO_OC 0xf0 /* b GPO output control */
60 #define SCR_GPO_OS 0xf1 /* b GPO output enable */
61 #define SCR_GPI_S 0xf2 /* w GPI status */
62 #define SCR_APDC 0xf8 /* b Active pullup down ctrl */
64 #define SCR_DEV_CTL_USB BIT(0) /* USB enable */
65 #define SCR_DEV_CTL_MMC BIT(1) /* MMC enable */
67 /*--------------------------------------------------------------------------*/
69 struct t7l66xb {
70 void __iomem *scr;
71 /* Lock to protect registers requiring read/modify/write ops. */
72 raw_spinlock_t lock;
74 struct resource rscr;
75 struct clk *clk48m;
76 struct clk *clk32k;
77 int irq;
78 int irq_base;
81 /*--------------------------------------------------------------------------*/
83 static int t7l66xb_mmc_enable(struct platform_device *mmc)
85 struct platform_device *dev = to_platform_device(mmc->dev.parent);
86 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
87 unsigned long flags;
88 u8 dev_ctl;
89 int ret;
91 ret = clk_prepare_enable(t7l66xb->clk32k);
92 if (ret)
93 return ret;
95 raw_spin_lock_irqsave(&t7l66xb->lock, flags);
97 dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL);
98 dev_ctl |= SCR_DEV_CTL_MMC;
99 tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL);
101 raw_spin_unlock_irqrestore(&t7l66xb->lock, flags);
103 tmio_core_mmc_enable(t7l66xb->scr + 0x200, 0,
104 t7l66xb_mmc_resources[0].start & 0xfffe);
106 return 0;
109 static int t7l66xb_mmc_disable(struct platform_device *mmc)
111 struct platform_device *dev = to_platform_device(mmc->dev.parent);
112 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
113 unsigned long flags;
114 u8 dev_ctl;
116 raw_spin_lock_irqsave(&t7l66xb->lock, flags);
118 dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL);
119 dev_ctl &= ~SCR_DEV_CTL_MMC;
120 tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL);
122 raw_spin_unlock_irqrestore(&t7l66xb->lock, flags);
124 clk_disable_unprepare(t7l66xb->clk32k);
126 return 0;
129 static void t7l66xb_mmc_pwr(struct platform_device *mmc, int state)
131 struct platform_device *dev = to_platform_device(mmc->dev.parent);
132 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
134 tmio_core_mmc_pwr(t7l66xb->scr + 0x200, 0, state);
137 static void t7l66xb_mmc_clk_div(struct platform_device *mmc, int state)
139 struct platform_device *dev = to_platform_device(mmc->dev.parent);
140 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
142 tmio_core_mmc_clk_div(t7l66xb->scr + 0x200, 0, state);
145 /*--------------------------------------------------------------------------*/
147 static struct tmio_mmc_data t7166xb_mmc_data = {
148 .hclk = 24000000,
149 .set_pwr = t7l66xb_mmc_pwr,
150 .set_clk_div = t7l66xb_mmc_clk_div,
153 static const struct resource t7l66xb_nand_resources[] = {
155 .start = 0xc00,
156 .end = 0xc07,
157 .flags = IORESOURCE_MEM,
160 .start = 0x0100,
161 .end = 0x01ff,
162 .flags = IORESOURCE_MEM,
165 .start = IRQ_T7L66XB_NAND,
166 .end = IRQ_T7L66XB_NAND,
167 .flags = IORESOURCE_IRQ,
171 static struct mfd_cell t7l66xb_cells[] = {
172 [T7L66XB_CELL_MMC] = {
173 .name = "tmio-mmc",
174 .enable = t7l66xb_mmc_enable,
175 .disable = t7l66xb_mmc_disable,
176 .platform_data = &t7166xb_mmc_data,
177 .pdata_size = sizeof(t7166xb_mmc_data),
178 .num_resources = ARRAY_SIZE(t7l66xb_mmc_resources),
179 .resources = t7l66xb_mmc_resources,
181 [T7L66XB_CELL_NAND] = {
182 .name = "tmio-nand",
183 .num_resources = ARRAY_SIZE(t7l66xb_nand_resources),
184 .resources = t7l66xb_nand_resources,
188 /*--------------------------------------------------------------------------*/
190 /* Handle the T7L66XB interrupt mux */
191 static void t7l66xb_irq(struct irq_desc *desc)
193 struct t7l66xb *t7l66xb = irq_desc_get_handler_data(desc);
194 unsigned int isr;
195 unsigned int i, irq_base;
197 irq_base = t7l66xb->irq_base;
199 while ((isr = tmio_ioread8(t7l66xb->scr + SCR_ISR) &
200 ~tmio_ioread8(t7l66xb->scr + SCR_IMR)))
201 for (i = 0; i < T7L66XB_NR_IRQS; i++)
202 if (isr & (1 << i))
203 generic_handle_irq(irq_base + i);
206 static void t7l66xb_irq_mask(struct irq_data *data)
208 struct t7l66xb *t7l66xb = irq_data_get_irq_chip_data(data);
209 unsigned long flags;
210 u8 imr;
212 raw_spin_lock_irqsave(&t7l66xb->lock, flags);
213 imr = tmio_ioread8(t7l66xb->scr + SCR_IMR);
214 imr |= 1 << (data->irq - t7l66xb->irq_base);
215 tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR);
216 raw_spin_unlock_irqrestore(&t7l66xb->lock, flags);
219 static void t7l66xb_irq_unmask(struct irq_data *data)
221 struct t7l66xb *t7l66xb = irq_data_get_irq_chip_data(data);
222 unsigned long flags;
223 u8 imr;
225 raw_spin_lock_irqsave(&t7l66xb->lock, flags);
226 imr = tmio_ioread8(t7l66xb->scr + SCR_IMR);
227 imr &= ~(1 << (data->irq - t7l66xb->irq_base));
228 tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR);
229 raw_spin_unlock_irqrestore(&t7l66xb->lock, flags);
232 static struct irq_chip t7l66xb_chip = {
233 .name = "t7l66xb",
234 .irq_ack = t7l66xb_irq_mask,
235 .irq_mask = t7l66xb_irq_mask,
236 .irq_unmask = t7l66xb_irq_unmask,
239 /*--------------------------------------------------------------------------*/
241 /* Install the IRQ handler */
242 static void t7l66xb_attach_irq(struct platform_device *dev)
244 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
245 unsigned int irq, irq_base;
247 irq_base = t7l66xb->irq_base;
249 for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) {
250 irq_set_chip_and_handler(irq, &t7l66xb_chip, handle_level_irq);
251 irq_set_chip_data(irq, t7l66xb);
254 irq_set_irq_type(t7l66xb->irq, IRQ_TYPE_EDGE_FALLING);
255 irq_set_chained_handler_and_data(t7l66xb->irq, t7l66xb_irq, t7l66xb);
258 static void t7l66xb_detach_irq(struct platform_device *dev)
260 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
261 unsigned int irq, irq_base;
263 irq_base = t7l66xb->irq_base;
265 irq_set_chained_handler_and_data(t7l66xb->irq, NULL, NULL);
267 for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) {
268 irq_set_chip(irq, NULL);
269 irq_set_chip_data(irq, NULL);
273 /*--------------------------------------------------------------------------*/
275 #ifdef CONFIG_PM
276 static int t7l66xb_suspend(struct platform_device *dev, pm_message_t state)
278 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
279 struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev);
281 if (pdata && pdata->suspend)
282 pdata->suspend(dev);
283 clk_disable_unprepare(t7l66xb->clk48m);
285 return 0;
288 static int t7l66xb_resume(struct platform_device *dev)
290 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
291 struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev);
292 int ret;
294 ret = clk_prepare_enable(t7l66xb->clk48m);
295 if (ret)
296 return ret;
298 if (pdata && pdata->resume)
299 pdata->resume(dev);
301 tmio_core_mmc_enable(t7l66xb->scr + 0x200, 0,
302 t7l66xb_mmc_resources[0].start & 0xfffe);
304 return 0;
306 #else
307 #define t7l66xb_suspend NULL
308 #define t7l66xb_resume NULL
309 #endif
311 /*--------------------------------------------------------------------------*/
313 static int t7l66xb_probe(struct platform_device *dev)
315 struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev);
316 struct t7l66xb *t7l66xb;
317 struct resource *iomem, *rscr;
318 int ret;
320 if (!pdata)
321 return -EINVAL;
323 iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
324 if (!iomem)
325 return -EINVAL;
327 t7l66xb = kzalloc(sizeof *t7l66xb, GFP_KERNEL);
328 if (!t7l66xb)
329 return -ENOMEM;
331 raw_spin_lock_init(&t7l66xb->lock);
333 platform_set_drvdata(dev, t7l66xb);
335 ret = platform_get_irq(dev, 0);
336 if (ret >= 0)
337 t7l66xb->irq = ret;
338 else
339 goto err_noirq;
341 t7l66xb->irq_base = pdata->irq_base;
343 t7l66xb->clk32k = clk_get(&dev->dev, "CLK_CK32K");
344 if (IS_ERR(t7l66xb->clk32k)) {
345 ret = PTR_ERR(t7l66xb->clk32k);
346 goto err_clk32k_get;
349 t7l66xb->clk48m = clk_get(&dev->dev, "CLK_CK48M");
350 if (IS_ERR(t7l66xb->clk48m)) {
351 ret = PTR_ERR(t7l66xb->clk48m);
352 goto err_clk48m_get;
355 rscr = &t7l66xb->rscr;
356 rscr->name = "t7l66xb-core";
357 rscr->start = iomem->start;
358 rscr->end = iomem->start + 0xff;
359 rscr->flags = IORESOURCE_MEM;
361 ret = request_resource(iomem, rscr);
362 if (ret)
363 goto err_request_scr;
365 t7l66xb->scr = ioremap(rscr->start, resource_size(rscr));
366 if (!t7l66xb->scr) {
367 ret = -ENOMEM;
368 goto err_ioremap;
371 ret = clk_prepare_enable(t7l66xb->clk48m);
372 if (ret)
373 goto err_clk_enable;
375 if (pdata->enable)
376 pdata->enable(dev);
378 /* Mask all interrupts */
379 tmio_iowrite8(0xbf, t7l66xb->scr + SCR_IMR);
381 printk(KERN_INFO "%s rev %d @ 0x%08lx, irq %d\n",
382 dev->name, tmio_ioread8(t7l66xb->scr + SCR_REVID),
383 (unsigned long)iomem->start, t7l66xb->irq);
385 t7l66xb_attach_irq(dev);
387 t7l66xb_cells[T7L66XB_CELL_NAND].platform_data = pdata->nand_data;
388 t7l66xb_cells[T7L66XB_CELL_NAND].pdata_size = sizeof(*pdata->nand_data);
390 ret = mfd_add_devices(&dev->dev, dev->id,
391 t7l66xb_cells, ARRAY_SIZE(t7l66xb_cells),
392 iomem, t7l66xb->irq_base, NULL);
394 if (!ret)
395 return 0;
397 t7l66xb_detach_irq(dev);
398 clk_disable_unprepare(t7l66xb->clk48m);
399 err_clk_enable:
400 iounmap(t7l66xb->scr);
401 err_ioremap:
402 release_resource(&t7l66xb->rscr);
403 err_request_scr:
404 clk_put(t7l66xb->clk48m);
405 err_clk48m_get:
406 clk_put(t7l66xb->clk32k);
407 err_clk32k_get:
408 err_noirq:
409 kfree(t7l66xb);
410 return ret;
413 static int t7l66xb_remove(struct platform_device *dev)
415 struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev);
416 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
417 int ret;
419 ret = pdata->disable(dev);
420 clk_disable_unprepare(t7l66xb->clk48m);
421 clk_put(t7l66xb->clk48m);
422 clk_disable_unprepare(t7l66xb->clk32k);
423 clk_put(t7l66xb->clk32k);
424 t7l66xb_detach_irq(dev);
425 iounmap(t7l66xb->scr);
426 release_resource(&t7l66xb->rscr);
427 mfd_remove_devices(&dev->dev);
428 kfree(t7l66xb);
430 return ret;
434 static struct platform_driver t7l66xb_platform_driver = {
435 .driver = {
436 .name = "t7l66xb",
438 .suspend = t7l66xb_suspend,
439 .resume = t7l66xb_resume,
440 .probe = t7l66xb_probe,
441 .remove = t7l66xb_remove,
444 /*--------------------------------------------------------------------------*/
446 module_platform_driver(t7l66xb_platform_driver);
448 MODULE_DESCRIPTION("Toshiba T7L66XB core driver");
449 MODULE_LICENSE("GPL v2");
450 MODULE_AUTHOR("Ian Molton");
451 MODULE_ALIAS("platform:t7l66xb");