drivers/net/dsa/mv88e6xxx/phy.c

   1 /*
   2  * Marvell 88e6xxx Ethernet switch PHY and PPU support
   3  *
   4  * Copyright (c) 2008 Marvell Semiconductor
   5  *
   6  * Copyright (c) 2017 Andrew Lunn <andrew@lunn.ch>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  */
  13
  14 #include <linux/mdio.h>
  15 #include <linux/module.h>
  16
  17 #include "chip.h"
  18 #include "phy.h"
  19
  20 int mv88e6165_phy_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
  21                        int addr, int reg, u16 *val)
  22 {
  23         return mv88e6xxx_read(chip, addr, reg, val);
  24 }
  25
  26 int mv88e6165_phy_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
  27                         int addr, int reg, u16 val)
  28 {
  29         return mv88e6xxx_write(chip, addr, reg, val);
  30 }
  31
  32 int mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy, int reg, u16 *val)
  33 {
  34         int addr = phy; /* PHY devices addresses start at 0x0 */
  35         struct mii_bus *bus;
  36
  37         bus = mv88e6xxx_default_mdio_bus(chip);
  38         if (!bus)
  39                 return -EOPNOTSUPP;
  40
  41         if (!chip->info->ops->phy_read)
  42                 return -EOPNOTSUPP;
  43
  44         return chip->info->ops->phy_read(chip, bus, addr, reg, val);
  45 }
  46
  47 int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy, int reg, u16 val)
  48 {
  49         int addr = phy; /* PHY devices addresses start at 0x0 */
  50         struct mii_bus *bus;
  51
  52         bus = mv88e6xxx_default_mdio_bus(chip);
  53         if (!bus)
  54                 return -EOPNOTSUPP;
  55
  56         if (!chip->info->ops->phy_write)
  57                 return -EOPNOTSUPP;
  58
  59         return chip->info->ops->phy_write(chip, bus, addr, reg, val);
  60 }
  61
  62 static int mv88e6xxx_phy_page_get(struct mv88e6xxx_chip *chip, int phy, u8 page)
  63 {
  64         return mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE, page);
  65 }
  66
  67 static void mv88e6xxx_phy_page_put(struct mv88e6xxx_chip *chip, int phy)
  68 {
  69         int err;
  70
  71         /* Restore PHY page Copper 0x0 for access via the registered
  72          * MDIO bus
  73          */
  74         err = mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE,
  75                                   MV88E6XXX_PHY_PAGE_COPPER);
  76         if (unlikely(err)) {
  77                 dev_err(chip->dev,
  78                         "failed to restore PHY %d page Copper (%d)\n",
  79                         phy, err);
  80         }
  81 }
  82
  83 int mv88e6xxx_phy_page_read(struct mv88e6xxx_chip *chip, int phy,
  84                             u8 page, int reg, u16 *val)
  85 {
  86         int err;
  87
  88         /* There is no paging for registers 22 */
  89         if (reg == MV88E6XXX_PHY_PAGE)
  90                 return -EINVAL;
  91
  92         err = mv88e6xxx_phy_page_get(chip, phy, page);
  93         if (!err) {
  94                 err = mv88e6xxx_phy_read(chip, phy, reg, val);
  95                 mv88e6xxx_phy_page_put(chip, phy);
  96         }
  97
  98         return err;
  99 }
 100
 101 int mv88e6xxx_phy_page_write(struct mv88e6xxx_chip *chip, int phy,
 102                              u8 page, int reg, u16 val)
 103 {
 104         int err;
 105
 106         /* There is no paging for registers 22 */
 107         if (reg == MV88E6XXX_PHY_PAGE)
 108                 return -EINVAL;
 109
 110         err = mv88e6xxx_phy_page_get(chip, phy, page);
 111         if (!err) {
 112                 err = mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE, page);
 113                 mv88e6xxx_phy_page_put(chip, phy);
 114         }
 115
 116         return err;
 117 }
 118
 119 static int mv88e6xxx_phy_ppu_disable(struct mv88e6xxx_chip *chip)
 120 {
 121         if (!chip->info->ops->ppu_disable)
 122                 return 0;
 123
 124         return chip->info->ops->ppu_disable(chip);
 125 }
 126
 127 static int mv88e6xxx_phy_ppu_enable(struct mv88e6xxx_chip *chip)
 128 {
 129         if (!chip->info->ops->ppu_enable)
 130                 return 0;
 131
 132         return chip->info->ops->ppu_enable(chip);
 133 }
 134
 135 static void mv88e6xxx_phy_ppu_reenable_work(struct work_struct *ugly)
 136 {
 137         struct mv88e6xxx_chip *chip;
 138
 139         chip = container_of(ugly, struct mv88e6xxx_chip, ppu_work);
 140
 141         mutex_lock(&chip->reg_lock);
 142
 143         if (mutex_trylock(&chip->ppu_mutex)) {
 144                 if (mv88e6xxx_phy_ppu_enable(chip) == 0)
 145                         chip->ppu_disabled = 0;
 146                 mutex_unlock(&chip->ppu_mutex);
 147         }
 148
 149         mutex_unlock(&chip->reg_lock);
 150 }
 151
 152 static void mv88e6xxx_phy_ppu_reenable_timer(struct timer_list *t)
 153 {
 154         struct mv88e6xxx_chip *chip = from_timer(chip, t, ppu_timer);
 155
 156         schedule_work(&chip->ppu_work);
 157 }
 158
 159 static int mv88e6xxx_phy_ppu_access_get(struct mv88e6xxx_chip *chip)
 160 {
 161         int ret;
 162
 163         mutex_lock(&chip->ppu_mutex);
 164
 165         /* If the PHY polling unit is enabled, disable it so that
 166          * we can access the PHY registers.  If it was already
 167          * disabled, cancel the timer that is going to re-enable
 168          * it.
 169          */
 170         if (!chip->ppu_disabled) {
 171                 ret = mv88e6xxx_phy_ppu_disable(chip);
 172                 if (ret < 0) {
 173                         mutex_unlock(&chip->ppu_mutex);
 174                         return ret;
 175                 }
 176                 chip->ppu_disabled = 1;
 177         } else {
 178                 del_timer(&chip->ppu_timer);
 179                 ret = 0;
 180         }
 181
 182         return ret;
 183 }
 184
 185 static void mv88e6xxx_phy_ppu_access_put(struct mv88e6xxx_chip *chip)
 186 {
 187         /* Schedule a timer to re-enable the PHY polling unit. */
 188         mod_timer(&chip->ppu_timer, jiffies + msecs_to_jiffies(10));
 189         mutex_unlock(&chip->ppu_mutex);
 190 }
 191
 192 static void mv88e6xxx_phy_ppu_state_init(struct mv88e6xxx_chip *chip)
 193 {
 194         mutex_init(&chip->ppu_mutex);
 195         INIT_WORK(&chip->ppu_work, mv88e6xxx_phy_ppu_reenable_work);
 196         timer_setup(&chip->ppu_timer, mv88e6xxx_phy_ppu_reenable_timer, 0);
 197 }
 198
 199 static void mv88e6xxx_phy_ppu_state_destroy(struct mv88e6xxx_chip *chip)
 200 {
 201         del_timer_sync(&chip->ppu_timer);
 202 }
 203
 204 int mv88e6185_phy_ppu_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
 205                            int addr, int reg, u16 *val)
 206 {
 207         int err;
 208
 209         err = mv88e6xxx_phy_ppu_access_get(chip);
 210         if (!err) {
 211                 err = mv88e6xxx_read(chip, addr, reg, val);
 212                 mv88e6xxx_phy_ppu_access_put(chip);
 213         }
 214
 215         return err;
 216 }
 217
 218 int mv88e6185_phy_ppu_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
 219                             int addr, int reg, u16 val)
 220 {
 221         int err;
 222
 223         err = mv88e6xxx_phy_ppu_access_get(chip);
 224         if (!err) {
 225                 err = mv88e6xxx_write(chip, addr, reg, val);
 226                 mv88e6xxx_phy_ppu_access_put(chip);
 227         }
 228
 229         return err;
 230 }
 231
 232 void mv88e6xxx_phy_init(struct mv88e6xxx_chip *chip)
 233 {
 234         if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable)
 235                 mv88e6xxx_phy_ppu_state_init(chip);
 236 }
 237
 238 void mv88e6xxx_phy_destroy(struct mv88e6xxx_chip *chip)
 239 {
 240         if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable)
 241                 mv88e6xxx_phy_ppu_state_destroy(chip);
 242 }
 243
 244 int mv88e6xxx_phy_setup(struct mv88e6xxx_chip *chip)
 245 {
 246         return mv88e6xxx_phy_ppu_enable(chip);
 247 }