Linux 4.16.11
[linux/fpc-iii.git] / drivers / net / ethernet / apm / xgene-v2 / ring.c
blob38810828f8f043a1f4f9031b42e70d00a2c50d94
1 /*
2 * Applied Micro X-Gene SoC Ethernet v2 Driver
4 * Copyright (c) 2017, Applied Micro Circuits Corporation
5 * Author(s): Iyappan Subramanian <isubramanian@apm.com>
6 * Keyur Chudgar <kchudgar@apm.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
22 #include "main.h"
24 /* create circular linked list of descriptors */
25 void xge_setup_desc(struct xge_desc_ring *ring)
27 struct xge_raw_desc *raw_desc;
28 dma_addr_t dma_h, next_dma;
29 u16 offset;
30 int i;
32 for (i = 0; i < XGENE_ENET_NUM_DESC; i++) {
33 raw_desc = &ring->raw_desc[i];
35 offset = (i + 1) & (XGENE_ENET_NUM_DESC - 1);
36 next_dma = ring->dma_addr + (offset * XGENE_ENET_DESC_SIZE);
38 raw_desc->m0 = cpu_to_le64(SET_BITS(E, 1) |
39 SET_BITS(PKT_SIZE, SLOT_EMPTY));
40 dma_h = upper_32_bits(next_dma);
41 raw_desc->m1 = cpu_to_le64(SET_BITS(NEXT_DESC_ADDRL, next_dma) |
42 SET_BITS(NEXT_DESC_ADDRH, dma_h));
46 void xge_update_tx_desc_addr(struct xge_pdata *pdata)
48 struct xge_desc_ring *ring = pdata->tx_ring;
49 dma_addr_t dma_addr = ring->dma_addr;
51 xge_wr_csr(pdata, DMATXDESCL, dma_addr);
52 xge_wr_csr(pdata, DMATXDESCH, upper_32_bits(dma_addr));
54 ring->head = 0;
55 ring->tail = 0;
58 void xge_update_rx_desc_addr(struct xge_pdata *pdata)
60 struct xge_desc_ring *ring = pdata->rx_ring;
61 dma_addr_t dma_addr = ring->dma_addr;
63 xge_wr_csr(pdata, DMARXDESCL, dma_addr);
64 xge_wr_csr(pdata, DMARXDESCH, upper_32_bits(dma_addr));
66 ring->head = 0;
67 ring->tail = 0;
70 void xge_intr_enable(struct xge_pdata *pdata)
72 u32 data;
74 data = RX_PKT_RCVD | TX_PKT_SENT;
75 xge_wr_csr(pdata, DMAINTRMASK, data);
78 void xge_intr_disable(struct xge_pdata *pdata)
80 xge_wr_csr(pdata, DMAINTRMASK, 0);