1 /* QLogic qede NIC Driver
2 * Copyright (c) 2015-2017 QLogic Corporation
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/compiler.h>
35 #include <linux/version.h>
36 #include <linux/workqueue.h>
37 #include <linux/netdevice.h>
38 #include <linux/interrupt.h>
39 #include <linux/bitmap.h>
40 #include <linux/kernel.h>
41 #include <linux/mutex.h>
42 #include <linux/bpf.h>
44 #include <linux/qed/qede_rdma.h>
46 #ifdef CONFIG_RFS_ACCEL
47 #include <linux/cpu_rmap.h>
49 #include <linux/qed/common_hsi.h>
50 #include <linux/qed/eth_common.h>
51 #include <linux/qed/qed_if.h>
52 #include <linux/qed/qed_chain.h>
53 #include <linux/qed/qed_eth_if.h>
55 #define QEDE_MAJOR_VERSION 8
56 #define QEDE_MINOR_VERSION 33
57 #define QEDE_REVISION_VERSION 0
58 #define QEDE_ENGINEERING_VERSION 20
59 #define DRV_MODULE_VERSION __stringify(QEDE_MAJOR_VERSION) "." \
60 __stringify(QEDE_MINOR_VERSION) "." \
61 __stringify(QEDE_REVISION_VERSION) "." \
62 __stringify(QEDE_ENGINEERING_VERSION)
64 #define DRV_MODULE_SYM qede
66 struct qede_stats_common
{
68 u64 packet_too_big_discard
;
76 u64 mftag_filter_discards
;
77 u64 mac_filter_discards
;
87 u64 coalesced_aborts_num
;
88 u64 non_coalesced_pkts
;
92 u64 rx_64_byte_packets
;
93 u64 rx_65_to_127_byte_packets
;
94 u64 rx_128_to_255_byte_packets
;
95 u64 rx_256_to_511_byte_packets
;
96 u64 rx_512_to_1023_byte_packets
;
97 u64 rx_1024_to_1518_byte_packets
;
99 u64 rx_mac_crtl_frames
;
103 u64 rx_carrier_errors
;
104 u64 rx_oversize_packets
;
106 u64 rx_undersize_packets
;
108 u64 tx_64_byte_packets
;
109 u64 tx_65_to_127_byte_packets
;
110 u64 tx_128_to_255_byte_packets
;
111 u64 tx_256_to_511_byte_packets
;
112 u64 tx_512_to_1023_byte_packets
;
113 u64 tx_1024_to_1518_byte_packets
;
118 u64 tx_mac_ctrl_frames
;
121 struct qede_stats_bb
{
122 u64 rx_1519_to_1522_byte_packets
;
123 u64 rx_1519_to_2047_byte_packets
;
124 u64 rx_2048_to_4095_byte_packets
;
125 u64 rx_4096_to_9216_byte_packets
;
126 u64 rx_9217_to_16383_byte_packets
;
127 u64 tx_1519_to_2047_byte_packets
;
128 u64 tx_2048_to_4095_byte_packets
;
129 u64 tx_4096_to_9216_byte_packets
;
130 u64 tx_9217_to_16383_byte_packets
;
131 u64 tx_lpi_entry_count
;
132 u64 tx_total_collisions
;
135 struct qede_stats_ah
{
136 u64 rx_1519_to_max_byte_packets
;
137 u64 tx_1519_to_max_byte_packets
;
141 struct qede_stats_common common
;
144 struct qede_stats_bb bb
;
145 struct qede_stats_ah ah
;
150 struct list_head list
;
155 struct qede_rdma_dev
{
156 struct qedr_dev
*qedr_dev
;
157 struct list_head entry
;
158 struct list_head rdma_event_list
;
159 struct workqueue_struct
*rdma_wq
;
164 #define QEDE_RFS_MAX_FLTR 256
167 struct qed_dev
*cdev
;
168 struct net_device
*ndev
;
169 struct pci_dev
*pdev
;
175 #define QEDE_FLAG_IS_VF BIT(0)
176 #define IS_VF(edev) (!!((edev)->flags & QEDE_FLAG_IS_VF))
177 #define QEDE_TX_TIMESTAMPING_EN BIT(1)
178 #define QEDE_FLAGS_PTP_TX_IN_PRORGESS BIT(2)
180 const struct qed_eth_ops
*ops
;
181 struct qede_ptp
*ptp
;
183 struct qed_dev_eth_info dev_info
;
184 #define QEDE_MAX_RSS_CNT(edev) ((edev)->dev_info.num_queues)
185 #define QEDE_MAX_TSS_CNT(edev) ((edev)->dev_info.num_queues)
186 #define QEDE_IS_BB(edev) \
187 ((edev)->dev_info.common.dev_type == QED_DEV_TYPE_BB)
188 #define QEDE_IS_AH(edev) \
189 ((edev)->dev_info.common.dev_type == QED_DEV_TYPE_AH)
191 struct qede_fastpath
*fp_array
;
198 #define QEDE_QUEUE_CNT(edev) ((edev)->num_queues)
199 #define QEDE_RSS_COUNT(edev) ((edev)->num_queues - (edev)->fp_num_tx)
200 #define QEDE_RX_QUEUE_IDX(edev, i) (i)
201 #define QEDE_TSS_COUNT(edev) ((edev)->num_queues - (edev)->fp_num_rx)
203 struct qed_int_info int_info
;
205 /* Smaller private varaiant of the RTNL lock */
206 struct mutex qede_lock
;
207 u32 state
; /* Protected by qede_lock */
211 /* L2 header size + 2*VLANs (8 bytes) + LLC SNAP (8 bytes) */
212 #define ETH_OVERHEAD (ETH_HLEN + 8 + 8)
213 /* Max supported alignment is 256 (8 shift)
214 * minimal alignment shift 6 is optimal for 57xxx HW performance
216 #define QEDE_RX_ALIGN_SHIFT max(6, min(8, L1_CACHE_SHIFT))
217 /* We assume skb_build() uses sizeof(struct skb_shared_info) bytes
218 * at the end of skb->data, to avoid wasting a full cache line.
219 * This reduces memory use (skb->truesize).
221 #define QEDE_FW_RX_ALIGN_END \
222 max_t(u64, 1UL << QEDE_RX_ALIGN_SHIFT, \
223 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))
225 struct qede_stats stats
;
226 #define QEDE_RSS_INDIR_INITED BIT(0)
227 #define QEDE_RSS_KEY_INITED BIT(1)
228 #define QEDE_RSS_CAPS_INITED BIT(2)
229 u32 rss_params_inited
; /* bit-field to track initialized rss params */
230 u16 rss_ind_table
[128];
234 u16 q_num_rx_buffers
; /* Must be a power of two */
235 u16 q_num_tx_buffers
; /* Must be a power of two */
238 struct list_head vlan_list
;
239 u16 configured_vlans
;
240 u16 non_configured_vlans
;
241 bool accept_any_vlan
;
242 struct delayed_work sp_task
;
243 unsigned long sp_flags
;
247 struct qede_arfs
*arfs
;
250 struct qede_rdma_dev rdma_info
;
252 struct bpf_prog
*xdp_prog
;
260 #define HILO_U64(hi, lo) ((((u64)(hi)) << 32) + (lo))
263 #define MAX_NUM_PRI 8
265 /* The driver supports the new build_skb() API:
266 * RX ring buffer contains pointer to kmalloc() data only,
267 * skb are built only after the frame was DMA-ed.
272 unsigned int page_offset
;
275 enum qede_agg_state
{
276 QEDE_AGG_STATE_NONE
= 0,
277 QEDE_AGG_STATE_START
= 1,
278 QEDE_AGG_STATE_ERROR
= 2
281 struct qede_agg_info
{
282 /* rx_buf is a data buffer that can be placed / consumed from rx bd
283 * chain. It has two purposes: We will preallocate the data buffer
284 * for each aggregation when we open the interface and will place this
285 * buffer on the rx-bd-ring when we receive TPA_START. We don't want
286 * to be in a state where allocation fails, as we can't reuse the
287 * consumer buffer in the rx-chain since FW may still be writing to it
288 * (since header needs to be modified for TPA).
289 * The second purpose is to keep a pointer to the bd buffer during
292 struct sw_rx_data buffer
;
293 dma_addr_t buffer_mapping
;
297 /* We need some structs from the start cookie until termination */
299 u16 start_cqe_bd_len
;
300 u8 start_cqe_placement_offset
;
308 struct qede_rx_queue
{
310 void __iomem
*hw_rxq_prod_addr
;
312 /* Required for the allocation of replacement buffers */
315 struct bpf_prog
*xdp_prog
;
324 /* Used once per each NAPI run */
332 struct sw_rx_data
*sw_rx_ring
;
333 struct qed_chain rx_bd_ring
;
334 struct qed_chain rx_comp_ring ____cacheline_aligned
;
337 struct qede_agg_info tpa_info
[ETH_TPA_MAX_AGGS_NUM
];
339 /* Used once per each NAPI run */
349 struct xdp_rxq_info xdp_rxq
;
353 struct eth_db_data data
;
360 /* Set on the first BD descriptor when there is a split BD */
361 #define QEDE_TSO_SPLIT_BD BIT(0)
369 struct qede_tx_queue
{
374 u16 num_tx_buffers
; /* Slowpath only */
381 /* Needed for the mapping of packets */
384 void __iomem
*doorbell_addr
;
386 int index
; /* Slowpath only */
387 #define QEDE_TXQ_XDP_TO_IDX(edev, txq) ((txq)->index - \
388 QEDE_MAX_TSS_CNT(edev))
389 #define QEDE_TXQ_IDX_TO_XDP(edev, idx) ((idx) + QEDE_MAX_TSS_CNT(edev))
391 /* Regular Tx requires skb + metadata for release purpose,
392 * while XDP requires the pages and the mapped address.
395 struct sw_tx_bd
*skbs
;
396 struct sw_tx_xdp
*xdp
;
399 struct qed_chain tx_pbl
;
401 /* Slowpath; Should be kept in end [unless missing padding] */
405 #define BD_UNMAP_ADDR(bd) HILO_U64(le32_to_cpu((bd)->addr.hi), \
406 le32_to_cpu((bd)->addr.lo))
407 #define BD_SET_UNMAP_ADDR_LEN(bd, maddr, len) \
409 (bd)->addr.hi = cpu_to_le32(upper_32_bits(maddr)); \
410 (bd)->addr.lo = cpu_to_le32(lower_32_bits(maddr)); \
411 (bd)->nbytes = cpu_to_le16(len); \
413 #define BD_UNMAP_LEN(bd) (le16_to_cpu((bd)->nbytes))
415 struct qede_fastpath
{
416 struct qede_dev
*edev
;
417 #define QEDE_FASTPATH_TX BIT(0)
418 #define QEDE_FASTPATH_RX BIT(1)
419 #define QEDE_FASTPATH_XDP BIT(2)
420 #define QEDE_FASTPATH_COMBINED (QEDE_FASTPATH_TX | QEDE_FASTPATH_RX)
424 struct napi_struct napi
;
425 struct qed_sb_info
*sb_info
;
426 struct qede_rx_queue
*rxq
;
427 struct qede_tx_queue
*txq
;
428 struct qede_tx_queue
*xdp_tx
;
430 #define VEC_NAME_SIZE (sizeof(((struct net_device *)0)->name) + 8)
431 char name
[VEC_NAME_SIZE
];
434 /* Debug print definitions */
435 #define DP_NAME(edev) ((edev)->ndev->name)
438 #define XMIT_L4_CSUM BIT(0)
439 #define XMIT_LSO BIT(1)
440 #define XMIT_ENC BIT(2)
441 #define XMIT_ENC_GSO_L4_CSUM BIT(3)
443 #define QEDE_CSUM_ERROR BIT(0)
444 #define QEDE_CSUM_UNNECESSARY BIT(1)
445 #define QEDE_TUNN_CSUM_UNNECESSARY BIT(2)
447 #define QEDE_SP_RX_MODE 1
449 #ifdef CONFIG_RFS_ACCEL
450 int qede_rx_flow_steer(struct net_device
*dev
, const struct sk_buff
*skb
,
451 u16 rxq_index
, u32 flow_id
);
452 #define QEDE_SP_ARFS_CONFIG 4
453 #define QEDE_SP_TASK_POLL_DELAY (5 * HZ)
456 void qede_process_arfs_filters(struct qede_dev
*edev
, bool free_fltr
);
457 void qede_poll_for_freeing_arfs_filters(struct qede_dev
*edev
);
458 void qede_arfs_filter_op(void *dev
, void *filter
, u8 fw_rc
);
459 void qede_free_arfs(struct qede_dev
*edev
);
460 int qede_alloc_arfs(struct qede_dev
*edev
);
461 int qede_add_cls_rule(struct qede_dev
*edev
, struct ethtool_rxnfc
*info
);
462 int qede_del_cls_rule(struct qede_dev
*edev
, struct ethtool_rxnfc
*info
);
463 int qede_get_cls_rule_entry(struct qede_dev
*edev
, struct ethtool_rxnfc
*cmd
);
464 int qede_get_cls_rule_all(struct qede_dev
*edev
, struct ethtool_rxnfc
*info
,
466 int qede_get_arfs_filter_count(struct qede_dev
*edev
);
468 struct qede_reload_args
{
469 void (*func
)(struct qede_dev
*edev
, struct qede_reload_args
*args
);
471 netdev_features_t features
;
472 struct bpf_prog
*new_prog
;
477 /* Datapath functions definition */
478 netdev_tx_t
qede_start_xmit(struct sk_buff
*skb
, struct net_device
*ndev
);
479 netdev_features_t
qede_features_check(struct sk_buff
*skb
,
480 struct net_device
*dev
,
481 netdev_features_t features
);
482 void qede_tx_log_print(struct qede_dev
*edev
, struct qede_fastpath
*fp
);
483 int qede_alloc_rx_buffer(struct qede_rx_queue
*rxq
, bool allow_lazy
);
484 int qede_free_tx_pkt(struct qede_dev
*edev
,
485 struct qede_tx_queue
*txq
, int *len
);
486 int qede_poll(struct napi_struct
*napi
, int budget
);
487 irqreturn_t
qede_msix_fp_int(int irq
, void *fp_cookie
);
489 /* Filtering function definitions */
490 void qede_force_mac(void *dev
, u8
*mac
, bool forced
);
491 void qede_udp_ports_update(void *dev
, u16 vxlan_port
, u16 geneve_port
);
492 int qede_set_mac_addr(struct net_device
*ndev
, void *p
);
494 int qede_vlan_rx_add_vid(struct net_device
*dev
, __be16 proto
, u16 vid
);
495 int qede_vlan_rx_kill_vid(struct net_device
*dev
, __be16 proto
, u16 vid
);
496 void qede_vlan_mark_nonconfigured(struct qede_dev
*edev
);
497 int qede_configure_vlan_filters(struct qede_dev
*edev
);
499 netdev_features_t
qede_fix_features(struct net_device
*dev
,
500 netdev_features_t features
);
501 int qede_set_features(struct net_device
*dev
, netdev_features_t features
);
502 void qede_set_rx_mode(struct net_device
*ndev
);
503 void qede_config_rx_mode(struct net_device
*ndev
);
504 void qede_fill_rss_params(struct qede_dev
*edev
,
505 struct qed_update_vport_rss_params
*rss
, u8
*update
);
507 void qede_udp_tunnel_add(struct net_device
*dev
, struct udp_tunnel_info
*ti
);
508 void qede_udp_tunnel_del(struct net_device
*dev
, struct udp_tunnel_info
*ti
);
510 int qede_xdp(struct net_device
*dev
, struct netdev_bpf
*xdp
);
513 void qede_set_dcbnl_ops(struct net_device
*ndev
);
516 void qede_config_debug(uint debug
, u32
*p_dp_module
, u8
*p_dp_level
);
517 void qede_set_ethtool_ops(struct net_device
*netdev
);
518 void qede_reload(struct qede_dev
*edev
,
519 struct qede_reload_args
*args
, bool is_locked
);
520 int qede_change_mtu(struct net_device
*dev
, int new_mtu
);
521 void qede_fill_by_demand_stats(struct qede_dev
*edev
);
522 void __qede_lock(struct qede_dev
*edev
);
523 void __qede_unlock(struct qede_dev
*edev
);
524 bool qede_has_rx_work(struct qede_rx_queue
*rxq
);
525 int qede_txq_has_work(struct qede_tx_queue
*txq
);
526 void qede_recycle_rx_bd_ring(struct qede_rx_queue
*rxq
, u8 count
);
527 void qede_update_rx_prod(struct qede_dev
*edev
, struct qede_rx_queue
*rxq
);
529 #define RX_RING_SIZE_POW 13
530 #define RX_RING_SIZE ((u16)BIT(RX_RING_SIZE_POW))
531 #define NUM_RX_BDS_MAX (RX_RING_SIZE - 1)
532 #define NUM_RX_BDS_MIN 128
533 #define NUM_RX_BDS_DEF ((u16)BIT(10) - 1)
535 #define TX_RING_SIZE_POW 13
536 #define TX_RING_SIZE ((u16)BIT(TX_RING_SIZE_POW))
537 #define NUM_TX_BDS_MAX (TX_RING_SIZE - 1)
538 #define NUM_TX_BDS_MIN 128
539 #define NUM_TX_BDS_DEF NUM_TX_BDS_MAX
541 #define QEDE_MIN_PKT_LEN 64
542 #define QEDE_RX_HDR_SIZE 256
543 #define QEDE_MAX_JUMBO_PACKET_SIZE 9600
544 #define for_each_queue(i) for (i = 0; i < edev->num_queues; i++)
546 #endif /* _QEDE_H_ */