2 * drivers/net/phy/lxt.c
4 * Driver for Intel LXT PHYs
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
16 #include <linux/kernel.h>
17 #include <linux/string.h>
18 #include <linux/errno.h>
19 #include <linux/unistd.h>
20 #include <linux/interrupt.h>
21 #include <linux/init.h>
22 #include <linux/delay.h>
23 #include <linux/netdevice.h>
24 #include <linux/etherdevice.h>
25 #include <linux/skbuff.h>
26 #include <linux/spinlock.h>
28 #include <linux/module.h>
29 #include <linux/mii.h>
30 #include <linux/ethtool.h>
31 #include <linux/phy.h>
35 #include <linux/uaccess.h>
37 /* The Level one LXT970 is used by many boards */
39 #define MII_LXT970_IER 17 /* Interrupt Enable Register */
41 #define MII_LXT970_IER_IEN 0x0002
43 #define MII_LXT970_ISR 18 /* Interrupt Status Register */
45 #define MII_LXT970_CONFIG 19 /* Configuration Register */
47 /* ------------------------------------------------------------------------- */
48 /* The Level one LXT971 is used on some of my custom boards */
50 /* register definitions for the 971 */
51 #define MII_LXT971_IER 18 /* Interrupt Enable Register */
52 #define MII_LXT971_IER_IEN 0x00f2
54 #define MII_LXT971_ISR 19 /* Interrupt Status Register */
56 /* register definitions for the 973 */
57 #define MII_LXT973_PCR 16 /* Port Configuration Register */
58 #define PCR_FIBER_SELECT 1
60 MODULE_DESCRIPTION("Intel LXT PHY driver");
61 MODULE_AUTHOR("Andy Fleming");
62 MODULE_LICENSE("GPL");
64 static int lxt970_ack_interrupt(struct phy_device
*phydev
)
68 err
= phy_read(phydev
, MII_BMSR
);
73 err
= phy_read(phydev
, MII_LXT970_ISR
);
81 static int lxt970_config_intr(struct phy_device
*phydev
)
83 if (phydev
->interrupts
== PHY_INTERRUPT_ENABLED
)
84 return phy_write(phydev
, MII_LXT970_IER
, MII_LXT970_IER_IEN
);
86 return phy_write(phydev
, MII_LXT970_IER
, 0);
89 static int lxt970_config_init(struct phy_device
*phydev
)
91 return phy_write(phydev
, MII_LXT970_CONFIG
, 0);
95 static int lxt971_ack_interrupt(struct phy_device
*phydev
)
97 int err
= phy_read(phydev
, MII_LXT971_ISR
);
105 static int lxt971_config_intr(struct phy_device
*phydev
)
107 if (phydev
->interrupts
== PHY_INTERRUPT_ENABLED
)
108 return phy_write(phydev
, MII_LXT971_IER
, MII_LXT971_IER_IEN
);
110 return phy_write(phydev
, MII_LXT971_IER
, 0);
114 * A2 version of LXT973 chip has an ERRATA: it randomly return the contents
115 * of the previous even register when you read a odd register regularly
118 static int lxt973a2_update_link(struct phy_device
*phydev
)
122 int retry
= 8; /* we try 8 times */
125 status
= phy_read(phydev
, MII_BMSR
);
130 control
= phy_read(phydev
, MII_BMCR
);
135 /* Read link and autonegotiation status */
136 status
= phy_read(phydev
, MII_BMSR
);
137 } while (status
>= 0 && retry
-- && status
== control
);
142 if ((status
& BMSR_LSTATUS
) == 0)
150 static int lxt973a2_read_status(struct phy_device
*phydev
)
156 /* Update the link, but return if there was an error */
157 err
= lxt973a2_update_link(phydev
);
161 if (AUTONEG_ENABLE
== phydev
->autoneg
) {
164 adv
= phy_read(phydev
, MII_ADVERTISE
);
170 lpa
= phy_read(phydev
, MII_LPA
);
175 /* If both registers are equal, it is suspect but not
176 * impossible, hence a new try
178 } while (lpa
== adv
&& retry
--);
180 phydev
->lp_advertising
= mii_lpa_to_ethtool_lpa_t(lpa
);
184 phydev
->speed
= SPEED_10
;
185 phydev
->duplex
= DUPLEX_HALF
;
186 phydev
->pause
= phydev
->asym_pause
= 0;
188 if (lpa
& (LPA_100FULL
| LPA_100HALF
)) {
189 phydev
->speed
= SPEED_100
;
191 if (lpa
& LPA_100FULL
)
192 phydev
->duplex
= DUPLEX_FULL
;
194 if (lpa
& LPA_10FULL
)
195 phydev
->duplex
= DUPLEX_FULL
;
198 if (phydev
->duplex
== DUPLEX_FULL
) {
199 phydev
->pause
= lpa
& LPA_PAUSE_CAP
? 1 : 0;
200 phydev
->asym_pause
= lpa
& LPA_PAUSE_ASYM
? 1 : 0;
203 int bmcr
= phy_read(phydev
, MII_BMCR
);
208 if (bmcr
& BMCR_FULLDPLX
)
209 phydev
->duplex
= DUPLEX_FULL
;
211 phydev
->duplex
= DUPLEX_HALF
;
213 if (bmcr
& BMCR_SPEED1000
)
214 phydev
->speed
= SPEED_1000
;
215 else if (bmcr
& BMCR_SPEED100
)
216 phydev
->speed
= SPEED_100
;
218 phydev
->speed
= SPEED_10
;
220 phydev
->pause
= phydev
->asym_pause
= 0;
221 phydev
->lp_advertising
= 0;
227 static int lxt973_probe(struct phy_device
*phydev
)
229 int val
= phy_read(phydev
, MII_LXT973_PCR
);
231 if (val
& PCR_FIBER_SELECT
) {
233 * If fiber is selected, then the only correct setting
234 * is 100Mbps, full duplex, and auto negotiation off.
236 val
= phy_read(phydev
, MII_BMCR
);
237 val
|= (BMCR_SPEED100
| BMCR_FULLDPLX
);
238 val
&= ~BMCR_ANENABLE
;
239 phy_write(phydev
, MII_BMCR
, val
);
240 /* Remember that the port is in fiber mode. */
241 phydev
->priv
= lxt973_probe
;
248 static int lxt973_config_aneg(struct phy_device
*phydev
)
250 /* Do nothing if port is in fiber mode. */
251 return phydev
->priv
? 0 : genphy_config_aneg(phydev
);
254 static struct phy_driver lxt97x_driver
[] = {
256 .phy_id
= 0x78100000,
258 .phy_id_mask
= 0xfffffff0,
259 .features
= PHY_BASIC_FEATURES
,
260 .flags
= PHY_HAS_INTERRUPT
,
261 .config_init
= lxt970_config_init
,
262 .ack_interrupt
= lxt970_ack_interrupt
,
263 .config_intr
= lxt970_config_intr
,
265 .phy_id
= 0x001378e0,
267 .phy_id_mask
= 0xfffffff0,
268 .features
= PHY_BASIC_FEATURES
,
269 .flags
= PHY_HAS_INTERRUPT
,
270 .ack_interrupt
= lxt971_ack_interrupt
,
271 .config_intr
= lxt971_config_intr
,
273 .phy_id
= 0x00137a10,
275 .phy_id_mask
= 0xffffffff,
276 .features
= PHY_BASIC_FEATURES
,
278 .probe
= lxt973_probe
,
279 .config_aneg
= lxt973_config_aneg
,
280 .read_status
= lxt973a2_read_status
,
282 .phy_id
= 0x00137a10,
284 .phy_id_mask
= 0xfffffff0,
285 .features
= PHY_BASIC_FEATURES
,
287 .probe
= lxt973_probe
,
288 .config_aneg
= lxt973_config_aneg
,
291 module_phy_driver(lxt97x_driver
);
293 static struct mdio_device_id __maybe_unused lxt_tbl
[] = {
294 { 0x78100000, 0xfffffff0 },
295 { 0x001378e0, 0xfffffff0 },
296 { 0x00137a10, 0xfffffff0 },
300 MODULE_DEVICE_TABLE(mdio
, lxt_tbl
);