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Linux 4.16.11
[linux/fpc-iii.git] / drivers / net / wireless / ath / wil6210 / wil6210.h
blob0df2aada66592bc33e0d85daf3fed56a2ec09574
1 /*
2 * Copyright (c) 2012-2017 Qualcomm Atheros, Inc.
3 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18 #ifndef __WIL6210_H__
19 #define __WIL6210_H__
20
21 #include <linux/etherdevice.h>
22 #include <linux/netdevice.h>
23 #include <linux/wireless.h>
24 #include <net/cfg80211.h>
25 #include <linux/timex.h>
26 #include <linux/types.h>
27 #include "wmi.h"
28 #include "wil_platform.h"
29
30 extern bool no_fw_recovery;
31 extern unsigned int mtu_max;
32 extern unsigned short rx_ring_overflow_thrsh;
33 extern int agg_wsize;
34 extern bool rx_align_2;
35 extern bool rx_large_buf;
36 extern bool debug_fw;
37 extern bool disable_ap_sme;
38
39 #define WIL_NAME "wil6210"
40
41 #define WIL_FW_NAME_DEFAULT "wil6210.fw"
42 #define WIL_FW_NAME_FTM_DEFAULT "wil6210_ftm.fw"
43
44 #define WIL_FW_NAME_SPARROW_PLUS "wil6210_sparrow_plus.fw"
45 #define WIL_FW_NAME_FTM_SPARROW_PLUS "wil6210_sparrow_plus_ftm.fw"
46
47 #define WIL_BOARD_FILE_NAME "wil6210.brd" /* board & radio parameters */
48
49 #define WIL_DEFAULT_BUS_REQUEST_KBPS 128000 /* ~1Gbps */
50 #define WIL_MAX_BUS_REQUEST_KBPS 800000 /* ~6.1Gbps */
51
52 /**
53 * extract bits [@b0:@b1] (inclusive) from the value @x
54 * it should be @b0 <= @b1, or result is incorrect
55 */
56 static inline u32 WIL_GET_BITS(u32 x, int b0, int b1)
57 {
58 return (x >> b0) & ((1 << (b1 - b0 + 1)) - 1);
59 }
60
61 #define WIL6210_MIN_MEM_SIZE (2 * 1024 * 1024UL)
62 #define WIL6210_MAX_MEM_SIZE (4 * 1024 * 1024UL)
63
64 #define WIL_TX_Q_LEN_DEFAULT (4000)
65 #define WIL_RX_RING_SIZE_ORDER_DEFAULT (10)
66 #define WIL_TX_RING_SIZE_ORDER_DEFAULT (12)
67 #define WIL_BCAST_RING_SIZE_ORDER_DEFAULT (7)
68 #define WIL_BCAST_MCS0_LIMIT (1024) /* limit for MCS0 frame size */
69 /* limit ring size in range [32..32k] */
70 #define WIL_RING_SIZE_ORDER_MIN (5)
71 #define WIL_RING_SIZE_ORDER_MAX (15)
72 #define WIL6210_MAX_TX_RINGS (24) /* HW limit */
73 #define WIL6210_MAX_CID (8) /* HW limit */
74 #define WIL6210_NAPI_BUDGET (16) /* arbitrary */
75 #define WIL_MAX_AMPDU_SIZE (64 * 1024) /* FW/HW limit */
76 #define WIL_MAX_AGG_WSIZE (32) /* FW/HW limit */
77 /* Hardware offload block adds the following:
78 * 26 bytes - 3-address QoS data header
79 * 8 bytes - IV + EIV (for GCMP)
80 * 8 bytes - SNAP
81 * 16 bytes - MIC (for GCMP)
82 * 4 bytes - CRC
83 */
84 #define WIL_MAX_MPDU_OVERHEAD (62)
85
86 struct wil_suspend_count_stats {
87 unsigned long successful_suspends;
88 unsigned long successful_resumes;
89 unsigned long failed_suspends;
90 unsigned long failed_resumes;
91 };
92
93 struct wil_suspend_stats {
94 struct wil_suspend_count_stats r_off;
95 struct wil_suspend_count_stats r_on;
96 unsigned long rejected_by_device; /* only radio on */
97 unsigned long rejected_by_host;
98 };
99
100 /* Calculate MAC buffer size for the firmware. It includes all overhead,
101 * as it will go over the air, and need to be 8 byte aligned
102 */
103 static inline u32 wil_mtu2macbuf(u32 mtu)
104 {
105 return ALIGN(mtu + WIL_MAX_MPDU_OVERHEAD, 8);
106 }
107
108 /* MTU for Ethernet need to take into account 8-byte SNAP header
109 * to be added when encapsulating Ethernet frame into 802.11
110 */
111 #define WIL_MAX_ETH_MTU (IEEE80211_MAX_DATA_LEN_DMG - 8)
112 /* Max supported by wil6210 value for interrupt threshold is 5sec. */
113 #define WIL6210_ITR_TRSH_MAX (5000000)
114 #define WIL6210_ITR_TX_INTERFRAME_TIMEOUT_DEFAULT (13) /* usec */
115 #define WIL6210_ITR_RX_INTERFRAME_TIMEOUT_DEFAULT (13) /* usec */
116 #define WIL6210_ITR_TX_MAX_BURST_DURATION_DEFAULT (500) /* usec */
117 #define WIL6210_ITR_RX_MAX_BURST_DURATION_DEFAULT (500) /* usec */
118 #define WIL6210_FW_RECOVERY_RETRIES (5) /* try to recover this many times */
119 #define WIL6210_FW_RECOVERY_TO msecs_to_jiffies(5000)
120 #define WIL6210_SCAN_TO msecs_to_jiffies(10000)
121 #define WIL6210_DISCONNECT_TO_MS (2000)
122 #define WIL6210_RX_HIGH_TRSH_INIT (0)
123 #define WIL6210_RX_HIGH_TRSH_DEFAULT \
124 (1 << (WIL_RX_RING_SIZE_ORDER_DEFAULT - 3))
125 #define WIL_MAX_DMG_AID 254 /* for DMG only 1-254 allowed (see
126 * 802.11REVmc/D5.0, section 9.4.1.8)
127 */
128 /* Hardware definitions begin */
129
130 /*
131 * Mapping
132 * RGF File | Host addr | FW addr
133 * | |
134 * user_rgf | 0x000000 | 0x880000
135 * dma_rgf | 0x001000 | 0x881000
136 * pcie_rgf | 0x002000 | 0x882000
137 * | |
138 */
139
140 /* Where various structures placed in host address space */
141 #define WIL6210_FW_HOST_OFF (0x880000UL)
142
143 #define HOSTADDR(fwaddr) (fwaddr - WIL6210_FW_HOST_OFF)
144
145 /*
146 * Interrupt control registers block
147 *
148 * each interrupt controlled by the same bit in all registers
149 */
150 struct RGF_ICR {
151 u32 ICC; /* Cause Control, RW: 0 - W1C, 1 - COR */
152 u32 ICR; /* Cause, W1C/COR depending on ICC */
153 u32 ICM; /* Cause masked (ICR & ~IMV), W1C/COR depending on ICC */
154 u32 ICS; /* Cause Set, WO */
155 u32 IMV; /* Mask, RW+S/C */
156 u32 IMS; /* Mask Set, write 1 to set */
157 u32 IMC; /* Mask Clear, write 1 to clear */
158 } __packed;
159
160 /* registers - FW addresses */
161 #define RGF_USER_USAGE_1 (0x880004)
162 #define RGF_USER_USAGE_6 (0x880018)
163 #define BIT_USER_OOB_MODE BIT(31)
164 #define BIT_USER_OOB_R2_MODE BIT(30)
165 #define RGF_USER_USAGE_8 (0x880020)
166 #define BIT_USER_PREVENT_DEEP_SLEEP BIT(0)
167 #define BIT_USER_SUPPORT_T_POWER_ON_0 BIT(1)
168 #define BIT_USER_EXT_CLK BIT(2)
169 #define RGF_USER_HW_MACHINE_STATE (0x8801dc)
170 #define HW_MACHINE_BOOT_DONE (0x3fffffd)
171 #define RGF_USER_USER_CPU_0 (0x8801e0)
172 #define BIT_USER_USER_CPU_MAN_RST BIT(1) /* user_cpu_man_rst */
173 #define RGF_USER_CPU_PC (0x8801e8)
174 #define RGF_USER_MAC_CPU_0 (0x8801fc)
175 #define BIT_USER_MAC_CPU_MAN_RST BIT(1) /* mac_cpu_man_rst */
176 #define RGF_USER_USER_SCRATCH_PAD (0x8802bc)
177 #define RGF_USER_BL (0x880A3C) /* Boot Loader */
178 #define RGF_USER_FW_REV_ID (0x880a8c) /* chip revision */
179 #define RGF_USER_FW_CALIB_RESULT (0x880a90) /* b0-7:result
180 * b8-15:signature
181 */
182 #define CALIB_RESULT_SIGNATURE (0x11)
183 #define RGF_USER_CLKS_CTL_0 (0x880abc)
184 #define BIT_USER_CLKS_CAR_AHB_SW_SEL BIT(1) /* ref clk/PLL */
185 #define BIT_USER_CLKS_RST_PWGD BIT(11) /* reset on "power good" */
186 #define RGF_USER_CLKS_CTL_SW_RST_VEC_0 (0x880b04)
187 #define RGF_USER_CLKS_CTL_SW_RST_VEC_1 (0x880b08)
188 #define RGF_USER_CLKS_CTL_SW_RST_VEC_2 (0x880b0c)
189 #define RGF_USER_CLKS_CTL_SW_RST_VEC_3 (0x880b10)
190 #define RGF_USER_CLKS_CTL_SW_RST_MASK_0 (0x880b14)
191 #define BIT_HPAL_PERST_FROM_PAD BIT(6)
192 #define BIT_CAR_PERST_RST BIT(7)
193 #define RGF_USER_USER_ICR (0x880b4c) /* struct RGF_ICR */
194 #define BIT_USER_USER_ICR_SW_INT_2 BIT(18)
195 #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0 (0x880c18)
196 #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1 (0x880c2c)
197 #define RGF_USER_SPARROW_M_4 (0x880c50) /* Sparrow */
198 #define BIT_SPARROW_M_4_SEL_SLEEP_OR_REF BIT(2)
199 #define RGF_USER_OTP_HW_RD_MACHINE_1 (0x880ce0)
200 #define BIT_NO_FLASH_INDICATION BIT(8)
201 #define RGF_USER_XPM_IFC_RD_TIME1 (0x880cec)
202 #define RGF_USER_XPM_IFC_RD_TIME2 (0x880cf0)
203 #define RGF_USER_XPM_IFC_RD_TIME3 (0x880cf4)
204 #define RGF_USER_XPM_IFC_RD_TIME4 (0x880cf8)
205 #define RGF_USER_XPM_IFC_RD_TIME5 (0x880cfc)
206 #define RGF_USER_XPM_IFC_RD_TIME6 (0x880d00)
207 #define RGF_USER_XPM_IFC_RD_TIME7 (0x880d04)
208 #define RGF_USER_XPM_IFC_RD_TIME8 (0x880d08)
209 #define RGF_USER_XPM_IFC_RD_TIME9 (0x880d0c)
210 #define RGF_USER_XPM_IFC_RD_TIME10 (0x880d10)
211 #define RGF_USER_XPM_RD_DOUT_SAMPLE_TIME (0x880d64)
212
213 #define RGF_DMA_EP_TX_ICR (0x881bb4) /* struct RGF_ICR */
214 #define BIT_DMA_EP_TX_ICR_TX_DONE BIT(0)
215 #define BIT_DMA_EP_TX_ICR_TX_DONE_N(n) BIT(n+1) /* n = [0..23] */
216 #define RGF_DMA_EP_RX_ICR (0x881bd0) /* struct RGF_ICR */
217 #define BIT_DMA_EP_RX_ICR_RX_DONE BIT(0)
218 #define BIT_DMA_EP_RX_ICR_RX_HTRSH BIT(1)
219 #define RGF_DMA_EP_MISC_ICR (0x881bec) /* struct RGF_ICR */
220 #define BIT_DMA_EP_MISC_ICR_RX_HTRSH BIT(0)
221 #define BIT_DMA_EP_MISC_ICR_TX_NO_ACT BIT(1)
222 #define BIT_DMA_EP_MISC_ICR_HALP BIT(27)
223 #define BIT_DMA_EP_MISC_ICR_FW_INT(n) BIT(28+n) /* n = [0..3] */
224
225 /* Legacy interrupt moderation control (before Sparrow v2)*/
226 #define RGF_DMA_ITR_CNT_TRSH (0x881c5c)
227 #define RGF_DMA_ITR_CNT_DATA (0x881c60)
228 #define RGF_DMA_ITR_CNT_CRL (0x881c64)
229 #define BIT_DMA_ITR_CNT_CRL_EN BIT(0)
230 #define BIT_DMA_ITR_CNT_CRL_EXT_TICK BIT(1)
231 #define BIT_DMA_ITR_CNT_CRL_FOREVER BIT(2)
232 #define BIT_DMA_ITR_CNT_CRL_CLR BIT(3)
233 #define BIT_DMA_ITR_CNT_CRL_REACH_TRSH BIT(4)
234
235 /* Offload control (Sparrow B0+) */
236 #define RGF_DMA_OFUL_NID_0 (0x881cd4)
237 #define BIT_DMA_OFUL_NID_0_RX_EXT_TR_EN BIT(0)
238 #define BIT_DMA_OFUL_NID_0_TX_EXT_TR_EN BIT(1)
239 #define BIT_DMA_OFUL_NID_0_RX_EXT_A3_SRC BIT(2)
240 #define BIT_DMA_OFUL_NID_0_TX_EXT_A3_SRC BIT(3)
241
242 /* New (sparrow v2+) interrupt moderation control */
243 #define RGF_DMA_ITR_TX_DESQ_NO_MOD (0x881d40)
244 #define RGF_DMA_ITR_TX_CNT_TRSH (0x881d34)
245 #define RGF_DMA_ITR_TX_CNT_DATA (0x881d38)
246 #define RGF_DMA_ITR_TX_CNT_CTL (0x881d3c)
247 #define BIT_DMA_ITR_TX_CNT_CTL_EN BIT(0)
248 #define BIT_DMA_ITR_TX_CNT_CTL_EXT_TIC_SEL BIT(1)
249 #define BIT_DMA_ITR_TX_CNT_CTL_FOREVER BIT(2)
250 #define BIT_DMA_ITR_TX_CNT_CTL_CLR BIT(3)
251 #define BIT_DMA_ITR_TX_CNT_CTL_REACHED_TRESH BIT(4)
252 #define BIT_DMA_ITR_TX_CNT_CTL_CROSS_EN BIT(5)
253 #define BIT_DMA_ITR_TX_CNT_CTL_FREE_RUNNIG BIT(6)
254 #define RGF_DMA_ITR_TX_IDL_CNT_TRSH (0x881d60)
255 #define RGF_DMA_ITR_TX_IDL_CNT_DATA (0x881d64)
256 #define RGF_DMA_ITR_TX_IDL_CNT_CTL (0x881d68)
257 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_EN BIT(0)
258 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_EXT_TIC_SEL BIT(1)
259 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_FOREVER BIT(2)
260 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_CLR BIT(3)
261 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_REACHED_TRESH BIT(4)
262 #define RGF_DMA_ITR_RX_DESQ_NO_MOD (0x881d50)
263 #define RGF_DMA_ITR_RX_CNT_TRSH (0x881d44)
264 #define RGF_DMA_ITR_RX_CNT_DATA (0x881d48)
265 #define RGF_DMA_ITR_RX_CNT_CTL (0x881d4c)
266 #define BIT_DMA_ITR_RX_CNT_CTL_EN BIT(0)
267 #define BIT_DMA_ITR_RX_CNT_CTL_EXT_TIC_SEL BIT(1)
268 #define BIT_DMA_ITR_RX_CNT_CTL_FOREVER BIT(2)
269 #define BIT_DMA_ITR_RX_CNT_CTL_CLR BIT(3)
270 #define BIT_DMA_ITR_RX_CNT_CTL_REACHED_TRESH BIT(4)
271 #define BIT_DMA_ITR_RX_CNT_CTL_CROSS_EN BIT(5)
272 #define BIT_DMA_ITR_RX_CNT_CTL_FREE_RUNNIG BIT(6)
273 #define RGF_DMA_ITR_RX_IDL_CNT_TRSH (0x881d54)
274 #define RGF_DMA_ITR_RX_IDL_CNT_DATA (0x881d58)
275 #define RGF_DMA_ITR_RX_IDL_CNT_CTL (0x881d5c)
276 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_EN BIT(0)
277 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_EXT_TIC_SEL BIT(1)
278 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_FOREVER BIT(2)
279 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_CLR BIT(3)
280 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_REACHED_TRESH BIT(4)
281
282 #define RGF_DMA_PSEUDO_CAUSE (0x881c68)
283 #define RGF_DMA_PSEUDO_CAUSE_MASK_SW (0x881c6c)
284 #define RGF_DMA_PSEUDO_CAUSE_MASK_FW (0x881c70)
285 #define BIT_DMA_PSEUDO_CAUSE_RX BIT(0)
286 #define BIT_DMA_PSEUDO_CAUSE_TX BIT(1)
287 #define BIT_DMA_PSEUDO_CAUSE_MISC BIT(2)
288
289 #define RGF_HP_CTRL (0x88265c)
290 #define RGF_PAL_UNIT_ICR (0x88266c) /* struct RGF_ICR */
291 #define RGF_PCIE_LOS_COUNTER_CTL (0x882dc4)
292
293 /* MAC timer, usec, for packet lifetime */
294 #define RGF_MAC_MTRL_COUNTER_0 (0x886aa8)
295
296 #define RGF_CAF_ICR (0x88946c) /* struct RGF_ICR */
297 #define RGF_CAF_OSC_CONTROL (0x88afa4)
298 #define BIT_CAF_OSC_XTAL_EN BIT(0)
299 #define RGF_CAF_PLL_LOCK_STATUS (0x88afec)
300 #define BIT_CAF_OSC_DIG_XTAL_STABLE BIT(0)
301
302 #define USER_EXT_USER_PMU_3 (0x88d00c)
303 #define BIT_PMU_DEVICE_RDY BIT(0)
304
305 #define RGF_USER_JTAG_DEV_ID (0x880b34) /* device ID */
306 #define JTAG_DEV_ID_SPARROW (0x2632072f)
307 #define JTAG_DEV_ID_TALYN (0x7e0e1)
308
309 #define RGF_USER_REVISION_ID (0x88afe4)
310 #define RGF_USER_REVISION_ID_MASK (3)
311 #define REVISION_ID_SPARROW_B0 (0x0)
312 #define REVISION_ID_SPARROW_D0 (0x3)
313
314 #define RGF_OTP_MAC (0x8a0620)
315
316 /* crash codes for FW/Ucode stored here */
317
318 /* ASSERT RGFs */
319 #define SPARROW_RGF_FW_ASSERT_CODE (0x91f020)
320 #define SPARROW_RGF_UCODE_ASSERT_CODE (0x91f028)
321 #define TALYN_RGF_FW_ASSERT_CODE (0xa37020)
322 #define TALYN_RGF_UCODE_ASSERT_CODE (0xa37028)
323
324 enum {
325 HW_VER_UNKNOWN,
326 HW_VER_SPARROW_B0, /* REVISION_ID_SPARROW_B0 */
327 HW_VER_SPARROW_D0, /* REVISION_ID_SPARROW_D0 */
328 HW_VER_TALYN, /* JTAG_DEV_ID_TALYN */
329 };
330
331 /* popular locations */
332 #define RGF_MBOX RGF_USER_USER_SCRATCH_PAD
333 #define HOST_MBOX HOSTADDR(RGF_MBOX)
334 #define SW_INT_MBOX BIT_USER_USER_ICR_SW_INT_2
335
336 /* ISR register bits */
337 #define ISR_MISC_FW_READY BIT_DMA_EP_MISC_ICR_FW_INT(0)
338 #define ISR_MISC_MBOX_EVT BIT_DMA_EP_MISC_ICR_FW_INT(1)
339 #define ISR_MISC_FW_ERROR BIT_DMA_EP_MISC_ICR_FW_INT(3)
340
341 #define WIL_DATA_COMPLETION_TO_MS 200
342
343 /* Hardware definitions end */
344 #define SPARROW_FW_MAPPING_TABLE_SIZE 10
345 #define TALYN_FW_MAPPING_TABLE_SIZE 13
346 #define MAX_FW_MAPPING_TABLE_SIZE 13
347
348 struct fw_map {
349 u32 from; /* linker address - from, inclusive */
350 u32 to; /* linker address - to, exclusive */
351 u32 host; /* PCI/Host address - BAR0 + 0x880000 */
352 const char *name; /* for debugfs */
353 bool fw; /* true if FW mapping, false if UCODE mapping */
354 };
355
356 /* array size should be in sync with actual definition in the wmi.c */
357 extern const struct fw_map sparrow_fw_mapping[SPARROW_FW_MAPPING_TABLE_SIZE];
358 extern const struct fw_map sparrow_d0_mac_rgf_ext;
359 extern const struct fw_map talyn_fw_mapping[TALYN_FW_MAPPING_TABLE_SIZE];
360 extern struct fw_map fw_mapping[MAX_FW_MAPPING_TABLE_SIZE];
361
362 /**
363 * mk_cidxtid - construct @cidxtid field
364 * @cid: CID value
365 * @tid: TID value
366 *
367 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID
368 */
369 static inline u8 mk_cidxtid(u8 cid, u8 tid)
370 {
371 return ((tid & 0xf) << 4) | (cid & 0xf);
372 }
373
374 /**
375 * parse_cidxtid - parse @cidxtid field
376 * @cid: store CID value here
377 * @tid: store TID value here
378 *
379 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID
380 */
381 static inline void parse_cidxtid(u8 cidxtid, u8 *cid, u8 *tid)
382 {
383 *cid = cidxtid & 0xf;
384 *tid = (cidxtid >> 4) & 0xf;
385 }
386
387 struct wil6210_mbox_ring {
388 u32 base;
389 u16 entry_size; /* max. size of mbox entry, incl. all headers */
390 u16 size;
391 u32 tail;
392 u32 head;
393 } __packed;
394
395 struct wil6210_mbox_ring_desc {
396 __le32 sync;
397 __le32 addr;
398 } __packed;
399
400 /* at HOST_OFF_WIL6210_MBOX_CTL */
401 struct wil6210_mbox_ctl {
402 struct wil6210_mbox_ring tx;
403 struct wil6210_mbox_ring rx;
404 } __packed;
405
406 struct wil6210_mbox_hdr {
407 __le16 seq;
408 __le16 len; /* payload, bytes after this header */
409 __le16 type;
410 u8 flags;
411 u8 reserved;
412 } __packed;
413
414 #define WIL_MBOX_HDR_TYPE_WMI (0)
415
416 /* max. value for wil6210_mbox_hdr.len */
417 #define MAX_MBOXITEM_SIZE (240)
418
419 struct pending_wmi_event {
420 struct list_head list;
421 struct {
422 struct wil6210_mbox_hdr hdr;
423 struct wmi_cmd_hdr wmi;
424 u8 data[0];
425 } __packed event;
426 };
427
428 enum { /* for wil_ctx.mapped_as */
429 wil_mapped_as_none = 0,
430 wil_mapped_as_single = 1,
431 wil_mapped_as_page = 2,
432 };
433
434 /**
435 * struct wil_ctx - software context for Vring descriptor
436 */
437 struct wil_ctx {
438 struct sk_buff *skb;
439 u8 nr_frags;
440 u8 mapped_as;
441 };
442
443 union vring_desc;
444
445 struct vring {
446 dma_addr_t pa;
447 volatile union vring_desc *va; /* vring_desc[size], WriteBack by DMA */
448 u16 size; /* number of vring_desc elements */
449 u32 swtail;
450 u32 swhead;
451 u32 hwtail; /* write here to inform hw */
452 struct wil_ctx *ctx; /* ctx[size] - software context */
453 };
454
455 /**
456 * Additional data for Tx Vring
457 */
458 struct vring_tx_data {
459 bool dot1x_open;
460 int enabled;
461 cycles_t idle, last_idle, begin;
462 u8 agg_wsize; /* agreed aggregation window, 0 - no agg */
463 u16 agg_timeout;
464 u8 agg_amsdu;
465 bool addba_in_progress; /* if set, agg_xxx is for request in progress */
466 spinlock_t lock;
467 };
468
469 enum { /* for wil6210_priv.status */
470 wil_status_fwready = 0, /* FW operational */
471 wil_status_fwconnecting,
472 wil_status_fwconnected,
473 wil_status_dontscan,
474 wil_status_mbox_ready, /* MBOX structures ready */
475 wil_status_irqen, /* interrupts enabled - for debug */
476 wil_status_napi_en, /* NAPI enabled protected by wil->mutex */
477 wil_status_resetting, /* reset in progress */
478 wil_status_suspending, /* suspend in progress */
479 wil_status_suspended, /* suspend completed, device is suspended */
480 wil_status_resuming, /* resume in progress */
481 wil_status_collecting_dumps, /* crashdump collection in progress */
482 wil_status_last /* keep last */
483 };
484
485 struct pci_dev;
486
487 /**
488 * struct tid_ampdu_rx - TID aggregation information (Rx).
489 *
490 * @reorder_buf: buffer to reorder incoming aggregated MPDUs
491 * @reorder_time: jiffies when skb was added
492 * @session_timer: check if peer keeps Tx-ing on the TID (by timeout value)
493 * @reorder_timer: releases expired frames from the reorder buffer.
494 * @last_rx: jiffies of last rx activity
495 * @head_seq_num: head sequence number in reordering buffer.
496 * @stored_mpdu_num: number of MPDUs in reordering buffer
497 * @ssn: Starting Sequence Number expected to be aggregated.
498 * @buf_size: buffer size for incoming A-MPDUs
499 * @timeout: reset timer value (in TUs).
500 * @ssn_last_drop: SSN of the last dropped frame
501 * @total: total number of processed incoming frames
502 * @drop_dup: duplicate frames dropped for this reorder buffer
503 * @drop_old: old frames dropped for this reorder buffer
504 * @dialog_token: dialog token for aggregation session
505 * @first_time: true when this buffer used 1-st time
506 */
507 struct wil_tid_ampdu_rx {
508 struct sk_buff **reorder_buf;
509 unsigned long *reorder_time;
510 struct timer_list session_timer;
511 struct timer_list reorder_timer;
512 unsigned long last_rx;
513 u16 head_seq_num;
514 u16 stored_mpdu_num;
515 u16 ssn;
516 u16 buf_size;
517 u16 timeout;
518 u16 ssn_last_drop;
519 unsigned long long total; /* frames processed */
520 unsigned long long drop_dup;
521 unsigned long long drop_old;
522 u8 dialog_token;
523 bool first_time; /* is it 1-st time this buffer used? */
524 };
525
526 /**
527 * struct wil_tid_crypto_rx_single - TID crypto information (Rx).
528 *
529 * @pn: GCMP PN for the session
530 * @key_set: valid key present
531 */
532 struct wil_tid_crypto_rx_single {
533 u8 pn[IEEE80211_GCMP_PN_LEN];
534 bool key_set;
535 };
536
537 struct wil_tid_crypto_rx {
538 struct wil_tid_crypto_rx_single key_id[4];
539 };
540
541 struct wil_p2p_info {
542 struct ieee80211_channel listen_chan;
543 u8 discovery_started;
544 u8 p2p_dev_started;
545 u64 cookie;
546 struct wireless_dev *pending_listen_wdev;
547 unsigned int listen_duration;
548 struct timer_list discovery_timer; /* listen/search duration */
549 struct work_struct discovery_expired_work; /* listen/search expire */
550 struct work_struct delayed_listen_work; /* listen after scan done */
551 };
552
553 enum wil_sta_status {
554 wil_sta_unused = 0,
555 wil_sta_conn_pending = 1,
556 wil_sta_connected = 2,
557 };
558
559 #define WIL_STA_TID_NUM (16)
560 #define WIL_MCS_MAX (12) /* Maximum MCS supported */
561
562 struct wil_net_stats {
563 unsigned long rx_packets;
564 unsigned long tx_packets;
565 unsigned long rx_bytes;
566 unsigned long tx_bytes;
567 unsigned long tx_errors;
568 unsigned long rx_dropped;
569 unsigned long rx_non_data_frame;
570 unsigned long rx_short_frame;
571 unsigned long rx_large_frame;
572 unsigned long rx_replay;
573 u16 last_mcs_rx;
574 u64 rx_per_mcs[WIL_MCS_MAX + 1];
575 };
576
577 /**
578 * struct wil_sta_info - data for peer
579 *
580 * Peer identified by its CID (connection ID)
581 * NIC performs beam forming for each peer;
582 * if no beam forming done, frame exchange is not
583 * possible.
584 */
585 struct wil_sta_info {
586 u8 addr[ETH_ALEN];
587 enum wil_sta_status status;
588 struct wil_net_stats stats;
589 /* Rx BACK */
590 struct wil_tid_ampdu_rx *tid_rx[WIL_STA_TID_NUM];
591 spinlock_t tid_rx_lock; /* guarding tid_rx array */
592 unsigned long tid_rx_timer_expired[BITS_TO_LONGS(WIL_STA_TID_NUM)];
593 unsigned long tid_rx_stop_requested[BITS_TO_LONGS(WIL_STA_TID_NUM)];
594 struct wil_tid_crypto_rx tid_crypto_rx[WIL_STA_TID_NUM];
595 struct wil_tid_crypto_rx group_crypto_rx;
596 u8 aid; /* 1-254; 0 if unknown/not reported */
597 };
598
599 enum {
600 fw_recovery_idle = 0,
601 fw_recovery_pending = 1,
602 fw_recovery_running = 2,
603 };
604
605 enum {
606 hw_capa_no_flash,
607 hw_capa_last
608 };
609
610 struct wil_probe_client_req {
611 struct list_head list;
612 u64 cookie;
613 u8 cid;
614 };
615
616 struct pmc_ctx {
617 /* alloc, free, and read operations must own the lock */
618 struct mutex lock;
619 struct vring_tx_desc *pring_va;
620 dma_addr_t pring_pa;
621 struct desc_alloc_info *descriptors;
622 int last_cmd_status;
623 int num_descriptors;
624 int descriptor_size;
625 };
626
627 struct wil_halp {
628 struct mutex lock; /* protect halp ref_cnt */
629 unsigned int ref_cnt;
630 struct completion comp;
631 };
632
633 struct wil_blob_wrapper {
634 struct wil6210_priv *wil;
635 struct debugfs_blob_wrapper blob;
636 };
637
638 #define WIL_LED_MAX_ID (2)
639 #define WIL_LED_INVALID_ID (0xF)
640 #define WIL_LED_BLINK_ON_SLOW_MS (300)
641 #define WIL_LED_BLINK_OFF_SLOW_MS (300)
642 #define WIL_LED_BLINK_ON_MED_MS (200)
643 #define WIL_LED_BLINK_OFF_MED_MS (200)
644 #define WIL_LED_BLINK_ON_FAST_MS (100)
645 #define WIL_LED_BLINK_OFF_FAST_MS (100)
646 enum {
647 WIL_LED_TIME_SLOW = 0,
648 WIL_LED_TIME_MED,
649 WIL_LED_TIME_FAST,
650 WIL_LED_TIME_LAST,
651 };
652
653 struct blink_on_off_time {
654 u32 on_ms;
655 u32 off_ms;
656 };
657
658 struct wil_debugfs_iomem_data {
659 void *offset;
660 struct wil6210_priv *wil;
661 };
662
663 struct wil_debugfs_data {
664 struct wil_debugfs_iomem_data *data_arr;
665 int iomem_data_count;
666 };
667
668 extern struct blink_on_off_time led_blink_time[WIL_LED_TIME_LAST];
669 extern u8 led_id;
670 extern u8 led_polarity;
671
672 struct wil6210_priv {
673 struct pci_dev *pdev;
674 u32 bar_size;
675 struct wireless_dev *wdev;
676 void __iomem *csr;
677 DECLARE_BITMAP(status, wil_status_last);
678 u8 fw_version[ETHTOOL_FWVERS_LEN];
679 u32 hw_version;
680 u8 chip_revision;
681 const char *hw_name;
682 const char *wil_fw_name;
683 char *board_file;
684 u32 brd_file_addr;
685 u32 brd_file_max_size;
686 DECLARE_BITMAP(hw_capa, hw_capa_last);
687 DECLARE_BITMAP(fw_capabilities, WMI_FW_CAPABILITY_MAX);
688 DECLARE_BITMAP(platform_capa, WIL_PLATFORM_CAPA_MAX);
689 u8 n_mids; /* number of additional MIDs as reported by FW */
690 u32 recovery_count; /* num of FW recovery attempts in a short time */
691 u32 recovery_state; /* FW recovery state machine */
692 unsigned long last_fw_recovery; /* jiffies of last fw recovery */
693 wait_queue_head_t wq; /* for all wait_event() use */
694 /* profile */
695 struct cfg80211_chan_def monitor_chandef;
696 u32 monitor_flags;
697 u32 privacy; /* secure connection? */
698 u8 hidden_ssid; /* relevant in AP mode */
699 u16 channel; /* relevant in AP mode */
700 int sinfo_gen;
701 u32 ap_isolate; /* no intra-BSS communication */
702 struct cfg80211_bss *bss; /* connected bss, relevant in STA mode */
703 int locally_generated_disc; /* relevant in STA mode */
704 /* interrupt moderation */
705 u32 tx_max_burst_duration;
706 u32 tx_interframe_timeout;
707 u32 rx_max_burst_duration;
708 u32 rx_interframe_timeout;
709 /* cached ISR registers */
710 u32 isr_misc;
711 /* mailbox related */
712 struct mutex wmi_mutex;
713 struct wil6210_mbox_ctl mbox_ctl;
714 struct completion wmi_ready;
715 struct completion wmi_call;
716 u16 wmi_seq;
717 u16 reply_id; /**< wait for this WMI event */
718 void *reply_buf;
719 u16 reply_size;
720 struct workqueue_struct *wmi_wq; /* for deferred calls */
721 struct work_struct wmi_event_worker;
722 struct workqueue_struct *wq_service;
723 struct work_struct disconnect_worker;
724 struct work_struct fw_error_worker; /* for FW error recovery */
725 struct timer_list connect_timer;
726 struct timer_list scan_timer; /* detect scan timeout */
727 struct list_head pending_wmi_ev;
728 /*
729 * protect pending_wmi_ev
730 * - fill in IRQ from wil6210_irq_misc,
731 * - consumed in thread by wmi_event_worker
732 */
733 spinlock_t wmi_ev_lock;
734 spinlock_t net_queue_lock; /* guarding stop/wake netif queue */
735 int net_queue_stopped; /* netif_tx_stop_all_queues invoked */
736 struct napi_struct napi_rx;
737 struct napi_struct napi_tx;
738 /* keep alive */
739 struct list_head probe_client_pending;
740 struct mutex probe_client_mutex; /* protect @probe_client_pending */
741 struct work_struct probe_client_worker;
742 /* DMA related */
743 struct vring vring_rx;
744 unsigned int rx_buf_len;
745 struct vring vring_tx[WIL6210_MAX_TX_RINGS];
746 struct vring_tx_data vring_tx_data[WIL6210_MAX_TX_RINGS];
747 u8 vring2cid_tid[WIL6210_MAX_TX_RINGS][2]; /* [0] - CID, [1] - TID */
748 struct wil_sta_info sta[WIL6210_MAX_CID];
749 int bcast_vring;
750 u32 vring_idle_trsh; /* HW fetches up to 16 descriptors at once */
751 u32 dma_addr_size; /* indicates dma addr size */
752 /* scan */
753 struct cfg80211_scan_request *scan_request;
754
755 struct mutex mutex; /* for wil6210_priv access in wil_{up|down} */
756 /* statistics */
757 atomic_t isr_count_rx, isr_count_tx;
758 /* debugfs */
759 struct dentry *debug;
760 struct wil_blob_wrapper blobs[MAX_FW_MAPPING_TABLE_SIZE];
761 u8 discovery_mode;
762 u8 abft_len;
763 u8 wakeup_trigger;
764 struct wil_suspend_stats suspend_stats;
765 struct wil_debugfs_data dbg_data;
766
767 void *platform_handle;
768 struct wil_platform_ops platform_ops;
769 bool keep_radio_on_during_sleep;
770
771 struct pmc_ctx pmc;
772
773 bool pbss;
774
775 struct wil_p2p_info p2p;
776
777 /* P2P_DEVICE vif */
778 struct wireless_dev *p2p_wdev;
779 struct mutex p2p_wdev_mutex; /* protect @p2p_wdev and @scan_request */
780 struct wireless_dev *radio_wdev;
781
782 /* High Access Latency Policy voting */
783 struct wil_halp halp;
784
785 enum wmi_ps_profile_type ps_profile;
786
787 int fw_calib_result;
788
789 struct notifier_block pm_notify;
790
791 bool suspend_resp_rcvd;
792 bool suspend_resp_comp;
793 u32 bus_request_kbps;
794 u32 bus_request_kbps_pre_suspend;
795
796 u32 rgf_fw_assert_code_addr;
797 u32 rgf_ucode_assert_code_addr;
798 u32 iccm_base;
799 };
800
801 #define wil_to_wiphy(i) (i->wdev->wiphy)
802 #define wil_to_dev(i) (wiphy_dev(wil_to_wiphy(i)))
803 #define wiphy_to_wil(w) (struct wil6210_priv *)(wiphy_priv(w))
804 #define wil_to_wdev(i) (i->wdev)
805 #define wdev_to_wil(w) (struct wil6210_priv *)(wdev_priv(w))
806 #define wil_to_ndev(i) (wil_to_wdev(i)->netdev)
807 #define ndev_to_wil(n) (wdev_to_wil(n->ieee80211_ptr))
808
809 __printf(2, 3)
810 void wil_dbg_trace(struct wil6210_priv *wil, const char *fmt, ...);
811 __printf(2, 3)
812 void __wil_err(struct wil6210_priv *wil, const char *fmt, ...);
813 __printf(2, 3)
814 void __wil_err_ratelimited(struct wil6210_priv *wil, const char *fmt, ...);
815 __printf(2, 3)
816 void __wil_info(struct wil6210_priv *wil, const char *fmt, ...);
817 __printf(2, 3)
818 void wil_dbg_ratelimited(const struct wil6210_priv *wil, const char *fmt, ...);
819 #define wil_dbg(wil, fmt, arg...) do { \
820 netdev_dbg(wil_to_ndev(wil), fmt, ##arg); \
821 wil_dbg_trace(wil, fmt, ##arg); \
822 } while (0)
823
824 #define wil_dbg_irq(wil, fmt, arg...) wil_dbg(wil, "DBG[ IRQ]" fmt, ##arg)
825 #define wil_dbg_txrx(wil, fmt, arg...) wil_dbg(wil, "DBG[TXRX]" fmt, ##arg)
826 #define wil_dbg_wmi(wil, fmt, arg...) wil_dbg(wil, "DBG[ WMI]" fmt, ##arg)
827 #define wil_dbg_misc(wil, fmt, arg...) wil_dbg(wil, "DBG[MISC]" fmt, ##arg)
828 #define wil_dbg_pm(wil, fmt, arg...) wil_dbg(wil, "DBG[ PM ]" fmt, ##arg)
829 #define wil_err(wil, fmt, arg...) __wil_err(wil, "%s: " fmt, __func__, ##arg)
830 #define wil_info(wil, fmt, arg...) __wil_info(wil, "%s: " fmt, __func__, ##arg)
831 #define wil_err_ratelimited(wil, fmt, arg...) \
832 __wil_err_ratelimited(wil, "%s: " fmt, __func__, ##arg)
833
834 /* target operations */
835 /* register read */
836 static inline u32 wil_r(struct wil6210_priv *wil, u32 reg)
837 {
838 return readl(wil->csr + HOSTADDR(reg));
839 }
840
841 /* register write. wmb() to make sure it is completed */
842 static inline void wil_w(struct wil6210_priv *wil, u32 reg, u32 val)
843 {
844 writel(val, wil->csr + HOSTADDR(reg));
845 wmb(); /* wait for write to propagate to the HW */
846 }
847
848 /* register set = read, OR, write */
849 static inline void wil_s(struct wil6210_priv *wil, u32 reg, u32 val)
850 {
851 wil_w(wil, reg, wil_r(wil, reg) | val);
852 }
853
854 /* register clear = read, AND with inverted, write */
855 static inline void wil_c(struct wil6210_priv *wil, u32 reg, u32 val)
856 {
857 wil_w(wil, reg, wil_r(wil, reg) & ~val);
858 }
859
860 #if defined(CONFIG_DYNAMIC_DEBUG)
861 #define wil_hex_dump_txrx(prefix_str, prefix_type, rowsize, \
862 groupsize, buf, len, ascii) \
863 print_hex_dump_debug("DBG[TXRX]" prefix_str,\
864 prefix_type, rowsize, \
865 groupsize, buf, len, ascii)
866
867 #define wil_hex_dump_wmi(prefix_str, prefix_type, rowsize, \
868 groupsize, buf, len, ascii) \
869 print_hex_dump_debug("DBG[ WMI]" prefix_str,\
870 prefix_type, rowsize, \
871 groupsize, buf, len, ascii)
872
873 #define wil_hex_dump_misc(prefix_str, prefix_type, rowsize, \
874 groupsize, buf, len, ascii) \
875 print_hex_dump_debug("DBG[MISC]" prefix_str,\
876 prefix_type, rowsize, \
877 groupsize, buf, len, ascii)
878 #else /* defined(CONFIG_DYNAMIC_DEBUG) */
879 static inline
880 void wil_hex_dump_txrx(const char *prefix_str, int prefix_type, int rowsize,
881 int groupsize, const void *buf, size_t len, bool ascii)
882 {
883 }
884
885 static inline
886 void wil_hex_dump_wmi(const char *prefix_str, int prefix_type, int rowsize,
887 int groupsize, const void *buf, size_t len, bool ascii)
888 {
889 }
890
891 static inline
892 void wil_hex_dump_misc(const char *prefix_str, int prefix_type, int rowsize,
893 int groupsize, const void *buf, size_t len, bool ascii)
894 {
895 }
896 #endif /* defined(CONFIG_DYNAMIC_DEBUG) */
897
898 void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src,
899 size_t count);
900 void wil_memcpy_toio_32(volatile void __iomem *dst, const void *src,
901 size_t count);
902
903 void *wil_if_alloc(struct device *dev);
904 void wil_if_free(struct wil6210_priv *wil);
905 int wil_if_add(struct wil6210_priv *wil);
906 void wil_if_remove(struct wil6210_priv *wil);
907 int wil_priv_init(struct wil6210_priv *wil);
908 void wil_priv_deinit(struct wil6210_priv *wil);
909 int wil_ps_update(struct wil6210_priv *wil,
910 enum wmi_ps_profile_type ps_profile);
911 int wil_reset(struct wil6210_priv *wil, bool no_fw);
912 void wil_fw_error_recovery(struct wil6210_priv *wil);
913 void wil_set_recovery_state(struct wil6210_priv *wil, int state);
914 bool wil_is_recovery_blocked(struct wil6210_priv *wil);
915 int wil_up(struct wil6210_priv *wil);
916 int __wil_up(struct wil6210_priv *wil);
917 int wil_down(struct wil6210_priv *wil);
918 int __wil_down(struct wil6210_priv *wil);
919 void wil_refresh_fw_capabilities(struct wil6210_priv *wil);
920 void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r);
921 int wil_find_cid(struct wil6210_priv *wil, const u8 *mac);
922 void wil_set_ethtoolops(struct net_device *ndev);
923
924 struct fw_map *wil_find_fw_mapping(const char *section);
925 void __iomem *wmi_buffer_block(struct wil6210_priv *wil, __le32 ptr, u32 size);
926 void __iomem *wmi_buffer(struct wil6210_priv *wil, __le32 ptr);
927 void __iomem *wmi_addr(struct wil6210_priv *wil, u32 ptr);
928 int wmi_read_hdr(struct wil6210_priv *wil, __le32 ptr,
929 struct wil6210_mbox_hdr *hdr);
930 int wmi_send(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len);
931 void wmi_recv_cmd(struct wil6210_priv *wil);
932 int wmi_call(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len,
933 u16 reply_id, void *reply, u8 reply_size, int to_msec);
934 void wmi_event_worker(struct work_struct *work);
935 void wmi_event_flush(struct wil6210_priv *wil);
936 int wmi_set_ssid(struct wil6210_priv *wil, u8 ssid_len, const void *ssid);
937 int wmi_get_ssid(struct wil6210_priv *wil, u8 *ssid_len, void *ssid);
938 int wmi_set_channel(struct wil6210_priv *wil, int channel);
939 int wmi_get_channel(struct wil6210_priv *wil, int *channel);
940 int wmi_del_cipher_key(struct wil6210_priv *wil, u8 key_index,
941 const void *mac_addr, int key_usage);
942 int wmi_add_cipher_key(struct wil6210_priv *wil, u8 key_index,
943 const void *mac_addr, int key_len, const void *key,
944 int key_usage);
945 int wmi_echo(struct wil6210_priv *wil);
946 int wmi_set_ie(struct wil6210_priv *wil, u8 type, u16 ie_len, const void *ie);
947 int wmi_rx_chain_add(struct wil6210_priv *wil, struct vring *vring);
948 int wmi_rxon(struct wil6210_priv *wil, bool on);
949 int wmi_get_temperature(struct wil6210_priv *wil, u32 *t_m, u32 *t_r);
950 int wmi_disconnect_sta(struct wil6210_priv *wil, const u8 *mac,
951 u16 reason, bool full_disconnect, bool del_sta);
952 int wmi_addba(struct wil6210_priv *wil, u8 ringid, u8 size, u16 timeout);
953 int wmi_delba_tx(struct wil6210_priv *wil, u8 ringid, u16 reason);
954 int wmi_delba_rx(struct wil6210_priv *wil, u8 cidxtid, u16 reason);
955 int wmi_addba_rx_resp(struct wil6210_priv *wil, u8 cid, u8 tid, u8 token,
956 u16 status, bool amsdu, u16 agg_wsize, u16 timeout);
957 int wmi_ps_dev_profile_cfg(struct wil6210_priv *wil,
958 enum wmi_ps_profile_type ps_profile);
959 int wmi_set_mgmt_retry(struct wil6210_priv *wil, u8 retry_short);
960 int wmi_get_mgmt_retry(struct wil6210_priv *wil, u8 *retry_short);
961 int wmi_new_sta(struct wil6210_priv *wil, const u8 *mac, u8 aid);
962 int wil_addba_rx_request(struct wil6210_priv *wil, u8 cidxtid,
963 u8 dialog_token, __le16 ba_param_set,
964 __le16 ba_timeout, __le16 ba_seq_ctrl);
965 int wil_addba_tx_request(struct wil6210_priv *wil, u8 ringid, u16 wsize);
966
967 void wil6210_clear_irq(struct wil6210_priv *wil);
968 int wil6210_init_irq(struct wil6210_priv *wil, int irq, bool use_msi);
969 void wil6210_fini_irq(struct wil6210_priv *wil, int irq);
970 void wil_mask_irq(struct wil6210_priv *wil);
971 void wil_unmask_irq(struct wil6210_priv *wil);
972 void wil_configure_interrupt_moderation(struct wil6210_priv *wil);
973 void wil_disable_irq(struct wil6210_priv *wil);
974 void wil_enable_irq(struct wil6210_priv *wil);
975 void wil6210_mask_halp(struct wil6210_priv *wil);
976
977 /* P2P */
978 bool wil_p2p_is_social_scan(struct cfg80211_scan_request *request);
979 void wil_p2p_discovery_timer_fn(struct timer_list *t);
980 int wil_p2p_search(struct wil6210_priv *wil,
981 struct cfg80211_scan_request *request);
982 int wil_p2p_listen(struct wil6210_priv *wil, struct wireless_dev *wdev,
983 unsigned int duration, struct ieee80211_channel *chan,
984 u64 *cookie);
985 u8 wil_p2p_stop_discovery(struct wil6210_priv *wil);
986 int wil_p2p_cancel_listen(struct wil6210_priv *wil, u64 cookie);
987 void wil_p2p_listen_expired(struct work_struct *work);
988 void wil_p2p_search_expired(struct work_struct *work);
989 void wil_p2p_stop_radio_operations(struct wil6210_priv *wil);
990 void wil_p2p_delayed_listen_work(struct work_struct *work);
991
992 /* WMI for P2P */
993 int wmi_p2p_cfg(struct wil6210_priv *wil, int channel, int bi);
994 int wmi_start_listen(struct wil6210_priv *wil);
995 int wmi_start_search(struct wil6210_priv *wil);
996 int wmi_stop_discovery(struct wil6210_priv *wil);
997
998 int wil_cfg80211_mgmt_tx(struct wiphy *wiphy, struct wireless_dev *wdev,
999 struct cfg80211_mgmt_tx_params *params,
1000 u64 *cookie);
1001
1002 #if defined(CONFIG_WIL6210_DEBUGFS)
1003 int wil6210_debugfs_init(struct wil6210_priv *wil);
1004 void wil6210_debugfs_remove(struct wil6210_priv *wil);
1005 #else
1006 static inline int wil6210_debugfs_init(struct wil6210_priv *wil) { return 0; }
1007 static inline void wil6210_debugfs_remove(struct wil6210_priv *wil) {}
1008 #endif
1009
1010 int wil_cid_fill_sinfo(struct wil6210_priv *wil, int cid,
1011 struct station_info *sinfo);
1012
1013 struct wireless_dev *wil_cfg80211_init(struct device *dev);
1014 void wil_wdev_free(struct wil6210_priv *wil);
1015 void wil_p2p_wdev_free(struct wil6210_priv *wil);
1016
1017 int wmi_set_mac_address(struct wil6210_priv *wil, void *addr);
1018 int wmi_pcp_start(struct wil6210_priv *wil, int bi, u8 wmi_nettype,
1019 u8 chan, u8 hidden_ssid, u8 is_go);
1020 int wmi_pcp_stop(struct wil6210_priv *wil);
1021 int wmi_led_cfg(struct wil6210_priv *wil, bool enable);
1022 int wmi_abort_scan(struct wil6210_priv *wil);
1023 void wil_abort_scan(struct wil6210_priv *wil, bool sync);
1024 void wil6210_bus_request(struct wil6210_priv *wil, u32 kbps);
1025 void wil6210_disconnect(struct wil6210_priv *wil, const u8 *bssid,
1026 u16 reason_code, bool from_event);
1027 void wil_probe_client_flush(struct wil6210_priv *wil);
1028 void wil_probe_client_worker(struct work_struct *work);
1029
1030 int wil_rx_init(struct wil6210_priv *wil, u16 size);
1031 void wil_rx_fini(struct wil6210_priv *wil);
1032
1033 /* TX API */
1034 int wil_vring_init_tx(struct wil6210_priv *wil, int id, int size,
1035 int cid, int tid);
1036 void wil_vring_fini_tx(struct wil6210_priv *wil, int id);
1037 int wil_tx_init(struct wil6210_priv *wil, int cid);
1038 int wil_vring_init_bcast(struct wil6210_priv *wil, int id, int size);
1039 int wil_bcast_init(struct wil6210_priv *wil);
1040 void wil_bcast_fini(struct wil6210_priv *wil);
1041
1042 void wil_update_net_queues(struct wil6210_priv *wil, struct vring *vring,
1043 bool should_stop);
1044 void wil_update_net_queues_bh(struct wil6210_priv *wil, struct vring *vring,
1045 bool check_stop);
1046 netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev);
1047 int wil_tx_complete(struct wil6210_priv *wil, int ringid);
1048 void wil6210_unmask_irq_tx(struct wil6210_priv *wil);
1049
1050 /* RX API */
1051 void wil_rx_handle(struct wil6210_priv *wil, int *quota);
1052 void wil6210_unmask_irq_rx(struct wil6210_priv *wil);
1053
1054 int wil_iftype_nl2wmi(enum nl80211_iftype type);
1055
1056 int wil_request_firmware(struct wil6210_priv *wil, const char *name,
1057 bool load);
1058 int wil_request_board(struct wil6210_priv *wil, const char *name);
1059 bool wil_fw_verify_file_exists(struct wil6210_priv *wil, const char *name);
1060
1061 void wil_pm_runtime_allow(struct wil6210_priv *wil);
1062 void wil_pm_runtime_forbid(struct wil6210_priv *wil);
1063 int wil_pm_runtime_get(struct wil6210_priv *wil);
1064 void wil_pm_runtime_put(struct wil6210_priv *wil);
1065
1066 int wil_can_suspend(struct wil6210_priv *wil, bool is_runtime);
1067 int wil_suspend(struct wil6210_priv *wil, bool is_runtime, bool keep_radio_on);
1068 int wil_resume(struct wil6210_priv *wil, bool is_runtime, bool keep_radio_on);
1069 bool wil_is_wmi_idle(struct wil6210_priv *wil);
1070 int wmi_resume(struct wil6210_priv *wil);
1071 int wmi_suspend(struct wil6210_priv *wil);
1072 bool wil_is_tx_idle(struct wil6210_priv *wil);
1073 bool wil_is_rx_idle(struct wil6210_priv *wil);
1074
1075 int wil_fw_copy_crash_dump(struct wil6210_priv *wil, void *dest, u32 size);
1076 void wil_fw_core_dump(struct wil6210_priv *wil);
1077
1078 void wil_halp_vote(struct wil6210_priv *wil);
1079 void wil_halp_unvote(struct wil6210_priv *wil);
1080 void wil6210_set_halp(struct wil6210_priv *wil);
1081 void wil6210_clear_halp(struct wil6210_priv *wil);
1082
1083 int wmi_start_sched_scan(struct wil6210_priv *wil,
1084 struct cfg80211_sched_scan_request *request);
1085 int wmi_stop_sched_scan(struct wil6210_priv *wil);
1086
1087 #endif /* __WIL6210_H__ */
Linux with added FPC-III support