drivers/pci/pci.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef DRIVERS_PCI_H
   3 #define DRIVERS_PCI_H
   4
   5 #define PCI_FIND_CAP_TTL        48
   6
   7 #define PCI_VSEC_ID_INTEL_TBT   0x1234  /* Thunderbolt */
   8
   9 extern const unsigned char pcie_link_speed[];
  10
  11 bool pcie_cap_has_lnkctl(const struct pci_dev *dev);
  12
  13 /* Functions internal to the PCI core code */
  14
  15 int pci_create_sysfs_dev_files(struct pci_dev *pdev);
  16 void pci_remove_sysfs_dev_files(struct pci_dev *pdev);
  17 #if !defined(CONFIG_DMI) && !defined(CONFIG_ACPI)
  18 static inline void pci_create_firmware_label_files(struct pci_dev *pdev)
  19 { return; }
  20 static inline void pci_remove_firmware_label_files(struct pci_dev *pdev)
  21 { return; }
  22 #else
  23 void pci_create_firmware_label_files(struct pci_dev *pdev);
  24 void pci_remove_firmware_label_files(struct pci_dev *pdev);
  25 #endif
  26 void pci_cleanup_rom(struct pci_dev *dev);
  27
  28 enum pci_mmap_api {
  29         PCI_MMAP_SYSFS, /* mmap on /sys/bus/pci/devices/<BDF>/resource<N> */
  30         PCI_MMAP_PROCFS /* mmap on /proc/bus/pci/<BDF> */
  31 };
  32 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vmai,
  33                   enum pci_mmap_api mmap_api);
  34
  35 int pci_probe_reset_function(struct pci_dev *dev);
  36
  37 /**
  38  * struct pci_platform_pm_ops - Firmware PM callbacks
  39  *
  40  * @is_manageable: returns 'true' if given device is power manageable by the
  41  *                 platform firmware
  42  *
  43  * @set_state: invokes the platform firmware to set the device's power state
  44  *
  45  * @get_state: queries the platform firmware for a device's current power state
  46  *
  47  * @choose_state: returns PCI power state of given device preferred by the
  48  *                platform; to be used during system-wide transitions from a
  49  *                sleeping state to the working state and vice versa
  50  *
  51  * @set_wakeup: enables/disables wakeup capability for the device
  52  *
  53  * @need_resume: returns 'true' if the given device (which is currently
  54  *               suspended) needs to be resumed to be configured for system
  55  *               wakeup.
  56  *
  57  * If given platform is generally capable of power managing PCI devices, all of
  58  * these callbacks are mandatory.
  59  */
  60 struct pci_platform_pm_ops {
  61         bool (*is_manageable)(struct pci_dev *dev);
  62         int (*set_state)(struct pci_dev *dev, pci_power_t state);
  63         pci_power_t (*get_state)(struct pci_dev *dev);
  64         pci_power_t (*choose_state)(struct pci_dev *dev);
  65         int (*set_wakeup)(struct pci_dev *dev, bool enable);
  66         bool (*need_resume)(struct pci_dev *dev);
  67 };
  68
  69 int pci_set_platform_pm(const struct pci_platform_pm_ops *ops);
  70 void pci_update_current_state(struct pci_dev *dev, pci_power_t state);
  71 void pci_power_up(struct pci_dev *dev);
  72 void pci_disable_enabled_device(struct pci_dev *dev);
  73 int pci_finish_runtime_suspend(struct pci_dev *dev);
  74 int __pci_pme_wakeup(struct pci_dev *dev, void *ign);
  75 void pci_pme_restore(struct pci_dev *dev);
  76 bool pci_dev_keep_suspended(struct pci_dev *dev);
  77 void pci_dev_complete_resume(struct pci_dev *pci_dev);
  78 void pci_config_pm_runtime_get(struct pci_dev *dev);
  79 void pci_config_pm_runtime_put(struct pci_dev *dev);
  80 void pci_pm_init(struct pci_dev *dev);
  81 void pci_ea_init(struct pci_dev *dev);
  82 void pci_allocate_cap_save_buffers(struct pci_dev *dev);
  83 void pci_free_cap_save_buffers(struct pci_dev *dev);
  84 bool pci_bridge_d3_possible(struct pci_dev *dev);
  85 void pci_bridge_d3_update(struct pci_dev *dev);
  86
  87 static inline void pci_wakeup_event(struct pci_dev *dev)
  88 {
  89         /* Wait 100 ms before the system can be put into a sleep state. */
  90         pm_wakeup_event(&dev->dev, 100);
  91 }
  92
  93 static inline bool pci_has_subordinate(struct pci_dev *pci_dev)
  94 {
  95         return !!(pci_dev->subordinate);
  96 }
  97
  98 static inline bool pci_power_manageable(struct pci_dev *pci_dev)
  99 {
 100         /*
 101          * Currently we allow normal PCI devices and PCI bridges transition
 102          * into D3 if their bridge_d3 is set.
 103          */
 104         return !pci_has_subordinate(pci_dev) || pci_dev->bridge_d3;
 105 }
 106
 107 struct pci_vpd_ops {
 108         ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
 109         ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
 110         int (*set_size)(struct pci_dev *dev, size_t len);
 111 };
 112
 113 struct pci_vpd {
 114         const struct pci_vpd_ops *ops;
 115         struct bin_attribute *attr;     /* Descriptor for sysfs VPD entry */
 116         struct mutex    lock;
 117         unsigned int    len;
 118         u16             flag;
 119         u8              cap;
 120         u8              busy:1;
 121         u8              valid:1;
 122 };
 123
 124 int pci_vpd_init(struct pci_dev *dev);
 125 void pci_vpd_release(struct pci_dev *dev);
 126
 127 /* PCI /proc functions */
 128 #ifdef CONFIG_PROC_FS
 129 int pci_proc_attach_device(struct pci_dev *dev);
 130 int pci_proc_detach_device(struct pci_dev *dev);
 131 int pci_proc_detach_bus(struct pci_bus *bus);
 132 #else
 133 static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; }
 134 static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; }
 135 static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; }
 136 #endif
 137
 138 /* Functions for PCI Hotplug drivers to use */
 139 int pci_hp_add_bridge(struct pci_dev *dev);
 140
 141 #ifdef HAVE_PCI_LEGACY
 142 void pci_create_legacy_files(struct pci_bus *bus);
 143 void pci_remove_legacy_files(struct pci_bus *bus);
 144 #else
 145 static inline void pci_create_legacy_files(struct pci_bus *bus) { return; }
 146 static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; }
 147 #endif
 148
 149 /* Lock for read/write access to pci device and bus lists */
 150 extern struct rw_semaphore pci_bus_sem;
 151
 152 extern raw_spinlock_t pci_lock;
 153
 154 extern unsigned int pci_pm_d3_delay;
 155
 156 #ifdef CONFIG_PCI_MSI
 157 void pci_no_msi(void);
 158 #else
 159 static inline void pci_no_msi(void) { }
 160 #endif
 161
 162 static inline void pci_msi_set_enable(struct pci_dev *dev, int enable)
 163 {
 164         u16 control;
 165
 166         pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
 167         control &= ~PCI_MSI_FLAGS_ENABLE;
 168         if (enable)
 169                 control |= PCI_MSI_FLAGS_ENABLE;
 170         pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control);
 171 }
 172
 173 static inline void pci_msix_clear_and_set_ctrl(struct pci_dev *dev, u16 clear, u16 set)
 174 {
 175         u16 ctrl;
 176
 177         pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &ctrl);
 178         ctrl &= ~clear;
 179         ctrl |= set;
 180         pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, ctrl);
 181 }
 182
 183 void pci_realloc_get_opt(char *);
 184
 185 static inline int pci_no_d1d2(struct pci_dev *dev)
 186 {
 187         unsigned int parent_dstates = 0;
 188
 189         if (dev->bus->self)
 190                 parent_dstates = dev->bus->self->no_d1d2;
 191         return (dev->no_d1d2 || parent_dstates);
 192
 193 }
 194 extern const struct attribute_group *pci_dev_groups[];
 195 extern const struct attribute_group *pcibus_groups[];
 196 extern const struct device_type pci_dev_type;
 197 extern const struct attribute_group *pci_bus_groups[];
 198
 199
 200 /**
 201  * pci_match_one_device - Tell if a PCI device structure has a matching
 202  *                        PCI device id structure
 203  * @id: single PCI device id structure to match
 204  * @dev: the PCI device structure to match against
 205  *
 206  * Returns the matching pci_device_id structure or %NULL if there is no match.
 207  */
 208 static inline const struct pci_device_id *
 209 pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev)
 210 {
 211         if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) &&
 212             (id->device == PCI_ANY_ID || id->device == dev->device) &&
 213             (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) &&
 214             (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) &&
 215             !((id->class ^ dev->class) & id->class_mask))
 216                 return id;
 217         return NULL;
 218 }
 219
 220 /* PCI slot sysfs helper code */
 221 #define to_pci_slot(s) container_of(s, struct pci_slot, kobj)
 222
 223 extern struct kset *pci_slots_kset;
 224
 225 struct pci_slot_attribute {
 226         struct attribute attr;
 227         ssize_t (*show)(struct pci_slot *, char *);
 228         ssize_t (*store)(struct pci_slot *, const char *, size_t);
 229 };
 230 #define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr)
 231
 232 enum pci_bar_type {
 233         pci_bar_unknown,        /* Standard PCI BAR probe */
 234         pci_bar_io,             /* An I/O port BAR */
 235         pci_bar_mem32,          /* A 32-bit memory BAR */
 236         pci_bar_mem64,          /* A 64-bit memory BAR */
 237 };
 238
 239 int pci_configure_extended_tags(struct pci_dev *dev, void *ign);
 240 bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *pl,
 241                                 int crs_timeout);
 242 int pci_setup_device(struct pci_dev *dev);
 243 int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
 244                     struct resource *res, unsigned int reg);
 245 void pci_configure_ari(struct pci_dev *dev);
 246 void __pci_bus_size_bridges(struct pci_bus *bus,
 247                         struct list_head *realloc_head);
 248 void __pci_bus_assign_resources(const struct pci_bus *bus,
 249                                 struct list_head *realloc_head,
 250                                 struct list_head *fail_head);
 251 bool pci_bus_clip_resource(struct pci_dev *dev, int idx);
 252
 253 void pci_reassigndev_resource_alignment(struct pci_dev *dev);
 254 void pci_disable_bridge_window(struct pci_dev *dev);
 255
 256 /* Single Root I/O Virtualization */
 257 struct pci_sriov {
 258         int             pos;            /* Capability position */
 259         int             nres;           /* Number of resources */
 260         u32             cap;            /* SR-IOV Capabilities */
 261         u16             ctrl;           /* SR-IOV Control */
 262         u16             total_VFs;      /* Total VFs associated with the PF */
 263         u16             initial_VFs;    /* Initial VFs associated with the PF */
 264         u16             num_VFs;        /* Number of VFs available */
 265         u16             offset;         /* First VF Routing ID offset */
 266         u16             stride;         /* Following VF stride */
 267         u16             vf_device;      /* VF device ID */
 268         u32             pgsz;           /* Page size for BAR alignment */
 269         u8              link;           /* Function Dependency Link */
 270         u8              max_VF_buses;   /* Max buses consumed by VFs */
 271         u16             driver_max_VFs; /* Max num VFs driver supports */
 272         struct pci_dev  *dev;           /* Lowest numbered PF */
 273         struct pci_dev  *self;          /* This PF */
 274         resource_size_t barsz[PCI_SRIOV_NUM_BARS];      /* VF BAR size */
 275         bool            drivers_autoprobe; /* Auto probing of VFs by driver */
 276 };
 277
 278 /* pci_dev priv_flags */
 279 #define PCI_DEV_DISCONNECTED 0
 280
 281 static inline int pci_dev_set_disconnected(struct pci_dev *dev, void *unused)
 282 {
 283         set_bit(PCI_DEV_DISCONNECTED, &dev->priv_flags);
 284         return 0;
 285 }
 286
 287 static inline bool pci_dev_is_disconnected(const struct pci_dev *dev)
 288 {
 289         return test_bit(PCI_DEV_DISCONNECTED, &dev->priv_flags);
 290 }
 291
 292 #ifdef CONFIG_PCI_ATS
 293 void pci_restore_ats_state(struct pci_dev *dev);
 294 #else
 295 static inline void pci_restore_ats_state(struct pci_dev *dev)
 296 {
 297 }
 298 #endif /* CONFIG_PCI_ATS */
 299
 300 #ifdef CONFIG_PCI_IOV
 301 int pci_iov_init(struct pci_dev *dev);
 302 void pci_iov_release(struct pci_dev *dev);
 303 void pci_iov_update_resource(struct pci_dev *dev, int resno);
 304 resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno);
 305 void pci_restore_iov_state(struct pci_dev *dev);
 306 int pci_iov_bus_range(struct pci_bus *bus);
 307
 308 #else
 309 static inline int pci_iov_init(struct pci_dev *dev)
 310 {
 311         return -ENODEV;
 312 }
 313 static inline void pci_iov_release(struct pci_dev *dev)
 314
 315 {
 316 }
 317 static inline void pci_restore_iov_state(struct pci_dev *dev)
 318 {
 319 }
 320 static inline int pci_iov_bus_range(struct pci_bus *bus)
 321 {
 322         return 0;
 323 }
 324
 325 #endif /* CONFIG_PCI_IOV */
 326
 327 unsigned long pci_cardbus_resource_alignment(struct resource *);
 328
 329 static inline resource_size_t pci_resource_alignment(struct pci_dev *dev,
 330                                                      struct resource *res)
 331 {
 332 #ifdef CONFIG_PCI_IOV
 333         int resno = res - dev->resource;
 334
 335         if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END)
 336                 return pci_sriov_resource_alignment(dev, resno);
 337 #endif
 338         if (dev->class >> 8 == PCI_CLASS_BRIDGE_CARDBUS)
 339                 return pci_cardbus_resource_alignment(res);
 340         return resource_alignment(res);
 341 }
 342
 343 void pci_enable_acs(struct pci_dev *dev);
 344
 345 #ifdef CONFIG_PCIEASPM
 346 void pcie_aspm_init_link_state(struct pci_dev *pdev);
 347 void pcie_aspm_exit_link_state(struct pci_dev *pdev);
 348 void pcie_aspm_pm_state_change(struct pci_dev *pdev);
 349 void pcie_aspm_powersave_config_link(struct pci_dev *pdev);
 350 #else
 351 static inline void pcie_aspm_init_link_state(struct pci_dev *pdev) { }
 352 static inline void pcie_aspm_exit_link_state(struct pci_dev *pdev) { }
 353 static inline void pcie_aspm_pm_state_change(struct pci_dev *pdev) { }
 354 static inline void pcie_aspm_powersave_config_link(struct pci_dev *pdev) { }
 355 #endif
 356
 357 #ifdef CONFIG_PCIEASPM_DEBUG
 358 void pcie_aspm_create_sysfs_dev_files(struct pci_dev *pdev);
 359 void pcie_aspm_remove_sysfs_dev_files(struct pci_dev *pdev);
 360 #else
 361 static inline void pcie_aspm_create_sysfs_dev_files(struct pci_dev *pdev) { }
 362 static inline void pcie_aspm_remove_sysfs_dev_files(struct pci_dev *pdev) { }
 363 #endif
 364
 365 #ifdef CONFIG_PCIE_PTM
 366 void pci_ptm_init(struct pci_dev *dev);
 367 #else
 368 static inline void pci_ptm_init(struct pci_dev *dev) { }
 369 #endif
 370
 371 struct pci_dev_reset_methods {
 372         u16 vendor;
 373         u16 device;
 374         int (*reset)(struct pci_dev *dev, int probe);
 375 };
 376
 377 #ifdef CONFIG_PCI_QUIRKS
 378 int pci_dev_specific_reset(struct pci_dev *dev, int probe);
 379 #else
 380 static inline int pci_dev_specific_reset(struct pci_dev *dev, int probe)
 381 {
 382         return -ENOTTY;
 383 }
 384 #endif
 385
 386 #if defined(CONFIG_PCI_QUIRKS) && defined(CONFIG_ARM64)
 387 int acpi_get_rc_resources(struct device *dev, const char *hid, u16 segment,
 388                           struct resource *res);
 389 #endif
 390
 391 u32 pci_rebar_get_possible_sizes(struct pci_dev *pdev, int bar);
 392 int pci_rebar_get_current_size(struct pci_dev *pdev, int bar);
 393 int pci_rebar_set_size(struct pci_dev *pdev, int bar, int size);
 394 static inline u64 pci_rebar_size_to_bytes(int size)
 395 {
 396         return 1ULL << (size + 20);
 397 }
 398
 399 #endif /* DRIVERS_PCI_H */