2 * drivers/pcmcia/m32r_pcc.c
4 * Device driver for the PCMCIA functionality of M32R.
6 * Copyright (c) 2001, 2002, 2003, 2004
7 * Hiroyuki Kondo, Naoto Sugai, Hayato Fujiwara
10 #include <linux/module.h>
11 #include <linux/moduleparam.h>
12 #include <linux/init.h>
13 #include <linux/types.h>
14 #include <linux/fcntl.h>
15 #include <linux/string.h>
16 #include <linux/kernel.h>
17 #include <linux/errno.h>
18 #include <linux/timer.h>
19 #include <linux/ioport.h>
20 #include <linux/delay.h>
21 #include <linux/workqueue.h>
22 #include <linux/interrupt.h>
23 #include <linux/platform_device.h>
24 #include <linux/bitops.h>
27 #include <asm/addrspace.h>
29 #include <pcmcia/ss.h>
31 /* XXX: should be moved into asm/irq.h */
37 #define CHAOS_PCC_DEBUG
38 #ifdef CHAOS_PCC_DEBUG
39 static volatile u_short dummy_readbuf
;
42 #define PCC_DEBUG_DBEX
45 /* Poll status interval -- 0 means default to interrupt */
46 static int poll_interval
= 0;
48 typedef enum pcc_space
{ as_none
= 0, as_comm
, as_attr
, as_io
} pcc_as_t
;
50 typedef struct pcc_socket
{
52 struct pcmcia_socket socket
;
56 u_long base
; /* PCC register base */
58 pccard_io_map io_map
[MAX_IO_WIN
];
59 pccard_mem_map mem_map
[MAX_WIN
];
62 pcc_as_t current_space
;
64 #ifdef CHAOS_PCC_DEBUG
68 struct proc_dir_entry
*proc
;
72 static int pcc_sockets
= 0;
73 static pcc_socket_t socket
[M32R_MAX_PCC
] = {
77 /*====================================================================*/
79 static unsigned int pcc_get(u_short
, unsigned int);
80 static void pcc_set(u_short
, unsigned int , unsigned int );
82 static DEFINE_SPINLOCK(pcc_lock
);
84 void pcc_iorw(int sock
, unsigned long port
, void *buf
, size_t size
, size_t nmemb
, int wr
, int flag
)
92 pcc_socket_t
*t
= &socket
[sock
];
93 #ifdef CHAOS_PCC_DEBUG
98 spin_lock_irqsave(&pcc_lock
, flags
);
103 need_ex
= (size
> 1 && flag
== 0) ? PCMOD_DBEX
: 0;
104 #ifdef PCC_DEBUG_DBEX
110 * calculate access address
112 addr
= t
->mapaddr
+ port
- t
->ioaddr
+ KSEG1
; /* XXX */
115 * Check current mapping
117 if (t
->current_space
!= as_io
|| t
->last_iodbex
!= need_ex
) {
124 pcc_set(sock
, PCCR
, 0);
127 * Set mode and io address
129 cbsz
= (t
->flags
& MAP_16BIT
) ? 0 : PCMOD_CBSZ
;
130 pcc_set(sock
, PCMOD
, PCMOD_AS_IO
| cbsz
| need_ex
);
131 pcc_set(sock
, PCADR
, addr
& 0x1ff00000);
136 pcc_set(sock
, PCCR
, 1);
138 #ifdef CHAOS_PCC_DEBUG
140 map_changed
= (t
->current_space
== as_attr
&& size
== 2); /* XXX */
145 t
->current_space
= as_io
;
153 unsigned char *bp
= (unsigned char *)buf
;
157 dummy_readbuf
= readb(addr
);
173 unsigned short *bp
= (unsigned short *)buf
;
175 #ifdef CHAOS_PCC_DEBUG
177 dummy_readbuf
= readw(addr
);
183 #ifdef PCC_DEBUG_DBEX
185 unsigned char *cp
= (unsigned char *)bp
;
187 tmp
= cp
[1] << 8 | cp
[0];
197 #ifdef PCC_DEBUG_DBEX
199 unsigned char *cp
= (unsigned char *)bp
;
203 cp
[1] = (tmp
>> 8) & 0xff;
213 /* addr is no longer used */
214 if ((addr
= pcc_get(sock
, PCIRC
)) & PCIRC_BWERR
) {
215 printk("m32r_pcc: BWERR detected : port 0x%04lx : iosize %dbit\n",
217 pcc_set(sock
, PCIRC
, addr
);
223 t
->last_iosize
= size
;
224 t
->last_iodbex
= need_ex
;
228 spin_unlock_irqrestore(&pcc_lock
,flags
);
233 void pcc_ioread(int sock
, unsigned long port
, void *buf
, size_t size
, size_t nmemb
, int flag
) {
234 pcc_iorw(sock
, port
, buf
, size
, nmemb
, 0, flag
);
237 void pcc_iowrite(int sock
, unsigned long port
, void *buf
, size_t size
, size_t nmemb
, int flag
) {
238 pcc_iorw(sock
, port
, buf
, size
, nmemb
, 1, flag
);
241 /*====================================================================*/
243 #define IS_REGISTERED 0x2000
244 #define IS_ALIVE 0x8000
246 typedef struct pcc_t
{
251 static pcc_t pcc
[] = {
252 { "xnux2", 0 }, { "xnux2", 0 },
255 static irqreturn_t
pcc_interrupt(int, void *);
257 /*====================================================================*/
259 static struct timer_list poll_timer
;
261 static unsigned int pcc_get(u_short sock
, unsigned int reg
)
263 return inl(socket
[sock
].base
+ reg
);
267 static void pcc_set(u_short sock
, unsigned int reg
, unsigned int data
)
269 outl(data
, socket
[sock
].base
+ reg
);
272 /*======================================================================
274 See if a card is present, powered up, in IO mode, and already
275 bound to a (non PC Card) Linux driver. We leave these alone.
277 We make an exception for cards that seem to be serial devices.
279 ======================================================================*/
281 static int __init
is_alive(u_short sock
)
286 stat
= pcc_get(sock
, PCIRC
);
287 f
= (stat
& (PCIRC_CDIN1
| PCIRC_CDIN2
)) >> 16;
289 printk("m32r_pcc: No Card is detected at socket %d : stat = 0x%08x\n",stat
,sock
);
293 printk("m32r_pcc: Insertion fail (%.8x) at socket %d\n",stat
,sock
);
295 printk("m32r_pcc: Card is Inserted at socket %d(%.8x)\n",sock
,stat
);
299 static int add_pcc_socket(ulong base
, int irq
, ulong mapaddr
,
302 pcc_socket_t
*t
= &socket
[pcc_sockets
];
307 t
->mapaddr
= mapaddr
;
309 #ifdef CHAOS_PCC_DEBUG
310 t
->flags
= MAP_16BIT
;
314 if (is_alive(pcc_sockets
))
315 t
->flags
|= IS_ALIVE
;
319 request_region(t
->base
, 0x20, "m32r-pcc");
322 printk(KERN_INFO
" %s ", pcc
[pcc_sockets
].name
);
323 printk("pcc at 0x%08lx\n", t
->base
);
325 /* Update socket interrupt information, capabilities */
326 t
->socket
.features
|= (SS_CAP_PCCARD
| SS_CAP_STATIC_MAP
);
327 t
->socket
.map_size
= M32R_PCC_MAPSIZE
;
328 t
->socket
.io_offset
= ioaddr
; /* use for io access offset */
329 t
->socket
.irq_mask
= 0;
330 t
->socket
.pci_irq
= 2 + pcc_sockets
; /* XXX */
332 err
= request_irq(irq
, pcc_interrupt
, 0, "m32r-pcc", pcc_interrupt
);
335 release_region(t
->base
, 0x20);
345 /*====================================================================*/
347 static irqreturn_t
pcc_interrupt(int irq
, void *dev
)
350 u_int events
, active
;
353 pr_debug("m32r_pcc: pcc_interrupt(%d)\n", irq
);
355 for (j
= 0; j
< 20; j
++) {
357 for (i
= 0; i
< pcc_sockets
; i
++) {
358 if ((socket
[i
].cs_irq
!= irq
) &&
359 (socket
[i
].socket
.pci_irq
!= irq
))
362 irc
= pcc_get(i
, PCIRC
);
364 pr_debug("m32r_pcc: interrupt: socket %d pcirc 0x%02x ",
369 events
= (irc
) ? SS_DETECT
: 0;
370 events
|= (pcc_get(i
,PCCR
) & PCCR_PCEN
) ? SS_READY
: 0;
371 pr_debug("m32r_pcc: event 0x%02x\n", events
);
374 pcmcia_parse_events(&socket
[i
].socket
, events
);
382 printk(KERN_NOTICE
"m32r-pcc: infinite loop in interrupt handler\n");
384 pr_debug("m32r_pcc: interrupt done\n");
386 return IRQ_RETVAL(handled
);
387 } /* pcc_interrupt */
389 static void pcc_interrupt_wrapper(struct timer_list
*unused
)
391 pcc_interrupt(0, NULL
);
392 poll_timer
.expires
= jiffies
+ poll_interval
;
393 add_timer(&poll_timer
);
396 /*====================================================================*/
398 static int _pcc_get_status(u_short sock
, u_int
*value
)
402 status
= pcc_get(sock
,PCIRC
);
403 *value
= ((status
& PCIRC_CDIN1
) && (status
& PCIRC_CDIN2
))
406 status
= pcc_get(sock
,PCCR
);
409 *value
|= (status
& PCCR_PCEN
) ? SS_READY
: 0;
411 *value
|= SS_READY
; /* XXX: always */
414 status
= pcc_get(sock
,PCCSIGCR
);
415 *value
|= (status
& PCCSIGCR_VEN
) ? SS_POWERON
: 0;
417 pr_debug("m32r_pcc: GetStatus(%d) = %#4.4x\n", sock
, *value
);
421 /*====================================================================*/
423 static int _pcc_set_socket(u_short sock
, socket_state_t
*state
)
427 pr_debug("m32r_pcc: SetSocket(%d, flags %#3.3x, Vcc %d, Vpp %d, "
428 "io_irq %d, csc_mask %#2.2x)", sock
, state
->flags
,
429 state
->Vcc
, state
->Vpp
, state
->io_irq
, state
->csc_mask
);
435 if (state
->Vcc
== 50) {
442 if (state
->flags
& SS_RESET
) {
443 pr_debug("m32r_pcc: :RESET\n");
444 reg
|= PCCSIGCR_CRST
;
446 if (state
->flags
& SS_OUTPUT_ENA
){
447 pr_debug("m32r_pcc: :OUTPUT_ENA\n");
453 pcc_set(sock
,PCCSIGCR
,reg
);
455 if(state
->flags
& SS_IOCARD
){
456 pr_debug("m32r_pcc: :IOCARD");
458 if (state
->flags
& SS_PWR_AUTO
) {
459 pr_debug("m32r_pcc: :PWR_AUTO");
461 if (state
->csc_mask
& SS_DETECT
)
462 pr_debug("m32r_pcc: :csc-SS_DETECT");
463 if (state
->flags
& SS_IOCARD
) {
464 if (state
->csc_mask
& SS_STSCHG
)
465 pr_debug("m32r_pcc: :STSCHG");
467 if (state
->csc_mask
& SS_BATDEAD
)
468 pr_debug("m32r_pcc: :BATDEAD");
469 if (state
->csc_mask
& SS_BATWARN
)
470 pr_debug("m32r_pcc: :BATWARN");
471 if (state
->csc_mask
& SS_READY
)
472 pr_debug("m32r_pcc: :READY");
474 pr_debug("m32r_pcc: \n");
478 /*====================================================================*/
480 static int _pcc_set_io_map(u_short sock
, struct pccard_io_map
*io
)
484 pr_debug("m32r_pcc: SetIOMap(%d, %d, %#2.2x, %d ns, "
485 "%#llx-%#llx)\n", sock
, io
->map
, io
->flags
,
486 io
->speed
, (unsigned long long)io
->start
,
487 (unsigned long long)io
->stop
);
493 /*====================================================================*/
495 static int _pcc_set_mem_map(u_short sock
, struct pccard_mem_map
*mem
)
498 u_char map
= mem
->map
;
501 pcc_socket_t
*t
= &socket
[sock
];
502 #ifdef CHAOS_PCC_DEBUG
504 pcc_as_t last
= t
->current_space
;
508 pr_debug("m32r_pcc: SetMemMap(%d, %d, %#2.2x, %d ns, "
509 "%#llx, %#x)\n", sock
, map
, mem
->flags
,
510 mem
->speed
, (unsigned long long)mem
->static_start
,
516 if ((map
> MAX_WIN
) || (mem
->card_start
> 0x3ffffff)){
523 if ((mem
->flags
& MAP_ACTIVE
) == 0) {
524 t
->current_space
= as_none
;
531 pcc_set(sock
, PCCR
, 0);
536 if (mem
->flags
& MAP_ATTRIB
) {
537 mode
= PCMOD_AS_ATTRIB
| PCMOD_CBSZ
;
538 t
->current_space
= as_attr
;
540 mode
= 0; /* common memory */
541 t
->current_space
= as_comm
;
543 pcc_set(sock
, PCMOD
, mode
);
548 addr
= t
->mapaddr
+ (mem
->card_start
& M32R_PCC_MAPMASK
);
549 pcc_set(sock
, PCADR
, addr
);
551 mem
->static_start
= addr
+ mem
->card_start
;
556 pcc_set(sock
, PCCR
, 1);
558 #ifdef CHAOS_PCC_DEBUG
560 if (last
!= as_attr
) {
564 dummy_readbuf
= *(u_char
*)(addr
+ KSEG1
);
572 #if 0 /* driver model ordering issue */
573 /*======================================================================
575 Routines for accessing socket information and register dumps via
578 ======================================================================*/
580 static ssize_t
show_info(struct class_device
*class_dev
, char *buf
)
582 pcc_socket_t
*s
= container_of(class_dev
, struct pcc_socket
,
585 return sprintf(buf
, "type: %s\nbase addr: 0x%08lx\n",
586 pcc
[s
->type
].name
, s
->base
);
589 static ssize_t
show_exca(struct class_device
*class_dev
, char *buf
)
596 static CLASS_DEVICE_ATTR(info
, S_IRUGO
, show_info
, NULL
);
597 static CLASS_DEVICE_ATTR(exca
, S_IRUGO
, show_exca
, NULL
);
600 /*====================================================================*/
602 /* this is horribly ugly... proper locking needs to be done here at
604 #define LOCKED(x) do { \
606 unsigned long flags; \
607 spin_lock_irqsave(&pcc_lock, flags); \
609 spin_unlock_irqrestore(&pcc_lock, flags); \
614 static int pcc_get_status(struct pcmcia_socket
*s
, u_int
*value
)
616 unsigned int sock
= container_of(s
, struct pcc_socket
, socket
)->number
;
618 if (socket
[sock
].flags
& IS_ALIVE
) {
622 LOCKED(_pcc_get_status(sock
, value
));
625 static int pcc_set_socket(struct pcmcia_socket
*s
, socket_state_t
*state
)
627 unsigned int sock
= container_of(s
, struct pcc_socket
, socket
)->number
;
629 if (socket
[sock
].flags
& IS_ALIVE
)
632 LOCKED(_pcc_set_socket(sock
, state
));
635 static int pcc_set_io_map(struct pcmcia_socket
*s
, struct pccard_io_map
*io
)
637 unsigned int sock
= container_of(s
, struct pcc_socket
, socket
)->number
;
639 if (socket
[sock
].flags
& IS_ALIVE
)
641 LOCKED(_pcc_set_io_map(sock
, io
));
644 static int pcc_set_mem_map(struct pcmcia_socket
*s
, struct pccard_mem_map
*mem
)
646 unsigned int sock
= container_of(s
, struct pcc_socket
, socket
)->number
;
648 if (socket
[sock
].flags
& IS_ALIVE
)
650 LOCKED(_pcc_set_mem_map(sock
, mem
));
653 static int pcc_init(struct pcmcia_socket
*s
)
655 pr_debug("m32r_pcc: init call\n");
659 static struct pccard_operations pcc_operations
= {
661 .get_status
= pcc_get_status
,
662 .set_socket
= pcc_set_socket
,
663 .set_io_map
= pcc_set_io_map
,
664 .set_mem_map
= pcc_set_mem_map
,
667 /*====================================================================*/
669 static struct platform_driver pcc_driver
= {
675 static struct platform_device pcc_device
= {
680 /*====================================================================*/
682 static int __init
init_m32r_pcc(void)
686 ret
= platform_driver_register(&pcc_driver
);
690 ret
= platform_device_register(&pcc_device
);
694 printk(KERN_INFO
"m32r PCC probe:\n");
698 ret
= add_pcc_socket(M32R_PCC0_BASE
, PCC0_IRQ
, M32R_PCC0_MAPBASE
,
703 #ifdef CONFIG_M32RPCC_SLOT2
704 ret
= add_pcc_socket(M32R_PCC1_BASE
, PCC1_IRQ
, M32R_PCC1_MAPBASE
,
710 if (pcc_sockets
== 0) {
711 printk("socket is not found.\n");
716 /* Set up interrupt handler(s) */
718 for (i
= 0 ; i
< pcc_sockets
; i
++) {
719 socket
[i
].socket
.dev
.parent
= &pcc_device
.dev
;
720 socket
[i
].socket
.ops
= &pcc_operations
;
721 socket
[i
].socket
.resource_ops
= &pccard_static_ops
;
722 socket
[i
].socket
.owner
= THIS_MODULE
;
723 socket
[i
].number
= i
;
724 ret
= pcmcia_register_socket(&socket
[i
].socket
);
726 socket
[i
].flags
|= IS_REGISTERED
;
729 /* Finally, schedule a polling interrupt */
730 if (poll_interval
!= 0) {
731 timer_setup(&poll_timer
, pcc_interrupt_wrapper
, 0);
732 poll_timer
.expires
= jiffies
+ poll_interval
;
733 add_timer(&poll_timer
);
739 platform_device_unregister(&pcc_device
);
741 platform_driver_unregister(&pcc_driver
);
743 } /* init_m32r_pcc */
745 static void __exit
exit_m32r_pcc(void)
749 for (i
= 0; i
< pcc_sockets
; i
++)
750 if (socket
[i
].flags
& IS_REGISTERED
)
751 pcmcia_unregister_socket(&socket
[i
].socket
);
753 platform_device_unregister(&pcc_device
);
754 if (poll_interval
!= 0)
755 del_timer_sync(&poll_timer
);
757 platform_driver_unregister(&pcc_driver
);
758 } /* exit_m32r_pcc */
760 module_init(init_m32r_pcc
);
761 module_exit(exit_m32r_pcc
);
762 MODULE_LICENSE("Dual MPL/GPL");
763 /*====================================================================*/