drivers/pcmcia/m32r_pcc.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Copyright (C) 2001 by Hiroyuki Kondo
   4  */
   5
   6 #define M32R_MAX_PCC    2
   7
   8 /*
   9  * M32R PC Card Controller
  10  */
  11 #define M32R_PCC0_BASE        0x00ef7000
  12 #define M32R_PCC1_BASE        0x00ef7020
  13
  14 /*
  15  * Register offsets
  16  */
  17 #define PCCR            0x00
  18 #define PCADR           0x04
  19 #define PCMOD           0x08
  20 #define PCIRC           0x0c
  21 #define PCCSIGCR        0x10
  22 #define PCATCR          0x14
  23
  24 /*
  25  * PCCR
  26  */
  27 #define PCCR_PCEN       (1UL<<(31-31))
  28
  29 /*
  30  * PCIRC
  31  */
  32 #define PCIRC_BWERR     (1UL<<(31-7))
  33 #define PCIRC_CDIN1     (1UL<<(31-14))
  34 #define PCIRC_CDIN2     (1UL<<(31-15))
  35 #define PCIRC_BEIEN     (1UL<<(31-23))
  36 #define PCIRC_CIIEN     (1UL<<(31-30))
  37 #define PCIRC_COIEN     (1UL<<(31-31))
  38
  39 /*
  40  * PCCSIGCR
  41  */
  42 #define PCCSIGCR_SEN    (1UL<<(31-3))
  43 #define PCCSIGCR_VEN    (1UL<<(31-7))
  44 #define PCCSIGCR_CRST   (1UL<<(31-15))
  45 #define PCCSIGCR_COCR   (1UL<<(31-31))
  46
  47 /*
  48  *
  49  */
  50 #define PCMOD_AS_ATTRIB (1UL<<(31-19))
  51 #define PCMOD_AS_IO     (1UL<<(31-18))
  52
  53 #define PCMOD_CBSZ      (1UL<<(31-23)) /* set for 8bit */
  54
  55 #define PCMOD_DBEX      (1UL<<(31-31)) /* set for excahnge */
  56
  57 /*
  58  * M32R PCC Map addr
  59  */
  60 #define M32R_PCC0_MAPBASE        0x14000000
  61 #define M32R_PCC1_MAPBASE        0x16000000
  62
  63 #define M32R_PCC_MAPMAX          0x02000000
  64
  65 #define M32R_PCC_MAPSIZE         0x00001000 /* XXX */
  66 #define M32R_PCC_MAPMASK        (~(M32R_PCC_MAPMAX-1))