2 * Pin controller and GPIO driver for Amlogic Meson SoCs
4 * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
10 * You should have received a copy of the GNU General Public License
11 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 * The available pins are organized in banks (A,B,C,D,E,X,Y,Z,AO,
16 * BOOT,CARD for meson6, X,Y,DV,H,Z,AO,BOOT,CARD for meson8 and
17 * X,Y,DV,H,AO,BOOT,CARD,DIF for meson8b) and each bank has a
18 * variable number of pins.
20 * The AO bank is special because it belongs to the Always-On power
21 * domain which can't be powered off; the bank also uses a set of
22 * registers different from the other banks.
24 * For each pin controller there are 4 different register ranges that
25 * control the following properties of the pins:
27 * 2) pull enable/disable
29 * 4) GPIO direction, output value, input value
31 * In some cases the register ranges for pull enable and pull
32 * direction are the same and thus there are only 3 register ranges.
34 * For the pull and GPIO configuration every bank uses a contiguous
35 * set of bits in the register sets described above; the same register
36 * can be shared by more banks with different offsets.
38 * In addition to this there are some registers shared between all
39 * banks that control the IRQ functionality. This feature is not
40 * supported at the moment by the driver.
43 #include <linux/device.h>
44 #include <linux/gpio.h>
45 #include <linux/init.h>
48 #include <linux/of_address.h>
49 #include <linux/of_device.h>
50 #include <linux/pinctrl/pinconf-generic.h>
51 #include <linux/pinctrl/pinconf.h>
52 #include <linux/pinctrl/pinctrl.h>
53 #include <linux/pinctrl/pinmux.h>
54 #include <linux/platform_device.h>
55 #include <linux/regmap.h>
56 #include <linux/seq_file.h>
59 #include "../pinctrl-utils.h"
60 #include "pinctrl-meson.h"
63 * meson_get_bank() - find the bank containing a given pin
65 * @pc: the pinctrl instance
66 * @pin: the pin number
67 * @bank: the found bank
69 * Return: 0 on success, a negative value on error
71 static int meson_get_bank(struct meson_pinctrl
*pc
, unsigned int pin
,
72 struct meson_bank
**bank
)
76 for (i
= 0; i
< pc
->data
->num_banks
; i
++) {
77 if (pin
>= pc
->data
->banks
[i
].first
&&
78 pin
<= pc
->data
->banks
[i
].last
) {
79 *bank
= &pc
->data
->banks
[i
];
88 * meson_calc_reg_and_bit() - calculate register and bit for a pin
90 * @bank: the bank containing the pin
91 * @pin: the pin number
92 * @reg_type: the type of register needed (pull-enable, pull, etc...)
93 * @reg: the computed register offset
94 * @bit: the computed bit
96 static void meson_calc_reg_and_bit(struct meson_bank
*bank
, unsigned int pin
,
97 enum meson_reg_type reg_type
,
98 unsigned int *reg
, unsigned int *bit
)
100 struct meson_reg_desc
*desc
= &bank
->regs
[reg_type
];
102 *reg
= desc
->reg
* 4;
103 *bit
= desc
->bit
+ pin
- bank
->first
;
106 static int meson_get_groups_count(struct pinctrl_dev
*pcdev
)
108 struct meson_pinctrl
*pc
= pinctrl_dev_get_drvdata(pcdev
);
110 return pc
->data
->num_groups
;
113 static const char *meson_get_group_name(struct pinctrl_dev
*pcdev
,
116 struct meson_pinctrl
*pc
= pinctrl_dev_get_drvdata(pcdev
);
118 return pc
->data
->groups
[selector
].name
;
121 static int meson_get_group_pins(struct pinctrl_dev
*pcdev
, unsigned selector
,
122 const unsigned **pins
, unsigned *num_pins
)
124 struct meson_pinctrl
*pc
= pinctrl_dev_get_drvdata(pcdev
);
126 *pins
= pc
->data
->groups
[selector
].pins
;
127 *num_pins
= pc
->data
->groups
[selector
].num_pins
;
132 static void meson_pin_dbg_show(struct pinctrl_dev
*pcdev
, struct seq_file
*s
,
135 seq_printf(s
, " %s", dev_name(pcdev
->dev
));
138 static const struct pinctrl_ops meson_pctrl_ops
= {
139 .get_groups_count
= meson_get_groups_count
,
140 .get_group_name
= meson_get_group_name
,
141 .get_group_pins
= meson_get_group_pins
,
142 .dt_node_to_map
= pinconf_generic_dt_node_to_map_all
,
143 .dt_free_map
= pinctrl_utils_free_map
,
144 .pin_dbg_show
= meson_pin_dbg_show
,
147 int meson_pmx_get_funcs_count(struct pinctrl_dev
*pcdev
)
149 struct meson_pinctrl
*pc
= pinctrl_dev_get_drvdata(pcdev
);
151 return pc
->data
->num_funcs
;
154 const char *meson_pmx_get_func_name(struct pinctrl_dev
*pcdev
,
157 struct meson_pinctrl
*pc
= pinctrl_dev_get_drvdata(pcdev
);
159 return pc
->data
->funcs
[selector
].name
;
162 int meson_pmx_get_groups(struct pinctrl_dev
*pcdev
, unsigned selector
,
163 const char * const **groups
,
164 unsigned * const num_groups
)
166 struct meson_pinctrl
*pc
= pinctrl_dev_get_drvdata(pcdev
);
168 *groups
= pc
->data
->funcs
[selector
].groups
;
169 *num_groups
= pc
->data
->funcs
[selector
].num_groups
;
174 static int meson_pinconf_set(struct pinctrl_dev
*pcdev
, unsigned int pin
,
175 unsigned long *configs
, unsigned num_configs
)
177 struct meson_pinctrl
*pc
= pinctrl_dev_get_drvdata(pcdev
);
178 struct meson_bank
*bank
;
179 enum pin_config_param param
;
180 unsigned int reg
, bit
;
183 ret
= meson_get_bank(pc
, pin
, &bank
);
187 for (i
= 0; i
< num_configs
; i
++) {
188 param
= pinconf_to_config_param(configs
[i
]);
191 case PIN_CONFIG_BIAS_DISABLE
:
192 dev_dbg(pc
->dev
, "pin %u: disable bias\n", pin
);
194 meson_calc_reg_and_bit(bank
, pin
, REG_PULL
, ®
, &bit
);
195 ret
= regmap_update_bits(pc
->reg_pull
, reg
,
200 case PIN_CONFIG_BIAS_PULL_UP
:
201 dev_dbg(pc
->dev
, "pin %u: enable pull-up\n", pin
);
203 meson_calc_reg_and_bit(bank
, pin
, REG_PULLEN
,
205 ret
= regmap_update_bits(pc
->reg_pullen
, reg
,
210 meson_calc_reg_and_bit(bank
, pin
, REG_PULL
, ®
, &bit
);
211 ret
= regmap_update_bits(pc
->reg_pull
, reg
,
216 case PIN_CONFIG_BIAS_PULL_DOWN
:
217 dev_dbg(pc
->dev
, "pin %u: enable pull-down\n", pin
);
219 meson_calc_reg_and_bit(bank
, pin
, REG_PULLEN
,
221 ret
= regmap_update_bits(pc
->reg_pullen
, reg
,
226 meson_calc_reg_and_bit(bank
, pin
, REG_PULL
, ®
, &bit
);
227 ret
= regmap_update_bits(pc
->reg_pull
, reg
,
240 static int meson_pinconf_get_pull(struct meson_pinctrl
*pc
, unsigned int pin
)
242 struct meson_bank
*bank
;
243 unsigned int reg
, bit
, val
;
246 ret
= meson_get_bank(pc
, pin
, &bank
);
250 meson_calc_reg_and_bit(bank
, pin
, REG_PULLEN
, ®
, &bit
);
252 ret
= regmap_read(pc
->reg_pullen
, reg
, &val
);
256 if (!(val
& BIT(bit
))) {
257 conf
= PIN_CONFIG_BIAS_DISABLE
;
259 meson_calc_reg_and_bit(bank
, pin
, REG_PULL
, ®
, &bit
);
261 ret
= regmap_read(pc
->reg_pull
, reg
, &val
);
266 conf
= PIN_CONFIG_BIAS_PULL_UP
;
268 conf
= PIN_CONFIG_BIAS_PULL_DOWN
;
274 static int meson_pinconf_get(struct pinctrl_dev
*pcdev
, unsigned int pin
,
275 unsigned long *config
)
277 struct meson_pinctrl
*pc
= pinctrl_dev_get_drvdata(pcdev
);
278 enum pin_config_param param
= pinconf_to_config_param(*config
);
282 case PIN_CONFIG_BIAS_DISABLE
:
283 case PIN_CONFIG_BIAS_PULL_DOWN
:
284 case PIN_CONFIG_BIAS_PULL_UP
:
285 if (meson_pinconf_get_pull(pc
, pin
) == param
)
294 *config
= pinconf_to_config_packed(param
, arg
);
295 dev_dbg(pc
->dev
, "pinconf for pin %u is %lu\n", pin
, *config
);
300 static int meson_pinconf_group_set(struct pinctrl_dev
*pcdev
,
301 unsigned int num_group
,
302 unsigned long *configs
, unsigned num_configs
)
304 struct meson_pinctrl
*pc
= pinctrl_dev_get_drvdata(pcdev
);
305 struct meson_pmx_group
*group
= &pc
->data
->groups
[num_group
];
308 dev_dbg(pc
->dev
, "set pinconf for group %s\n", group
->name
);
310 for (i
= 0; i
< group
->num_pins
; i
++) {
311 meson_pinconf_set(pcdev
, group
->pins
[i
], configs
,
318 static int meson_pinconf_group_get(struct pinctrl_dev
*pcdev
,
319 unsigned int group
, unsigned long *config
)
324 static const struct pinconf_ops meson_pinconf_ops
= {
325 .pin_config_get
= meson_pinconf_get
,
326 .pin_config_set
= meson_pinconf_set
,
327 .pin_config_group_get
= meson_pinconf_group_get
,
328 .pin_config_group_set
= meson_pinconf_group_set
,
332 static int meson_gpio_direction_input(struct gpio_chip
*chip
, unsigned gpio
)
334 struct meson_pinctrl
*pc
= gpiochip_get_data(chip
);
335 unsigned int reg
, bit
;
336 struct meson_bank
*bank
;
339 ret
= meson_get_bank(pc
, gpio
, &bank
);
343 meson_calc_reg_and_bit(bank
, gpio
, REG_DIR
, ®
, &bit
);
345 return regmap_update_bits(pc
->reg_gpio
, reg
, BIT(bit
), BIT(bit
));
348 static int meson_gpio_direction_output(struct gpio_chip
*chip
, unsigned gpio
,
351 struct meson_pinctrl
*pc
= gpiochip_get_data(chip
);
352 unsigned int reg
, bit
;
353 struct meson_bank
*bank
;
356 ret
= meson_get_bank(pc
, gpio
, &bank
);
360 meson_calc_reg_and_bit(bank
, gpio
, REG_DIR
, ®
, &bit
);
361 ret
= regmap_update_bits(pc
->reg_gpio
, reg
, BIT(bit
), 0);
365 meson_calc_reg_and_bit(bank
, gpio
, REG_OUT
, ®
, &bit
);
366 return regmap_update_bits(pc
->reg_gpio
, reg
, BIT(bit
),
367 value
? BIT(bit
) : 0);
370 static void meson_gpio_set(struct gpio_chip
*chip
, unsigned gpio
, int value
)
372 struct meson_pinctrl
*pc
= gpiochip_get_data(chip
);
373 unsigned int reg
, bit
;
374 struct meson_bank
*bank
;
377 ret
= meson_get_bank(pc
, gpio
, &bank
);
381 meson_calc_reg_and_bit(bank
, gpio
, REG_OUT
, ®
, &bit
);
382 regmap_update_bits(pc
->reg_gpio
, reg
, BIT(bit
),
383 value
? BIT(bit
) : 0);
386 static int meson_gpio_get(struct gpio_chip
*chip
, unsigned gpio
)
388 struct meson_pinctrl
*pc
= gpiochip_get_data(chip
);
389 unsigned int reg
, bit
, val
;
390 struct meson_bank
*bank
;
393 ret
= meson_get_bank(pc
, gpio
, &bank
);
397 meson_calc_reg_and_bit(bank
, gpio
, REG_IN
, ®
, &bit
);
398 regmap_read(pc
->reg_gpio
, reg
, &val
);
400 return !!(val
& BIT(bit
));
403 static int meson_gpiolib_register(struct meson_pinctrl
*pc
)
407 pc
->chip
.label
= pc
->data
->name
;
408 pc
->chip
.parent
= pc
->dev
;
409 pc
->chip
.request
= gpiochip_generic_request
;
410 pc
->chip
.free
= gpiochip_generic_free
;
411 pc
->chip
.direction_input
= meson_gpio_direction_input
;
412 pc
->chip
.direction_output
= meson_gpio_direction_output
;
413 pc
->chip
.get
= meson_gpio_get
;
414 pc
->chip
.set
= meson_gpio_set
;
416 pc
->chip
.ngpio
= pc
->data
->num_pins
;
417 pc
->chip
.can_sleep
= false;
418 pc
->chip
.of_node
= pc
->of_node
;
419 pc
->chip
.of_gpio_n_cells
= 2;
421 ret
= gpiochip_add_data(&pc
->chip
, pc
);
423 dev_err(pc
->dev
, "can't add gpio chip %s\n",
431 static struct regmap_config meson_regmap_config
= {
437 static struct regmap
*meson_map_resource(struct meson_pinctrl
*pc
,
438 struct device_node
*node
, char *name
)
444 i
= of_property_match_string(node
, "reg-names", name
);
445 if (of_address_to_resource(node
, i
, &res
))
446 return ERR_PTR(-ENOENT
);
448 base
= devm_ioremap_resource(pc
->dev
, &res
);
450 return ERR_CAST(base
);
452 meson_regmap_config
.max_register
= resource_size(&res
) - 4;
453 meson_regmap_config
.name
= devm_kasprintf(pc
->dev
, GFP_KERNEL
,
456 if (!meson_regmap_config
.name
)
457 return ERR_PTR(-ENOMEM
);
459 return devm_regmap_init_mmio(pc
->dev
, base
, &meson_regmap_config
);
462 static int meson_pinctrl_parse_dt(struct meson_pinctrl
*pc
,
463 struct device_node
*node
)
465 struct device_node
*np
, *gpio_np
= NULL
;
467 for_each_child_of_node(node
, np
) {
468 if (!of_find_property(np
, "gpio-controller", NULL
))
471 dev_err(pc
->dev
, "multiple gpio nodes\n");
478 dev_err(pc
->dev
, "no gpio node found\n");
482 pc
->of_node
= gpio_np
;
484 pc
->reg_mux
= meson_map_resource(pc
, gpio_np
, "mux");
485 if (IS_ERR(pc
->reg_mux
)) {
486 dev_err(pc
->dev
, "mux registers not found\n");
487 return PTR_ERR(pc
->reg_mux
);
490 pc
->reg_pull
= meson_map_resource(pc
, gpio_np
, "pull");
491 if (IS_ERR(pc
->reg_pull
)) {
492 dev_err(pc
->dev
, "pull registers not found\n");
493 return PTR_ERR(pc
->reg_pull
);
496 pc
->reg_pullen
= meson_map_resource(pc
, gpio_np
, "pull-enable");
497 /* Use pull region if pull-enable one is not present */
498 if (IS_ERR(pc
->reg_pullen
))
499 pc
->reg_pullen
= pc
->reg_pull
;
501 pc
->reg_gpio
= meson_map_resource(pc
, gpio_np
, "gpio");
502 if (IS_ERR(pc
->reg_gpio
)) {
503 dev_err(pc
->dev
, "gpio registers not found\n");
504 return PTR_ERR(pc
->reg_gpio
);
510 int meson_pinctrl_probe(struct platform_device
*pdev
)
512 struct device
*dev
= &pdev
->dev
;
513 struct meson_pinctrl
*pc
;
516 pc
= devm_kzalloc(dev
, sizeof(struct meson_pinctrl
), GFP_KERNEL
);
521 pc
->data
= (struct meson_pinctrl_data
*) of_device_get_match_data(dev
);
523 ret
= meson_pinctrl_parse_dt(pc
, dev
->of_node
);
527 pc
->desc
.name
= "pinctrl-meson";
528 pc
->desc
.owner
= THIS_MODULE
;
529 pc
->desc
.pctlops
= &meson_pctrl_ops
;
530 pc
->desc
.pmxops
= pc
->data
->pmx_ops
;
531 pc
->desc
.confops
= &meson_pinconf_ops
;
532 pc
->desc
.pins
= pc
->data
->pins
;
533 pc
->desc
.npins
= pc
->data
->num_pins
;
535 pc
->pcdev
= devm_pinctrl_register(pc
->dev
, &pc
->desc
, pc
);
536 if (IS_ERR(pc
->pcdev
)) {
537 dev_err(pc
->dev
, "can't register pinctrl device");
538 return PTR_ERR(pc
->pcdev
);
541 return meson_gpiolib_register(pc
);