drivers/pinctrl/meson/pinctrl-meson8b.c

   1 /*
   2  * Pin controller and GPIO driver for Amlogic Meson8b.
   3  *
   4  * Copyright (C) 2015 Endless Mobile, Inc.
   5  * Author: Carlo Caione <carlo@endlessm.com>
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License
   9  * version 2 as published by the Free Software Foundation.
  10  *
  11  * You should have received a copy of the GNU General Public License
  12  * along with this program. If not, see <http://www.gnu.org/licenses/>.
  13  */
  14
  15 #include <dt-bindings/gpio/meson8b-gpio.h>
  16 #include "pinctrl-meson.h"
  17 #include "pinctrl-meson8-pmx.h"
  18
  19 static const struct pinctrl_pin_desc meson8b_cbus_pins[] = {
  20         MESON_PIN(GPIOX_0),
  21         MESON_PIN(GPIOX_1),
  22         MESON_PIN(GPIOX_2),
  23         MESON_PIN(GPIOX_3),
  24         MESON_PIN(GPIOX_4),
  25         MESON_PIN(GPIOX_5),
  26         MESON_PIN(GPIOX_6),
  27         MESON_PIN(GPIOX_7),
  28         MESON_PIN(GPIOX_8),
  29         MESON_PIN(GPIOX_9),
  30         MESON_PIN(GPIOX_10),
  31         MESON_PIN(GPIOX_11),
  32         MESON_PIN(GPIOX_16),
  33         MESON_PIN(GPIOX_17),
  34         MESON_PIN(GPIOX_18),
  35         MESON_PIN(GPIOX_19),
  36         MESON_PIN(GPIOX_20),
  37         MESON_PIN(GPIOX_21),
  38
  39         MESON_PIN(GPIOY_0),
  40         MESON_PIN(GPIOY_1),
  41         MESON_PIN(GPIOY_3),
  42         MESON_PIN(GPIOY_6),
  43         MESON_PIN(GPIOY_7),
  44         MESON_PIN(GPIOY_8),
  45         MESON_PIN(GPIOY_9),
  46         MESON_PIN(GPIOY_10),
  47         MESON_PIN(GPIOY_11),
  48         MESON_PIN(GPIOY_12),
  49         MESON_PIN(GPIOY_13),
  50         MESON_PIN(GPIOY_14),
  51
  52         MESON_PIN(GPIODV_9),
  53         MESON_PIN(GPIODV_24),
  54         MESON_PIN(GPIODV_25),
  55         MESON_PIN(GPIODV_26),
  56         MESON_PIN(GPIODV_27),
  57         MESON_PIN(GPIODV_28),
  58         MESON_PIN(GPIODV_29),
  59
  60         MESON_PIN(GPIOH_0),
  61         MESON_PIN(GPIOH_1),
  62         MESON_PIN(GPIOH_2),
  63         MESON_PIN(GPIOH_3),
  64         MESON_PIN(GPIOH_4),
  65         MESON_PIN(GPIOH_5),
  66         MESON_PIN(GPIOH_6),
  67         MESON_PIN(GPIOH_7),
  68         MESON_PIN(GPIOH_8),
  69         MESON_PIN(GPIOH_9),
  70
  71         MESON_PIN(CARD_0),
  72         MESON_PIN(CARD_1),
  73         MESON_PIN(CARD_2),
  74         MESON_PIN(CARD_3),
  75         MESON_PIN(CARD_4),
  76         MESON_PIN(CARD_5),
  77         MESON_PIN(CARD_6),
  78
  79         MESON_PIN(BOOT_0),
  80         MESON_PIN(BOOT_1),
  81         MESON_PIN(BOOT_2),
  82         MESON_PIN(BOOT_3),
  83         MESON_PIN(BOOT_4),
  84         MESON_PIN(BOOT_5),
  85         MESON_PIN(BOOT_6),
  86         MESON_PIN(BOOT_7),
  87         MESON_PIN(BOOT_8),
  88         MESON_PIN(BOOT_9),
  89         MESON_PIN(BOOT_10),
  90         MESON_PIN(BOOT_11),
  91         MESON_PIN(BOOT_12),
  92         MESON_PIN(BOOT_13),
  93         MESON_PIN(BOOT_14),
  94         MESON_PIN(BOOT_15),
  95         MESON_PIN(BOOT_16),
  96         MESON_PIN(BOOT_17),
  97         MESON_PIN(BOOT_18),
  98
  99         MESON_PIN(DIF_0_P),
 100         MESON_PIN(DIF_0_N),
 101         MESON_PIN(DIF_1_P),
 102         MESON_PIN(DIF_1_N),
 103         MESON_PIN(DIF_2_P),
 104         MESON_PIN(DIF_2_N),
 105         MESON_PIN(DIF_3_P),
 106         MESON_PIN(DIF_3_N),
 107         MESON_PIN(DIF_4_P),
 108         MESON_PIN(DIF_4_N),
 109 };
 110
 111 static const struct pinctrl_pin_desc meson8b_aobus_pins[] = {
 112         MESON_PIN(GPIOAO_0),
 113         MESON_PIN(GPIOAO_1),
 114         MESON_PIN(GPIOAO_2),
 115         MESON_PIN(GPIOAO_3),
 116         MESON_PIN(GPIOAO_4),
 117         MESON_PIN(GPIOAO_5),
 118         MESON_PIN(GPIOAO_6),
 119         MESON_PIN(GPIOAO_7),
 120         MESON_PIN(GPIOAO_8),
 121         MESON_PIN(GPIOAO_9),
 122         MESON_PIN(GPIOAO_10),
 123         MESON_PIN(GPIOAO_11),
 124         MESON_PIN(GPIOAO_12),
 125         MESON_PIN(GPIOAO_13),
 126
 127         /*
 128          * The following 2 pins are not mentionned in the public datasheet
 129          * According to this datasheet, they can't be used with the gpio
 130          * interrupt controller
 131          */
 132         MESON_PIN(GPIO_BSD_EN),
 133         MESON_PIN(GPIO_TEST_N),
 134 };
 135
 136 /* bank X */
 137 static const unsigned int sd_d0_a_pins[]        = { GPIOX_0 };
 138 static const unsigned int sd_d1_a_pins[]        = { GPIOX_1 };
 139 static const unsigned int sd_d2_a_pins[]        = { GPIOX_2 };
 140 static const unsigned int sd_d3_a_pins[]        = { GPIOX_3 };
 141 static const unsigned int sdxc_d0_0_a_pins[]    = { GPIOX_4 };
 142 static const unsigned int sdxc_d47_a_pins[]     = { GPIOX_4, GPIOX_5,
 143                                                     GPIOX_6, GPIOX_7 };
 144 static const unsigned int sdxc_d13_0_a_pins[]   = { GPIOX_5, GPIOX_6,
 145                                                     GPIOX_7 };
 146 static const unsigned int sd_clk_a_pins[]       = { GPIOX_8 };
 147 static const unsigned int sd_cmd_a_pins[]       = { GPIOX_9 };
 148 static const unsigned int xtal_32k_out_pins[]   = { GPIOX_10 };
 149 static const unsigned int xtal_24m_out_pins[]   = { GPIOX_11 };
 150 static const unsigned int uart_tx_b0_pins[]     = { GPIOX_16 };
 151 static const unsigned int uart_rx_b0_pins[]     = { GPIOX_17 };
 152 static const unsigned int uart_cts_b0_pins[]    = { GPIOX_18 };
 153 static const unsigned int uart_rts_b0_pins[]    = { GPIOX_19 };
 154
 155 static const unsigned int sdxc_d0_1_a_pins[]    = { GPIOX_0 };
 156 static const unsigned int sdxc_d13_1_a_pins[]   = { GPIOX_1, GPIOX_2,
 157                                                     GPIOX_3 };
 158 static const unsigned int pcm_out_a_pins[]      = { GPIOX_4 };
 159 static const unsigned int pcm_in_a_pins[]       = { GPIOX_5 };
 160 static const unsigned int pcm_fs_a_pins[]       = { GPIOX_6 };
 161 static const unsigned int pcm_clk_a_pins[]      = { GPIOX_7 };
 162 static const unsigned int sdxc_clk_a_pins[]     = { GPIOX_8 };
 163 static const unsigned int sdxc_cmd_a_pins[]     = { GPIOX_9 };
 164 static const unsigned int pwm_vs_0_pins[]       = { GPIOX_10 };
 165 static const unsigned int pwm_e_pins[]          = { GPIOX_10 };
 166 static const unsigned int pwm_vs_1_pins[]       = { GPIOX_11 };
 167
 168 static const unsigned int uart_tx_a_pins[]      = { GPIOX_4 };
 169 static const unsigned int uart_rx_a_pins[]      = { GPIOX_5 };
 170 static const unsigned int uart_cts_a_pins[]     = { GPIOX_6 };
 171 static const unsigned int uart_rts_a_pins[]     = { GPIOX_7 };
 172 static const unsigned int uart_tx_b1_pins[]     = { GPIOX_8 };
 173 static const unsigned int uart_rx_b1_pins[]     = { GPIOX_9 };
 174 static const unsigned int uart_cts_b1_pins[]    = { GPIOX_10 };
 175 static const unsigned int uart_rts_b1_pins[]    = { GPIOX_20 };
 176
 177 static const unsigned int iso7816_0_clk_pins[]  = { GPIOX_6 };
 178 static const unsigned int iso7816_0_data_pins[] = { GPIOX_7 };
 179 static const unsigned int spi_sclk_0_pins[]     = { GPIOX_8 };
 180 static const unsigned int spi_miso_0_pins[]     = { GPIOX_9 };
 181 static const unsigned int spi_mosi_0_pins[]     = { GPIOX_10 };
 182 static const unsigned int iso7816_det_pins[]    = { GPIOX_16 };
 183 static const unsigned int iso7816_reset_pins[]  = { GPIOX_17 };
 184 static const unsigned int iso7816_1_clk_pins[]  = { GPIOX_18 };
 185 static const unsigned int iso7816_1_data_pins[] = { GPIOX_19 };
 186 static const unsigned int spi_ss0_0_pins[]      = { GPIOX_20 };
 187
 188 static const unsigned int tsin_clk_b_pins[]     = { GPIOX_8 };
 189 static const unsigned int tsin_sop_b_pins[]     = { GPIOX_9 };
 190 static const unsigned int tsin_d0_b_pins[]      = { GPIOX_10 };
 191 static const unsigned int pwm_b_pins[]          = { GPIOX_11 };
 192 static const unsigned int i2c_sda_d0_pins[]     = { GPIOX_16 };
 193 static const unsigned int i2c_sck_d0_pins[]     = { GPIOX_17 };
 194 static const unsigned int tsin_d_valid_b_pins[] = { GPIOX_20 };
 195
 196 /* bank Y */
 197 static const unsigned int tsin_d_valid_a_pins[] = { GPIOY_0 };
 198 static const unsigned int tsin_sop_a_pins[]     = { GPIOY_1 };
 199 static const unsigned int tsin_d17_a_pins[] = {
 200         GPIOY_6, GPIOY_7, GPIOY_10, GPIOY_11, GPIOY_12, GPIOY_13, GPIOY_14,
 201 };
 202 static const unsigned int tsin_clk_a_pins[]     = { GPIOY_8 };
 203 static const unsigned int tsin_d0_a_pins[]      = { GPIOY_9 };
 204
 205 static const unsigned int spdif_out_0_pins[]    = { GPIOY_3 };
 206
 207 static const unsigned int xtal_24m_pins[]       = { GPIOY_3 };
 208 static const unsigned int iso7816_2_clk_pins[]  = { GPIOY_13 };
 209 static const unsigned int iso7816_2_data_pins[] = { GPIOY_14 };
 210
 211 /* bank DV */
 212 static const unsigned int pwm_d_pins[]          = { GPIODV_28 };
 213 static const unsigned int pwm_c0_pins[]         = { GPIODV_29 };
 214
 215 static const unsigned int pwm_vs_2_pins[]       = { GPIODV_9 };
 216 static const unsigned int pwm_vs_3_pins[]       = { GPIODV_28 };
 217 static const unsigned int pwm_vs_4_pins[]       = { GPIODV_29 };
 218
 219 static const unsigned int xtal24_out_pins[]     = { GPIODV_29 };
 220
 221 static const unsigned int uart_tx_c_pins[]      = { GPIODV_24 };
 222 static const unsigned int uart_rx_c_pins[]      = { GPIODV_25 };
 223 static const unsigned int uart_cts_c_pins[]     = { GPIODV_26 };
 224 static const unsigned int uart_rts_c_pins[]     = { GPIODV_27 };
 225
 226 static const unsigned int pwm_c1_pins[]         = { GPIODV_9 };
 227
 228 static const unsigned int i2c_sda_a_pins[]      = { GPIODV_24 };
 229 static const unsigned int i2c_sck_a_pins[]      = { GPIODV_25 };
 230 static const unsigned int i2c_sda_b0_pins[]     = { GPIODV_26 };
 231 static const unsigned int i2c_sck_b0_pins[]     = { GPIODV_27 };
 232 static const unsigned int i2c_sda_c0_pins[]     = { GPIODV_28 };
 233 static const unsigned int i2c_sck_c0_pins[]     = { GPIODV_29 };
 234
 235 /* bank H */
 236 static const unsigned int hdmi_hpd_pins[]       = { GPIOH_0 };
 237 static const unsigned int hdmi_sda_pins[]       = { GPIOH_1 };
 238 static const unsigned int hdmi_scl_pins[]       = { GPIOH_2 };
 239 static const unsigned int hdmi_cec_0_pins[]     = { GPIOH_3 };
 240 static const unsigned int eth_txd1_0_pins[]     = { GPIOH_5 };
 241 static const unsigned int eth_txd0_0_pins[]     = { GPIOH_6 };
 242 static const unsigned int clk_24m_out_pins[]    = { GPIOH_9 };
 243
 244 static const unsigned int spi_ss1_pins[]        = { GPIOH_0 };
 245 static const unsigned int spi_ss2_pins[]        = { GPIOH_1 };
 246 static const unsigned int spi_ss0_1_pins[]      = { GPIOH_3 };
 247 static const unsigned int spi_miso_1_pins[]     = { GPIOH_4 };
 248 static const unsigned int spi_mosi_1_pins[]     = { GPIOH_5 };
 249 static const unsigned int spi_sclk_1_pins[]     = { GPIOH_6 };
 250
 251 static const unsigned int eth_txd3_pins[]       = { GPIOH_7 };
 252 static const unsigned int eth_txd2_pins[]       = { GPIOH_8 };
 253 static const unsigned int eth_tx_clk_pins[]     = { GPIOH_9 };
 254
 255 static const unsigned int i2c_sda_b1_pins[]     = { GPIOH_3 };
 256 static const unsigned int i2c_sck_b1_pins[]     = { GPIOH_4 };
 257 static const unsigned int i2c_sda_c1_pins[]     = { GPIOH_5 };
 258 static const unsigned int i2c_sck_c1_pins[]     = { GPIOH_6 };
 259 static const unsigned int i2c_sda_d1_pins[]     = { GPIOH_7 };
 260 static const unsigned int i2c_sck_d1_pins[]     = { GPIOH_8 };
 261
 262 /* bank BOOT */
 263 static const unsigned int nand_io_pins[] = {
 264         BOOT_0, BOOT_1, BOOT_2, BOOT_3, BOOT_4, BOOT_5, BOOT_6, BOOT_7
 265 };
 266 static const unsigned int nand_io_ce0_pins[]    = { BOOT_8 };
 267 static const unsigned int nand_io_ce1_pins[]    = { BOOT_9 };
 268 static const unsigned int nand_io_rb0_pins[]    = { BOOT_10 };
 269 static const unsigned int nand_ale_pins[]       = { BOOT_11 };
 270 static const unsigned int nand_cle_pins[]       = { BOOT_12 };
 271 static const unsigned int nand_wen_clk_pins[]   = { BOOT_13 };
 272 static const unsigned int nand_ren_clk_pins[]   = { BOOT_14 };
 273 static const unsigned int nand_dqs_15_pins[]    = { BOOT_15 };
 274 static const unsigned int nand_dqs_18_pins[]    = { BOOT_18 };
 275
 276 static const unsigned int sdxc_d0_c_pins[]      = { BOOT_0};
 277 static const unsigned int sdxc_d13_c_pins[]     = { BOOT_1, BOOT_2,
 278                                                     BOOT_3 };
 279 static const unsigned int sdxc_d47_c_pins[]     = { BOOT_4, BOOT_5,
 280                                                     BOOT_6, BOOT_7 };
 281 static const unsigned int sdxc_clk_c_pins[]     = { BOOT_8 };
 282 static const unsigned int sdxc_cmd_c_pins[]     = { BOOT_10 };
 283 static const unsigned int nor_d_pins[]          = { BOOT_11 };
 284 static const unsigned int nor_q_pins[]          = { BOOT_12 };
 285 static const unsigned int nor_c_pins[]          = { BOOT_13 };
 286 static const unsigned int nor_cs_pins[]         = { BOOT_18 };
 287
 288 static const unsigned int sd_d0_c_pins[]        = { BOOT_0 };
 289 static const unsigned int sd_d1_c_pins[]        = { BOOT_1 };
 290 static const unsigned int sd_d2_c_pins[]        = { BOOT_2 };
 291 static const unsigned int sd_d3_c_pins[]        = { BOOT_3 };
 292 static const unsigned int sd_cmd_c_pins[]       = { BOOT_8 };
 293 static const unsigned int sd_clk_c_pins[]       = { BOOT_10 };
 294
 295 /* bank CARD */
 296 static const unsigned int sd_d1_b_pins[]        = { CARD_0 };
 297 static const unsigned int sd_d0_b_pins[]        = { CARD_1 };
 298 static const unsigned int sd_clk_b_pins[]       = { CARD_2 };
 299 static const unsigned int sd_cmd_b_pins[]       = { CARD_3 };
 300 static const unsigned int sd_d3_b_pins[]        = { CARD_4 };
 301 static const unsigned int sd_d2_b_pins[]        = { CARD_5 };
 302
 303 static const unsigned int sdxc_d13_b_pins[]     = { CARD_0,  CARD_4,
 304                                                     CARD_5 };
 305 static const unsigned int sdxc_d0_b_pins[]      = { CARD_1 };
 306 static const unsigned int sdxc_clk_b_pins[]     = { CARD_2 };
 307 static const unsigned int sdxc_cmd_b_pins[]     = { CARD_3 };
 308
 309 /* bank AO */
 310 static const unsigned int uart_tx_ao_a_pins[]   = { GPIOAO_0 };
 311 static const unsigned int uart_rx_ao_a_pins[]   = { GPIOAO_1 };
 312 static const unsigned int uart_cts_ao_a_pins[]  = { GPIOAO_2 };
 313 static const unsigned int uart_rts_ao_a_pins[]  = { GPIOAO_3 };
 314 static const unsigned int i2c_mst_sck_ao_pins[] = { GPIOAO_4 };
 315 static const unsigned int i2c_mst_sda_ao_pins[] = { GPIOAO_5 };
 316 static const unsigned int clk_32k_in_out_pins[] = { GPIOAO_6 };
 317 static const unsigned int remote_input_pins[]   = { GPIOAO_7 };
 318 static const unsigned int hdmi_cec_1_pins[]     = { GPIOAO_12 };
 319 static const unsigned int ir_blaster_pins[]     = { GPIOAO_13 };
 320
 321 static const unsigned int pwm_c2_pins[]         = { GPIOAO_3 };
 322 static const unsigned int i2c_sck_ao_pins[]     = { GPIOAO_4 };
 323 static const unsigned int i2c_sda_ao_pins[]     = { GPIOAO_5 };
 324 static const unsigned int ir_remote_out_pins[]  = { GPIOAO_7 };
 325 static const unsigned int i2s_am_clk_out_pins[] = { GPIOAO_8 };
 326 static const unsigned int i2s_ao_clk_out_pins[] = { GPIOAO_9 };
 327 static const unsigned int i2s_lr_clk_out_pins[] = { GPIOAO_10 };
 328 static const unsigned int i2s_out_01_pins[]     = { GPIOAO_11 };
 329
 330 static const unsigned int uart_tx_ao_b0_pins[]  = { GPIOAO_0 };
 331 static const unsigned int uart_rx_ao_b0_pins[]  = { GPIOAO_1 };
 332 static const unsigned int uart_cts_ao_b_pins[]  = { GPIOAO_2 };
 333 static const unsigned int uart_rts_ao_b_pins[]  = { GPIOAO_3 };
 334 static const unsigned int uart_tx_ao_b1_pins[]  = { GPIOAO_4 };
 335 static const unsigned int uart_rx_ao_b1_pins[]  = { GPIOAO_5 };
 336 static const unsigned int spdif_out_1_pins[]    = { GPIOAO_6 };
 337
 338 static const unsigned int i2s_in_ch01_pins[]    = { GPIOAO_6 };
 339 static const unsigned int i2s_ao_clk_in_pins[]  = { GPIOAO_9 };
 340 static const unsigned int i2s_lr_clk_in_pins[]  = { GPIOAO_10 };
 341
 342 /* bank DIF */
 343 static const unsigned int eth_rxd1_pins[]       = { DIF_0_P };
 344 static const unsigned int eth_rxd0_pins[]       = { DIF_0_N };
 345 static const unsigned int eth_rx_dv_pins[]      = { DIF_1_P };
 346 static const unsigned int eth_rx_clk_pins[]     = { DIF_1_N };
 347 static const unsigned int eth_txd0_1_pins[]     = { DIF_2_P };
 348 static const unsigned int eth_txd1_1_pins[]     = { DIF_2_N };
 349 static const unsigned int eth_tx_en_pins[]      = { DIF_3_P };
 350 static const unsigned int eth_ref_clk_pins[]    = { DIF_3_N };
 351 static const unsigned int eth_mdc_pins[]        = { DIF_4_P };
 352 static const unsigned int eth_mdio_en_pins[]    = { DIF_4_N };
 353
 354 static struct meson_pmx_group meson8b_cbus_groups[] = {
 355         GPIO_GROUP(GPIOX_0),
 356         GPIO_GROUP(GPIOX_1),
 357         GPIO_GROUP(GPIOX_2),
 358         GPIO_GROUP(GPIOX_3),
 359         GPIO_GROUP(GPIOX_4),
 360         GPIO_GROUP(GPIOX_5),
 361         GPIO_GROUP(GPIOX_6),
 362         GPIO_GROUP(GPIOX_7),
 363         GPIO_GROUP(GPIOX_8),
 364         GPIO_GROUP(GPIOX_9),
 365         GPIO_GROUP(GPIOX_10),
 366         GPIO_GROUP(GPIOX_11),
 367         GPIO_GROUP(GPIOX_16),
 368         GPIO_GROUP(GPIOX_17),
 369         GPIO_GROUP(GPIOX_18),
 370         GPIO_GROUP(GPIOX_19),
 371         GPIO_GROUP(GPIOX_20),
 372         GPIO_GROUP(GPIOX_21),
 373
 374         GPIO_GROUP(GPIOY_0),
 375         GPIO_GROUP(GPIOY_1),
 376         GPIO_GROUP(GPIOY_3),
 377         GPIO_GROUP(GPIOY_6),
 378         GPIO_GROUP(GPIOY_7),
 379         GPIO_GROUP(GPIOY_8),
 380         GPIO_GROUP(GPIOY_9),
 381         GPIO_GROUP(GPIOY_10),
 382         GPIO_GROUP(GPIOY_11),
 383         GPIO_GROUP(GPIOY_12),
 384         GPIO_GROUP(GPIOY_13),
 385         GPIO_GROUP(GPIOY_14),
 386
 387         GPIO_GROUP(GPIODV_9),
 388         GPIO_GROUP(GPIODV_24),
 389         GPIO_GROUP(GPIODV_25),
 390         GPIO_GROUP(GPIODV_26),
 391         GPIO_GROUP(GPIODV_27),
 392         GPIO_GROUP(GPIODV_28),
 393         GPIO_GROUP(GPIODV_29),
 394
 395         GPIO_GROUP(GPIOH_0),
 396         GPIO_GROUP(GPIOH_1),
 397         GPIO_GROUP(GPIOH_2),
 398         GPIO_GROUP(GPIOH_3),
 399         GPIO_GROUP(GPIOH_4),
 400         GPIO_GROUP(GPIOH_5),
 401         GPIO_GROUP(GPIOH_6),
 402         GPIO_GROUP(GPIOH_7),
 403         GPIO_GROUP(GPIOH_8),
 404         GPIO_GROUP(GPIOH_9),
 405
 406         GPIO_GROUP(DIF_0_P),
 407         GPIO_GROUP(DIF_0_N),
 408         GPIO_GROUP(DIF_1_P),
 409         GPIO_GROUP(DIF_1_N),
 410         GPIO_GROUP(DIF_2_P),
 411         GPIO_GROUP(DIF_2_N),
 412         GPIO_GROUP(DIF_3_P),
 413         GPIO_GROUP(DIF_3_N),
 414         GPIO_GROUP(DIF_4_P),
 415         GPIO_GROUP(DIF_4_N),
 416
 417         /* bank X */
 418         GROUP(sd_d0_a,          8,      5),
 419         GROUP(sd_d1_a,          8,      4),
 420         GROUP(sd_d2_a,          8,      3),
 421         GROUP(sd_d3_a,          8,      2),
 422         GROUP(sdxc_d0_0_a,      5,      29),
 423         GROUP(sdxc_d47_a,       5,      12),
 424         GROUP(sdxc_d13_0_a,     5,      28),
 425         GROUP(sd_clk_a,         8,      1),
 426         GROUP(sd_cmd_a,         8,      0),
 427         GROUP(xtal_32k_out,     3,      22),
 428         GROUP(xtal_24m_out,     3,      20),
 429         GROUP(uart_tx_b0,       4,      9),
 430         GROUP(uart_rx_b0,       4,      8),
 431         GROUP(uart_cts_b0,      4,      7),
 432         GROUP(uart_rts_b0,      4,      6),
 433         GROUP(sdxc_d0_1_a,      5,      14),
 434         GROUP(sdxc_d13_1_a,     5,      13),
 435         GROUP(pcm_out_a,        3,      30),
 436         GROUP(pcm_in_a,         3,      29),
 437         GROUP(pcm_fs_a,         3,      28),
 438         GROUP(pcm_clk_a,        3,      27),
 439         GROUP(sdxc_clk_a,       5,      11),
 440         GROUP(sdxc_cmd_a,       5,      10),
 441         GROUP(pwm_vs_0,         7,      31),
 442         GROUP(pwm_e,            9,      19),
 443         GROUP(pwm_vs_1,         7,      30),
 444         GROUP(uart_tx_a,        4,      17),
 445         GROUP(uart_rx_a,        4,      16),
 446         GROUP(uart_cts_a,       4,      15),
 447         GROUP(uart_rts_a,       4,      14),
 448         GROUP(uart_tx_b1,       6,      19),
 449         GROUP(uart_rx_b1,       6,      18),
 450         GROUP(uart_cts_b1,      6,      17),
 451         GROUP(uart_rts_b1,      6,      16),
 452         GROUP(iso7816_0_clk,    5,      9),
 453         GROUP(iso7816_0_data,   5,      8),
 454         GROUP(spi_sclk_0,       4,      22),
 455         GROUP(spi_miso_0,       4,      24),
 456         GROUP(spi_mosi_0,       4,      23),
 457         GROUP(iso7816_det,      4,      21),
 458         GROUP(iso7816_reset,    4,      20),
 459         GROUP(iso7816_1_clk,    4,      19),
 460         GROUP(iso7816_1_data,   4,      18),
 461         GROUP(spi_ss0_0,        4,      25),
 462         GROUP(tsin_clk_b,       3,      6),
 463         GROUP(tsin_sop_b,       3,      7),
 464         GROUP(tsin_d0_b,        3,      8),
 465         GROUP(pwm_b,            2,      3),
 466         GROUP(i2c_sda_d0,       4,      5),
 467         GROUP(i2c_sck_d0,       4,      4),
 468         GROUP(tsin_d_valid_b,   3,      9),
 469
 470         /* bank Y */
 471         GROUP(tsin_d_valid_a,   3,      2),
 472         GROUP(tsin_sop_a,       3,      1),
 473         GROUP(tsin_d17_a,       3,      5),
 474         GROUP(tsin_clk_a,       3,      0),
 475         GROUP(tsin_d0_a,        3,      4),
 476         GROUP(spdif_out_0,      1,      7),
 477         GROUP(xtal_24m,         3,      18),
 478         GROUP(iso7816_2_clk,    5,      7),
 479         GROUP(iso7816_2_data,   5,      6),
 480
 481         /* bank DV */
 482         GROUP(pwm_d,            3,      26),
 483         GROUP(pwm_c0,           3,      25),
 484         GROUP(pwm_vs_2,         7,      28),
 485         GROUP(pwm_vs_3,         7,      27),
 486         GROUP(pwm_vs_4,         7,      26),
 487         GROUP(xtal24_out,       7,      25),
 488         GROUP(uart_tx_c,        6,      23),
 489         GROUP(uart_rx_c,        6,      22),
 490         GROUP(uart_cts_c,       6,      21),
 491         GROUP(uart_rts_c,       6,      20),
 492         GROUP(pwm_c1,           3,      24),
 493         GROUP(i2c_sda_a,        9,      31),
 494         GROUP(i2c_sck_a,        9,      30),
 495         GROUP(i2c_sda_b0,       9,      29),
 496         GROUP(i2c_sck_b0,       9,      28),
 497         GROUP(i2c_sda_c0,       9,      27),
 498         GROUP(i2c_sck_c0,       9,      26),
 499
 500         /* bank H */
 501         GROUP(hdmi_hpd,         1,      26),
 502         GROUP(hdmi_sda,         1,      25),
 503         GROUP(hdmi_scl,         1,      24),
 504         GROUP(hdmi_cec_0,       1,      23),
 505         GROUP(eth_txd1_0,       7,      21),
 506         GROUP(eth_txd0_0,       7,      20),
 507         GROUP(clk_24m_out,      4,      1),
 508         GROUP(spi_ss1,          8,      11),
 509         GROUP(spi_ss2,          8,      12),
 510         GROUP(spi_ss0_1,        9,      13),
 511         GROUP(spi_miso_1,       9,      12),
 512         GROUP(spi_mosi_1,       9,      11),
 513         GROUP(spi_sclk_1,       9,      10),
 514         GROUP(eth_txd3,         6,      13),
 515         GROUP(eth_txd2,         6,      12),
 516         GROUP(eth_tx_clk,       6,      11),
 517         GROUP(i2c_sda_b1,       5,      27),
 518         GROUP(i2c_sck_b1,       5,      26),
 519         GROUP(i2c_sda_c1,       5,      25),
 520         GROUP(i2c_sck_c1,       5,      24),
 521         GROUP(i2c_sda_d1,       4,      3),
 522         GROUP(i2c_sck_d1,       4,      2),
 523
 524         /* bank BOOT */
 525         GROUP(nand_io,          2,      26),
 526         GROUP(nand_io_ce0,      2,      25),
 527         GROUP(nand_io_ce1,      2,      24),
 528         GROUP(nand_io_rb0,      2,      17),
 529         GROUP(nand_ale,         2,      21),
 530         GROUP(nand_cle,         2,      20),
 531         GROUP(nand_wen_clk,     2,      19),
 532         GROUP(nand_ren_clk,     2,      18),
 533         GROUP(nand_dqs_15,      2,      27),
 534         GROUP(nand_dqs_18,      2,      28),
 535         GROUP(sdxc_d0_c,        4,      30),
 536         GROUP(sdxc_d13_c,       4,      29),
 537         GROUP(sdxc_d47_c,       4,      28),
 538         GROUP(sdxc_clk_c,       7,      19),
 539         GROUP(sdxc_cmd_c,       7,      18),
 540         GROUP(nor_d,            5,      1),
 541         GROUP(nor_q,            5,      3),
 542         GROUP(nor_c,            5,      2),
 543         GROUP(nor_cs,           5,      0),
 544         GROUP(sd_d0_c,          6,      29),
 545         GROUP(sd_d1_c,          6,      28),
 546         GROUP(sd_d2_c,          6,      27),
 547         GROUP(sd_d3_c,          6,      26),
 548         GROUP(sd_cmd_c,         6,      30),
 549         GROUP(sd_clk_c,         6,      31),
 550
 551         /* bank CARD */
 552         GROUP(sd_d1_b,          2,      14),
 553         GROUP(sd_d0_b,          2,      15),
 554         GROUP(sd_clk_b,         2,      11),
 555         GROUP(sd_cmd_b,         2,      10),
 556         GROUP(sd_d3_b,          2,      12),
 557         GROUP(sd_d2_b,          2,      13),
 558         GROUP(sdxc_d13_b,       2,      6),
 559         GROUP(sdxc_d0_b,        2,      7),
 560         GROUP(sdxc_clk_b,       2,      5),
 561         GROUP(sdxc_cmd_b,       2,      4),
 562
 563         /* bank DIF */
 564         GROUP(eth_rxd1,         6,      0),
 565         GROUP(eth_rxd0,         6,      1),
 566         GROUP(eth_rx_dv,        6,      2),
 567         GROUP(eth_rx_clk,       6,      3),
 568         GROUP(eth_txd0_1,       6,      4),
 569         GROUP(eth_txd1_1,       6,      5),
 570         GROUP(eth_tx_en,        6,      6),
 571         GROUP(eth_ref_clk,      6,      8),
 572         GROUP(eth_mdc,          6,      9),
 573         GROUP(eth_mdio_en,      6,      10),
 574 };
 575
 576 static struct meson_pmx_group meson8b_aobus_groups[] = {
 577         GPIO_GROUP(GPIOAO_0),
 578         GPIO_GROUP(GPIOAO_1),
 579         GPIO_GROUP(GPIOAO_2),
 580         GPIO_GROUP(GPIOAO_3),
 581         GPIO_GROUP(GPIOAO_4),
 582         GPIO_GROUP(GPIOAO_5),
 583         GPIO_GROUP(GPIOAO_6),
 584         GPIO_GROUP(GPIOAO_7),
 585         GPIO_GROUP(GPIOAO_8),
 586         GPIO_GROUP(GPIOAO_9),
 587         GPIO_GROUP(GPIOAO_10),
 588         GPIO_GROUP(GPIOAO_11),
 589         GPIO_GROUP(GPIOAO_12),
 590         GPIO_GROUP(GPIOAO_13),
 591         GPIO_GROUP(GPIO_BSD_EN),
 592         GPIO_GROUP(GPIO_TEST_N),
 593
 594         /* bank AO */
 595         GROUP(uart_tx_ao_a,     0,      12),
 596         GROUP(uart_rx_ao_a,     0,      11),
 597         GROUP(uart_cts_ao_a,    0,      10),
 598         GROUP(uart_rts_ao_a,    0,      9),
 599         GROUP(i2c_mst_sck_ao,   0,      6),
 600         GROUP(i2c_mst_sda_ao,   0,      5),
 601         GROUP(clk_32k_in_out,   0,      18),
 602         GROUP(remote_input,     0,      0),
 603         GROUP(hdmi_cec_1,       0,      17),
 604         GROUP(ir_blaster,       0,      31),
 605         GROUP(pwm_c2,           0,      22),
 606         GROUP(i2c_sck_ao,       0,      2),
 607         GROUP(i2c_sda_ao,       0,      1),
 608         GROUP(ir_remote_out,    0,      21),
 609         GROUP(i2s_am_clk_out,   0,      30),
 610         GROUP(i2s_ao_clk_out,   0,      29),
 611         GROUP(i2s_lr_clk_out,   0,      28),
 612         GROUP(i2s_out_01,       0,      27),
 613         GROUP(uart_tx_ao_b0,    0,      26),
 614         GROUP(uart_rx_ao_b0,    0,      25),
 615         GROUP(uart_cts_ao_b,    0,      8),
 616         GROUP(uart_rts_ao_b,    0,      7),
 617         GROUP(uart_tx_ao_b1,    0,      24),
 618         GROUP(uart_rx_ao_b1,    0,      23),
 619         GROUP(spdif_out_1,      0,      16),
 620         GROUP(i2s_in_ch01,      0,      13),
 621         GROUP(i2s_ao_clk_in,    0,      15),
 622         GROUP(i2s_lr_clk_in,    0,      14),
 623 };
 624
 625 static const char * const gpio_groups[] = {
 626         "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4",
 627         "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9",
 628         "GPIOX_10", "GPIOX_11", "GPIOX_16", "GPIOX_17", "GPIOX_18",
 629         "GPIOX_19", "GPIOX_20", "GPIOX_21",
 630
 631         "GPIOY_0", "GPIOY_1", "GPIOY_3", "GPIOY_6", "GPIOY_7",
 632         "GPIOY_8", "GPIOY_9", "GPIOY_10", "GPIOY_11", "GPIOY_12",
 633         "GPIOY_13", "GPIOY_14",
 634
 635         "GPIODV_9", "GPIODV_24", "GPIODV_25", "GPIODV_26",
 636         "GPIODV_27", "GPIODV_28", "GPIODV_29",
 637
 638         "GPIOH_0", "GPIOH_1", "GPIOH_2", "GPIOH_3", "GPIOH_4",
 639         "GPIOH_5", "GPIOH_6", "GPIOH_7", "GPIOH_8", "GPIOH_9",
 640
 641         "CARD_0", "CARD_1", "CARD_2", "CARD_3", "CARD_4",
 642         "CARD_5", "CARD_6",
 643
 644         "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4",
 645         "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9",
 646         "BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14",
 647         "BOOT_15", "BOOT_16", "BOOT_17", "BOOT_18",
 648
 649         "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3",
 650         "GPIOAO_4", "GPIOAO_5", "GPIOAO_6", "GPIOAO_7",
 651         "GPIOAO_8", "GPIOAO_9", "GPIOAO_10", "GPIOAO_11",
 652         "GPIOAO_12", "GPIOAO_13", "GPIO_BSD_EN", "GPIO_TEST_N",
 653
 654         "DIF_0_P", "DIF_0_N", "DIF_1_P", "DIF_1_N",
 655         "DIF_2_P", "DIF_2_N", "DIF_3_P", "DIF_3_N",
 656         "DIF_4_P", "DIF_4_N"
 657 };
 658
 659 static const char * const sd_a_groups[] = {
 660         "sd_d0_a", "sd_d1_a", "sd_d2_a", "sd_d3_a", "sd_clk_a",
 661         "sd_cmd_a"
 662 };
 663
 664 static const char * const sdxc_a_groups[] = {
 665         "sdxc_d0_0_a", "sdxc_d13_0_a", "sdxc_d47_a", "sdxc_clk_a",
 666         "sdxc_cmd_a", "sdxc_d0_1_a", "sdxc_d0_13_1_a"
 667 };
 668
 669 static const char * const pcm_a_groups[] = {
 670         "pcm_out_a", "pcm_in_a", "pcm_fs_a", "pcm_clk_a"
 671 };
 672
 673 static const char * const uart_a_groups[] = {
 674         "uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a"
 675 };
 676
 677 static const char * const uart_b_groups[] = {
 678         "uart_tx_b0", "uart_rx_b0", "uart_cts_b0", "uart_rts_b0",
 679         "uart_tx_b1", "uart_rx_b1", "uart_cts_b1", "uart_rts_b1"
 680 };
 681
 682 static const char * const iso7816_groups[] = {
 683         "iso7816_det", "iso7816_reset", "iso7816_0_clk", "iso7816_0_data",
 684         "iso7816_1_clk", "iso7816_1_data", "iso7816_2_clk", "iso7816_2_data"
 685 };
 686
 687 static const char * const i2c_d_groups[] = {
 688         "i2c_sda_d0", "i2c_sck_d0", "i2c_sda_d1", "i2c_sck_d1"
 689 };
 690
 691 static const char * const xtal_groups[] = {
 692         "xtal_32k_out", "xtal_24m_out", "xtal_24m", "xtal24_out"
 693 };
 694
 695 static const char * const uart_c_groups[] = {
 696         "uart_tx_c", "uart_rx_c", "uart_cts_c", "uart_rts_c"
 697 };
 698
 699 static const char * const i2c_c_groups[] = {
 700         "i2c_sda_c0", "i2c_sck_c0", "i2c_sda_c1", "i2c_sck_c1"
 701 };
 702
 703 static const char * const hdmi_groups[] = {
 704         "hdmi_hpd", "hdmi_sda", "hdmi_scl", "hdmi_cec_0"
 705 };
 706
 707 static const char * const hdmi_cec_groups[] = {
 708         "hdmi_cec_1"
 709 };
 710
 711 static const char * const spi_groups[] = {
 712         "spi_ss0_0", "spi_miso_0", "spi_mosi_0", "spi_sclk_0",
 713         "spi_ss0_1", "spi_ss1", "spi_sclk_1", "spi_mosi_1",
 714         "spi_miso_1", "spi_ss2"
 715 };
 716
 717 static const char * const ethernet_groups[] = {
 718         "eth_tx_clk", "eth_tx_en", "eth_txd1_0", "eth_txd1_1",
 719         "eth_txd0_0", "eth_txd0_1", "eth_rx_clk", "eth_rx_dv",
 720         "eth_rxd1", "eth_rxd0", "eth_mdio_en", "eth_mdc", "eth_ref_clk",
 721         "eth_txd2", "eth_txd3"
 722 };
 723
 724 static const char * const i2c_a_groups[] = {
 725         "i2c_sda_a", "i2c_sck_a",
 726 };
 727
 728 static const char * const i2c_b_groups[] = {
 729         "i2c_sda_b0", "i2c_sck_b0", "i2c_sda_b1", "i2c_sck_b1"
 730 };
 731
 732 static const char * const sd_c_groups[] = {
 733         "sd_d0_c", "sd_d1_c", "sd_d2_c", "sd_d3_c",
 734         "sd_cmd_c", "sd_clk_c"
 735 };
 736
 737 static const char * const sdxc_c_groups[] = {
 738         "sdxc_d0_c", "sdxc_d13_c", "sdxc_d47_c", "sdxc_cmd_c",
 739         "sdxc_clk_c"
 740 };
 741
 742 static const char * const nand_groups[] = {
 743         "nand_io", "nand_io_ce0", "nand_io_ce1",
 744         "nand_io_rb0", "nand_ale", "nand_cle",
 745         "nand_wen_clk", "nand_ren_clk", "nand_dqs_15",
 746         "nand_dqs_18"
 747 };
 748
 749 static const char * const nor_groups[] = {
 750         "nor_d", "nor_q", "nor_c", "nor_cs"
 751 };
 752
 753 static const char * const sd_b_groups[] = {
 754         "sd_d1_b", "sd_d0_b", "sd_clk_b", "sd_cmd_b",
 755         "sd_d3_b", "sd_d2_b"
 756 };
 757
 758 static const char * const sdxc_b_groups[] = {
 759         "sdxc_d13_b", "sdxc_d0_b", "sdxc_clk_b", "sdxc_cmd_b"
 760 };
 761
 762 static const char * const uart_ao_groups[] = {
 763         "uart_tx_ao_a", "uart_rx_ao_a", "uart_cts_ao_a", "uart_rts_ao_a"
 764 };
 765
 766 static const char * const remote_groups[] = {
 767         "remote_input", "ir_blaster", "ir_remote_out"
 768 };
 769
 770 static const char * const i2c_slave_ao_groups[] = {
 771         "i2c_sck_ao", "i2c_sda_ao"
 772 };
 773
 774 static const char * const uart_ao_b_groups[] = {
 775         "uart_tx_ao_b0", "uart_rx_ao_b0", "uart_tx_ao_b1", "uart_rx_ao_b1",
 776         "uart_cts_ao_b", "uart_rts_ao_b"
 777 };
 778
 779 static const char * const i2c_mst_ao_groups[] = {
 780         "i2c_mst_sck_ao", "i2c_mst_sda_ao"
 781 };
 782
 783 static const char * const clk_24m_groups[] = {
 784         "clk_24m_out"
 785 };
 786
 787 static const char * const clk_32k_groups[] = {
 788         "clk_32k_in_out"
 789 };
 790
 791 static const char * const spdif_0_groups[] = {
 792         "spdif_out_0"
 793 };
 794
 795 static const char * const spdif_1_groups[] = {
 796         "spdif_out_1"
 797 };
 798
 799 static const char * const i2s_groups[] = {
 800         "i2s_am_clk_out", "i2s_ao_clk_out", "i2s_lr_clk_out",
 801         "i2s_out_01", "i2s_in_ch01", "i2s_ao_clk_in",
 802         "i2s_lr_clk_in"
 803 };
 804
 805 static const char * const pwm_b_groups[] = {
 806         "pwm_b"
 807 };
 808
 809 static const char * const pwm_c_groups[] = {
 810         "pwm_c0", "pwm_c1"
 811 };
 812
 813 static const char * const pwm_c_ao_groups[] = {
 814         "pwm_c2"
 815 };
 816
 817 static const char * const pwm_d_groups[] = {
 818         "pwm_d"
 819 };
 820
 821 static const char * const pwm_e_groups[] = {
 822         "pwm_e"
 823 };
 824
 825 static const char * const pwm_vs_groups[] = {
 826         "pwm_vs_0", "pwm_vs_1", "pwm_vs_2",
 827         "pwm_vs_3", "pwm_vs_4"
 828 };
 829
 830 static const char * const tsin_a_groups[] = {
 831         "tsin_d0_a", "tsin_d17_a", "tsin_clk_a", "tsin_sop_a",
 832         "tsin_d_valid_a"
 833 };
 834
 835 static const char * const tsin_b_groups[] = {
 836         "tsin_d0_b", "tsin_clk_b", "tsin_sop_b", "tsin_d_valid_b"
 837 };
 838
 839 static struct meson_pmx_func meson8b_cbus_functions[] = {
 840         FUNCTION(gpio),
 841         FUNCTION(sd_a),
 842         FUNCTION(sdxc_a),
 843         FUNCTION(pcm_a),
 844         FUNCTION(uart_a),
 845         FUNCTION(uart_b),
 846         FUNCTION(iso7816),
 847         FUNCTION(i2c_d),
 848         FUNCTION(xtal),
 849         FUNCTION(uart_c),
 850         FUNCTION(i2c_c),
 851         FUNCTION(hdmi),
 852         FUNCTION(spi),
 853         FUNCTION(ethernet),
 854         FUNCTION(i2c_a),
 855         FUNCTION(i2c_b),
 856         FUNCTION(sd_c),
 857         FUNCTION(sdxc_c),
 858         FUNCTION(nand),
 859         FUNCTION(nor),
 860         FUNCTION(sd_b),
 861         FUNCTION(sdxc_b),
 862         FUNCTION(spdif_0),
 863         FUNCTION(pwm_b),
 864         FUNCTION(pwm_c),
 865         FUNCTION(pwm_d),
 866         FUNCTION(pwm_e),
 867         FUNCTION(pwm_vs),
 868         FUNCTION(tsin_a),
 869         FUNCTION(tsin_b),
 870         FUNCTION(clk_24m),
 871 };
 872
 873 static struct meson_pmx_func meson8b_aobus_functions[] = {
 874         FUNCTION(uart_ao),
 875         FUNCTION(uart_ao_b),
 876         FUNCTION(i2c_slave_ao),
 877         FUNCTION(i2c_mst_ao),
 878         FUNCTION(i2s),
 879         FUNCTION(remote),
 880         FUNCTION(clk_32k),
 881         FUNCTION(pwm_c_ao),
 882         FUNCTION(spdif_1),
 883         FUNCTION(hdmi_cec),
 884 };
 885
 886 static struct meson_bank meson8b_cbus_banks[] = {
 887         /*   name    first              last        irq      pullen  pull    dir     out     in  */
 888         BANK("X",    GPIOX_0,           GPIOX_21,   97, 118, 4,  0,  4,  0,  0,  0,  1,  0,  2,  0),
 889         BANK("Y",    GPIOY_0,           GPIOY_14,   80,  96, 3,  0,  3,  0,  3,  0,  4,  0,  5,  0),
 890         BANK("DV",   GPIODV_9,          GPIODV_29,  59,  79, 0,  0,  0,  0,  7,  0,  8,  0,  9,  0),
 891         BANK("H",    GPIOH_0,           GPIOH_9,    14,  23, 1, 16,  1, 16,  9, 19, 10, 19, 11, 19),
 892         BANK("CARD", CARD_0,            CARD_6,     43,  49, 2, 20,  2, 20,  0, 22,  1, 22,  2, 22),
 893         BANK("BOOT", BOOT_0,            BOOT_18,    24,  42, 2,  0,  2,  0,  9,  0, 10,  0, 11,  0),
 894
 895         /*
 896          * The following bank is not mentionned in the public datasheet
 897          * There is no information whether it can be used with the gpio
 898          * interrupt controller
 899          */
 900         BANK("DIF",  DIF_0_P,           DIF_4_N,    -1,  -1, 5,  8,  5,  8, 12, 12, 13, 12, 14, 12),
 901 };
 902
 903 static struct meson_bank meson8b_aobus_banks[] = {
 904         /*   name    first     lastc        irq    pullen  pull    dir     out     in  */
 905         BANK("AO",   GPIOAO_0, GPIO_TEST_N, 0, 13, 0,  0,  0, 16,  0,  0,  0, 16,  1,  0),
 906 };
 907
 908 static struct meson_pinctrl_data meson8b_cbus_pinctrl_data = {
 909         .name           = "cbus-banks",
 910         .pins           = meson8b_cbus_pins,
 911         .groups         = meson8b_cbus_groups,
 912         .funcs          = meson8b_cbus_functions,
 913         .banks          = meson8b_cbus_banks,
 914         .num_pins       = ARRAY_SIZE(meson8b_cbus_pins),
 915         .num_groups     = ARRAY_SIZE(meson8b_cbus_groups),
 916         .num_funcs      = ARRAY_SIZE(meson8b_cbus_functions),
 917         .num_banks      = ARRAY_SIZE(meson8b_cbus_banks),
 918         .pmx_ops        = &meson8_pmx_ops,
 919 };
 920
 921 static struct meson_pinctrl_data meson8b_aobus_pinctrl_data = {
 922         .name           = "aobus-banks",
 923         .pins           = meson8b_aobus_pins,
 924         .groups         = meson8b_aobus_groups,
 925         .funcs          = meson8b_aobus_functions,
 926         .banks          = meson8b_aobus_banks,
 927         .num_pins       = ARRAY_SIZE(meson8b_aobus_pins),
 928         .num_groups     = ARRAY_SIZE(meson8b_aobus_groups),
 929         .num_funcs      = ARRAY_SIZE(meson8b_aobus_functions),
 930         .num_banks      = ARRAY_SIZE(meson8b_aobus_banks),
 931         .pmx_ops        = &meson8_pmx_ops,
 932 };
 933
 934 static const struct of_device_id meson8b_pinctrl_dt_match[] = {
 935         {
 936                 .compatible = "amlogic,meson8b-cbus-pinctrl",
 937                 .data = &meson8b_cbus_pinctrl_data,
 938         },
 939         {
 940                 .compatible = "amlogic,meson8b-aobus-pinctrl",
 941                 .data = &meson8b_aobus_pinctrl_data,
 942         },
 943         { },
 944 };
 945
 946 static struct platform_driver meson8b_pinctrl_driver = {
 947         .probe          = meson_pinctrl_probe,
 948         .driver = {
 949                 .name   = "meson8b-pinctrl",
 950                 .of_match_table = meson8b_pinctrl_dt_match,
 951         },
 952 };
 953 builtin_platform_driver(meson8b_pinctrl_driver);