drivers/reset/reset-meson.c

   1 /*
   2  * Amlogic Meson Reset Controller driver
   3  *
   4  * This file is provided under a dual BSD/GPLv2 license.  When using or
   5  * redistributing this file, you may do so under either license.
   6  *
   7  * GPL LICENSE SUMMARY
   8  *
   9  * Copyright (c) 2016 BayLibre, SAS.
  10  * Author: Neil Armstrong <narmstrong@baylibre.com>
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of version 2 of the GNU General Public License as
  14  * published by the Free Software Foundation.
  15  *
  16  * This program is distributed in the hope that it will be useful, but
  17  * WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19  * General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, see <http://www.gnu.org/licenses/>.
  23  * The full GNU General Public License is included in this distribution
  24  * in the file called COPYING.
  25  *
  26  * BSD LICENSE
  27  *
  28  * Copyright (c) 2016 BayLibre, SAS.
  29  * Author: Neil Armstrong <narmstrong@baylibre.com>
  30  *
  31  * Redistribution and use in source and binary forms, with or without
  32  * modification, are permitted provided that the following conditions
  33  * are met:
  34  *
  35  *   * Redistributions of source code must retain the above copyright
  36  *     notice, this list of conditions and the following disclaimer.
  37  *   * Redistributions in binary form must reproduce the above copyright
  38  *     notice, this list of conditions and the following disclaimer in
  39  *     the documentation and/or other materials provided with the
  40  *     distribution.
  41  *   * Neither the name of Intel Corporation nor the names of its
  42  *     contributors may be used to endorse or promote products derived
  43  *     from this software without specific prior written permission.
  44  *
  45  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  46  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  47  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  48  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  49  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  50  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  51  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  52  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  53  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  54  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  55  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  56  */
  57 #include <linux/err.h>
  58 #include <linux/init.h>
  59 #include <linux/io.h>
  60 #include <linux/of.h>
  61 #include <linux/platform_device.h>
  62 #include <linux/reset-controller.h>
  63 #include <linux/slab.h>
  64 #include <linux/types.h>
  65 #include <linux/of_device.h>
  66
  67 #define REG_COUNT       8
  68 #define BITS_PER_REG    32
  69 #define LEVEL_OFFSET    0x7c
  70
  71 struct meson_reset {
  72         void __iomem *reg_base;
  73         struct reset_controller_dev rcdev;
  74         spinlock_t lock;
  75 };
  76
  77 static int meson_reset_reset(struct reset_controller_dev *rcdev,
  78                               unsigned long id)
  79 {
  80         struct meson_reset *data =
  81                 container_of(rcdev, struct meson_reset, rcdev);
  82         unsigned int bank = id / BITS_PER_REG;
  83         unsigned int offset = id % BITS_PER_REG;
  84         void __iomem *reg_addr = data->reg_base + (bank << 2);
  85
  86         writel(BIT(offset), reg_addr);
  87
  88         return 0;
  89 }
  90
  91 static int meson_reset_level(struct reset_controller_dev *rcdev,
  92                             unsigned long id, bool assert)
  93 {
  94         struct meson_reset *data =
  95                 container_of(rcdev, struct meson_reset, rcdev);
  96         unsigned int bank = id / BITS_PER_REG;
  97         unsigned int offset = id % BITS_PER_REG;
  98         void __iomem *reg_addr = data->reg_base + LEVEL_OFFSET + (bank << 2);
  99         unsigned long flags;
 100         u32 reg;
 101
 102         spin_lock_irqsave(&data->lock, flags);
 103
 104         reg = readl(reg_addr);
 105         if (assert)
 106                 writel(reg & ~BIT(offset), reg_addr);
 107         else
 108                 writel(reg | BIT(offset), reg_addr);
 109
 110         spin_unlock_irqrestore(&data->lock, flags);
 111
 112         return 0;
 113 }
 114
 115 static int meson_reset_assert(struct reset_controller_dev *rcdev,
 116                               unsigned long id)
 117 {
 118         return meson_reset_level(rcdev, id, true);
 119 }
 120
 121 static int meson_reset_deassert(struct reset_controller_dev *rcdev,
 122                                 unsigned long id)
 123 {
 124         return meson_reset_level(rcdev, id, false);
 125 }
 126
 127 static const struct reset_control_ops meson_reset_meson8_ops = {
 128         .reset          = meson_reset_reset,
 129 };
 130
 131 static const struct reset_control_ops meson_reset_gx_ops = {
 132         .reset          = meson_reset_reset,
 133         .assert         = meson_reset_assert,
 134         .deassert       = meson_reset_deassert,
 135 };
 136
 137 static const struct of_device_id meson_reset_dt_ids[] = {
 138          { .compatible = "amlogic,meson8b-reset",
 139            .data = &meson_reset_meson8_ops, },
 140          { .compatible = "amlogic,meson-gxbb-reset",
 141            .data = &meson_reset_gx_ops, },
 142          { .compatible = "amlogic,meson-axg-reset",
 143            .data = &meson_reset_gx_ops, },
 144          { /* sentinel */ },
 145 };
 146
 147 static int meson_reset_probe(struct platform_device *pdev)
 148 {
 149         const struct reset_control_ops *ops;
 150         struct meson_reset *data;
 151         struct resource *res;
 152
 153         data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
 154         if (!data)
 155                 return -ENOMEM;
 156
 157         ops = of_device_get_match_data(&pdev->dev);
 158         if (!ops)
 159                 return -EINVAL;
 160
 161         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 162         data->reg_base = devm_ioremap_resource(&pdev->dev, res);
 163         if (IS_ERR(data->reg_base))
 164                 return PTR_ERR(data->reg_base);
 165
 166         platform_set_drvdata(pdev, data);
 167
 168         spin_lock_init(&data->lock);
 169
 170         data->rcdev.owner = THIS_MODULE;
 171         data->rcdev.nr_resets = REG_COUNT * BITS_PER_REG;
 172         data->rcdev.ops = ops;
 173         data->rcdev.of_node = pdev->dev.of_node;
 174
 175         return devm_reset_controller_register(&pdev->dev, &data->rcdev);
 176 }
 177
 178 static struct platform_driver meson_reset_driver = {
 179         .probe  = meson_reset_probe,
 180         .driver = {
 181                 .name           = "meson_reset",
 182                 .of_match_table = meson_reset_dt_ids,
 183         },
 184 };
 185 builtin_platform_driver(meson_reset_driver);