drivers/rtc/rtc-sa1100.c

   1 /*
   2  * Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx
   3  *
   4  * Copyright (c) 2000 Nils Faerber
   5  *
   6  * Based on rtc.c by Paul Gortmaker
   7  *
   8  * Original Driver by Nils Faerber <nils@kernelconcepts.de>
   9  *
  10  * Modifications from:
  11  *   CIH <cih@coventive.com>
  12  *   Nicolas Pitre <nico@fluxnic.net>
  13  *   Andrew Christian <andrew.christian@hp.com>
  14  *
  15  * Converted to the RTC subsystem and Driver Model
  16  *   by Richard Purdie <rpurdie@rpsys.net>
  17  *
  18  * This program is free software; you can redistribute it and/or
  19  * modify it under the terms of the GNU General Public License
  20  * as published by the Free Software Foundation; either version
  21  * 2 of the License, or (at your option) any later version.
  22  */
  23
  24 #include <linux/platform_device.h>
  25 #include <linux/module.h>
  26 #include <linux/clk.h>
  27 #include <linux/rtc.h>
  28 #include <linux/init.h>
  29 #include <linux/fs.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/slab.h>
  32 #include <linux/string.h>
  33 #include <linux/of.h>
  34 #include <linux/pm.h>
  35 #include <linux/bitops.h>
  36 #include <linux/io.h>
  37
  38 #define RTSR_HZE                BIT(3)  /* HZ interrupt enable */
  39 #define RTSR_ALE                BIT(2)  /* RTC alarm interrupt enable */
  40 #define RTSR_HZ                 BIT(1)  /* HZ rising-edge detected */
  41 #define RTSR_AL                 BIT(0)  /* RTC alarm detected */
  42
  43 #include "rtc-sa1100.h"
  44
  45 #define RTC_DEF_DIVIDER         (32768 - 1)
  46 #define RTC_DEF_TRIM            0
  47 #define RTC_FREQ                1024
  48
  49
  50 static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
  51 {
  52         struct sa1100_rtc *info = dev_get_drvdata(dev_id);
  53         struct rtc_device *rtc = info->rtc;
  54         unsigned int rtsr;
  55         unsigned long events = 0;
  56
  57         spin_lock(&info->lock);
  58
  59         rtsr = readl_relaxed(info->rtsr);
  60         /* clear interrupt sources */
  61         writel_relaxed(0, info->rtsr);
  62         /* Fix for a nasty initialization problem the in SA11xx RTSR register.
  63          * See also the comments in sa1100_rtc_probe(). */
  64         if (rtsr & (RTSR_ALE | RTSR_HZE)) {
  65                 /* This is the original code, before there was the if test
  66                  * above. This code does not clear interrupts that were not
  67                  * enabled. */
  68                 writel_relaxed((RTSR_AL | RTSR_HZ) & (rtsr >> 2), info->rtsr);
  69         } else {
  70                 /* For some reason, it is possible to enter this routine
  71                  * without interruptions enabled, it has been tested with
  72                  * several units (Bug in SA11xx chip?).
  73                  *
  74                  * This situation leads to an infinite "loop" of interrupt
  75                  * routine calling and as a result the processor seems to
  76                  * lock on its first call to open(). */
  77                 writel_relaxed(RTSR_AL | RTSR_HZ, info->rtsr);
  78         }
  79
  80         /* clear alarm interrupt if it has occurred */
  81         if (rtsr & RTSR_AL)
  82                 rtsr &= ~RTSR_ALE;
  83         writel_relaxed(rtsr & (RTSR_ALE | RTSR_HZE), info->rtsr);
  84
  85         /* update irq data & counter */
  86         if (rtsr & RTSR_AL)
  87                 events |= RTC_AF | RTC_IRQF;
  88         if (rtsr & RTSR_HZ)
  89                 events |= RTC_UF | RTC_IRQF;
  90
  91         rtc_update_irq(rtc, 1, events);
  92
  93         spin_unlock(&info->lock);
  94
  95         return IRQ_HANDLED;
  96 }
  97
  98 static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
  99 {
 100         u32 rtsr;
 101         struct sa1100_rtc *info = dev_get_drvdata(dev);
 102
 103         spin_lock_irq(&info->lock);
 104         rtsr = readl_relaxed(info->rtsr);
 105         if (enabled)
 106                 rtsr |= RTSR_ALE;
 107         else
 108                 rtsr &= ~RTSR_ALE;
 109         writel_relaxed(rtsr, info->rtsr);
 110         spin_unlock_irq(&info->lock);
 111         return 0;
 112 }
 113
 114 static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm)
 115 {
 116         struct sa1100_rtc *info = dev_get_drvdata(dev);
 117
 118         rtc_time_to_tm(readl_relaxed(info->rcnr), tm);
 119         return 0;
 120 }
 121
 122 static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm)
 123 {
 124         struct sa1100_rtc *info = dev_get_drvdata(dev);
 125         unsigned long time;
 126         int ret;
 127
 128         ret = rtc_tm_to_time(tm, &time);
 129         if (ret == 0)
 130                 writel_relaxed(time, info->rcnr);
 131         return ret;
 132 }
 133
 134 static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 135 {
 136         u32     rtsr;
 137         struct sa1100_rtc *info = dev_get_drvdata(dev);
 138
 139         rtsr = readl_relaxed(info->rtsr);
 140         alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
 141         alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
 142         return 0;
 143 }
 144
 145 static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 146 {
 147         struct sa1100_rtc *info = dev_get_drvdata(dev);
 148         unsigned long time;
 149         int ret;
 150
 151         spin_lock_irq(&info->lock);
 152         ret = rtc_tm_to_time(&alrm->time, &time);
 153         if (ret != 0)
 154                 goto out;
 155         writel_relaxed(readl_relaxed(info->rtsr) &
 156                 (RTSR_HZE | RTSR_ALE | RTSR_AL), info->rtsr);
 157         writel_relaxed(time, info->rtar);
 158         if (alrm->enabled)
 159                 writel_relaxed(readl_relaxed(info->rtsr) | RTSR_ALE, info->rtsr);
 160         else
 161                 writel_relaxed(readl_relaxed(info->rtsr) & ~RTSR_ALE, info->rtsr);
 162 out:
 163         spin_unlock_irq(&info->lock);
 164
 165         return ret;
 166 }
 167
 168 static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq)
 169 {
 170         struct sa1100_rtc *info = dev_get_drvdata(dev);
 171
 172         seq_printf(seq, "trim/divider\t\t: 0x%08x\n", readl_relaxed(info->rttr));
 173         seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", readl_relaxed(info->rtsr));
 174
 175         return 0;
 176 }
 177
 178 static const struct rtc_class_ops sa1100_rtc_ops = {
 179         .read_time = sa1100_rtc_read_time,
 180         .set_time = sa1100_rtc_set_time,
 181         .read_alarm = sa1100_rtc_read_alarm,
 182         .set_alarm = sa1100_rtc_set_alarm,
 183         .proc = sa1100_rtc_proc,
 184         .alarm_irq_enable = sa1100_rtc_alarm_irq_enable,
 185 };
 186
 187 int sa1100_rtc_init(struct platform_device *pdev, struct sa1100_rtc *info)
 188 {
 189         struct rtc_device *rtc;
 190         int ret;
 191
 192         spin_lock_init(&info->lock);
 193
 194         info->clk = devm_clk_get(&pdev->dev, NULL);
 195         if (IS_ERR(info->clk)) {
 196                 dev_err(&pdev->dev, "failed to find rtc clock source\n");
 197                 return PTR_ERR(info->clk);
 198         }
 199
 200         ret = clk_prepare_enable(info->clk);
 201         if (ret)
 202                 return ret;
 203         /*
 204          * According to the manual we should be able to let RTTR be zero
 205          * and then a default diviser for a 32.768KHz clock is used.
 206          * Apparently this doesn't work, at least for my SA1110 rev 5.
 207          * If the clock divider is uninitialized then reset it to the
 208          * default value to get the 1Hz clock.
 209          */
 210         if (readl_relaxed(info->rttr) == 0) {
 211                 writel_relaxed(RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16), info->rttr);
 212                 dev_warn(&pdev->dev, "warning: "
 213                         "initializing default clock divider/trim value\n");
 214                 /* The current RTC value probably doesn't make sense either */
 215                 writel_relaxed(0, info->rcnr);
 216         }
 217
 218         rtc = devm_rtc_device_register(&pdev->dev, pdev->name, &sa1100_rtc_ops,
 219                                         THIS_MODULE);
 220         if (IS_ERR(rtc)) {
 221                 clk_disable_unprepare(info->clk);
 222                 return PTR_ERR(rtc);
 223         }
 224         info->rtc = rtc;
 225
 226         rtc->max_user_freq = RTC_FREQ;
 227         rtc_irq_set_freq(rtc, NULL, RTC_FREQ);
 228
 229         /* Fix for a nasty initialization problem the in SA11xx RTSR register.
 230          * See also the comments in sa1100_rtc_interrupt().
 231          *
 232          * Sometimes bit 1 of the RTSR (RTSR_HZ) will wake up 1, which means an
 233          * interrupt pending, even though interrupts were never enabled.
 234          * In this case, this bit it must be reset before enabling
 235          * interruptions to avoid a nonexistent interrupt to occur.
 236          *
 237          * In principle, the same problem would apply to bit 0, although it has
 238          * never been observed to happen.
 239          *
 240          * This issue is addressed both here and in sa1100_rtc_interrupt().
 241          * If the issue is not addressed here, in the times when the processor
 242          * wakes up with the bit set there will be one spurious interrupt.
 243          *
 244          * The issue is also dealt with in sa1100_rtc_interrupt() to be on the
 245          * safe side, once the condition that lead to this strange
 246          * initialization is unknown and could in principle happen during
 247          * normal processing.
 248          *
 249          * Notice that clearing bit 1 and 0 is accomplished by writting ONES to
 250          * the corresponding bits in RTSR. */
 251         writel_relaxed(RTSR_AL | RTSR_HZ, info->rtsr);
 252
 253         return 0;
 254 }
 255 EXPORT_SYMBOL_GPL(sa1100_rtc_init);
 256
 257 static int sa1100_rtc_probe(struct platform_device *pdev)
 258 {
 259         struct sa1100_rtc *info;
 260         struct resource *iores;
 261         void __iomem *base;
 262         int irq_1hz, irq_alarm;
 263         int ret;
 264
 265         irq_1hz = platform_get_irq_byname(pdev, "rtc 1Hz");
 266         irq_alarm = platform_get_irq_byname(pdev, "rtc alarm");
 267         if (irq_1hz < 0 || irq_alarm < 0)
 268                 return -ENODEV;
 269
 270         info = devm_kzalloc(&pdev->dev, sizeof(struct sa1100_rtc), GFP_KERNEL);
 271         if (!info)
 272                 return -ENOMEM;
 273         info->irq_1hz = irq_1hz;
 274         info->irq_alarm = irq_alarm;
 275
 276         ret = devm_request_irq(&pdev->dev, irq_1hz, sa1100_rtc_interrupt, 0,
 277                                "rtc 1Hz", &pdev->dev);
 278         if (ret) {
 279                 dev_err(&pdev->dev, "IRQ %d already in use.\n", irq_1hz);
 280                 return ret;
 281         }
 282         ret = devm_request_irq(&pdev->dev, irq_alarm, sa1100_rtc_interrupt, 0,
 283                                "rtc Alrm", &pdev->dev);
 284         if (ret) {
 285                 dev_err(&pdev->dev, "IRQ %d already in use.\n", irq_alarm);
 286                 return ret;
 287         }
 288
 289         iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 290         base = devm_ioremap_resource(&pdev->dev, iores);
 291         if (IS_ERR(base))
 292                 return PTR_ERR(base);
 293
 294         if (IS_ENABLED(CONFIG_ARCH_SA1100) ||
 295             of_device_is_compatible(pdev->dev.of_node, "mrvl,sa1100-rtc")) {
 296                 info->rcnr = base + 0x04;
 297                 info->rtsr = base + 0x10;
 298                 info->rtar = base + 0x00;
 299                 info->rttr = base + 0x08;
 300         } else {
 301                 info->rcnr = base + 0x0;
 302                 info->rtsr = base + 0x8;
 303                 info->rtar = base + 0x4;
 304                 info->rttr = base + 0xc;
 305         }
 306
 307         platform_set_drvdata(pdev, info);
 308         device_init_wakeup(&pdev->dev, 1);
 309
 310         return sa1100_rtc_init(pdev, info);
 311 }
 312
 313 static int sa1100_rtc_remove(struct platform_device *pdev)
 314 {
 315         struct sa1100_rtc *info = platform_get_drvdata(pdev);
 316
 317         if (info) {
 318                 spin_lock_irq(&info->lock);
 319                 writel_relaxed(0, info->rtsr);
 320                 spin_unlock_irq(&info->lock);
 321                 clk_disable_unprepare(info->clk);
 322         }
 323
 324         return 0;
 325 }
 326
 327 #ifdef CONFIG_PM_SLEEP
 328 static int sa1100_rtc_suspend(struct device *dev)
 329 {
 330         struct sa1100_rtc *info = dev_get_drvdata(dev);
 331         if (device_may_wakeup(dev))
 332                 enable_irq_wake(info->irq_alarm);
 333         return 0;
 334 }
 335
 336 static int sa1100_rtc_resume(struct device *dev)
 337 {
 338         struct sa1100_rtc *info = dev_get_drvdata(dev);
 339         if (device_may_wakeup(dev))
 340                 disable_irq_wake(info->irq_alarm);
 341         return 0;
 342 }
 343 #endif
 344
 345 static SIMPLE_DEV_PM_OPS(sa1100_rtc_pm_ops, sa1100_rtc_suspend,
 346                         sa1100_rtc_resume);
 347
 348 #ifdef CONFIG_OF
 349 static const struct of_device_id sa1100_rtc_dt_ids[] = {
 350         { .compatible = "mrvl,sa1100-rtc", },
 351         { .compatible = "mrvl,mmp-rtc", },
 352         {}
 353 };
 354 MODULE_DEVICE_TABLE(of, sa1100_rtc_dt_ids);
 355 #endif
 356
 357 static struct platform_driver sa1100_rtc_driver = {
 358         .probe          = sa1100_rtc_probe,
 359         .remove         = sa1100_rtc_remove,
 360         .driver         = {
 361                 .name   = "sa1100-rtc",
 362                 .pm     = &sa1100_rtc_pm_ops,
 363                 .of_match_table = of_match_ptr(sa1100_rtc_dt_ids),
 364         },
 365 };
 366
 367 module_platform_driver(sa1100_rtc_driver);
 368
 369 MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
 370 MODULE_DESCRIPTION("SA11x0/PXA2xx Realtime Clock Driver (RTC)");
 371 MODULE_LICENSE("GPL");
 372 MODULE_ALIAS("platform:sa1100-rtc");