drivers/staging/rtlwifi/debug.h

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2009-2012  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * The full GNU General Public License is included in this distribution in the
  15  * file called LICENSE.
  16  *
  17  * Contact Information:
  18  * wlanfae <wlanfae@realtek.com>
  19  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20  * Hsinchu 300, Taiwan.
  21  *
  22  * Larry Finger <Larry.Finger@lwfinger.net>
  23  *****************************************************************************/
  24
  25 #ifndef __RTL_DEBUG_H__
  26 #define __RTL_DEBUG_H__
  27
  28 /*--------------------------------------------------------------
  29  *                      Debug level
  30  *------------------------------------------------------------
  31  *
  32  *Fatal bug.
  33  *For example, Tx/Rx/IO locked up,
  34  *memory access violation,
  35  *resource allocation failed,
  36  *unexpected HW behavior, HW BUG
  37  *and so on.
  38  */
  39 /*#define DBG_EMERG                     0 */
  40
  41 /*Abnormal, rare, or unexpected cases.
  42  *For example, Packet/IO Ctl canceled,
  43  *device surprisingly removed and so on.
  44  */
  45 #define DBG_WARNING                     2
  46
  47 /*Normal case driver developer should
  48  *open, we can see link status like
  49  *assoc/AddBA/DHCP/adapter start and
  50  *so on basic and useful infromations.
  51  */
  52 #define DBG_DMESG                       3
  53
  54 /*Normal case with useful information
  55  *about current SW or HW state.
  56  *For example, Tx/Rx descriptor to fill,
  57  *Tx/Rx descriptor completed status,
  58  *SW protocol state change, dynamic
  59  *mechanism state change and so on.
  60  */
  61 #define DBG_LOUD                        4
  62
  63 /*Normal case with detail execution
  64  *flow or information.
  65  */
  66 #define DBG_TRACE                       5
  67
  68 /*--------------------------------------------------------------
  69  *              Define the rt_trace components
  70  *--------------------------------------------------------------
  71  */
  72 #define COMP_ERR                        BIT(0)
  73 #define COMP_FW                         BIT(1)
  74 #define COMP_INIT                       BIT(2)  /*For init/deinit */
  75 #define COMP_RECV                       BIT(3)  /*For Rx. */
  76 #define COMP_SEND                       BIT(4)  /*For Tx. */
  77 #define COMP_MLME                       BIT(5)  /*For MLME. */
  78 #define COMP_SCAN                       BIT(6)  /*For Scan. */
  79 #define COMP_INTR                       BIT(7)  /*For interrupt Related. */
  80 #define COMP_LED                        BIT(8)  /*For LED. */
  81 #define COMP_SEC                        BIT(9)  /*For sec. */
  82 #define COMP_BEACON                     BIT(10) /*For beacon. */
  83 #define COMP_RATE                       BIT(11) /*For rate. */
  84 #define COMP_RXDESC                     BIT(12) /*For rx desc. */
  85 #define COMP_DIG                        BIT(13) /*For DIG */
  86 #define COMP_TXAGC                      BIT(14) /*For Tx power */
  87 #define COMP_HIPWR                      BIT(15) /*For High Power Mechanism */
  88 #define COMP_POWER                      BIT(16) /*For lps/ips/aspm. */
  89 #define COMP_POWER_TRACKING     BIT(17) /*For TX POWER TRACKING */
  90 #define COMP_BB_POWERSAVING     BIT(18)
  91 #define COMP_SWAS                       BIT(19) /*For SW Antenna Switch */
  92 #define COMP_RF                         BIT(20) /*For RF. */
  93 #define COMP_TURBO                      BIT(21) /*For EDCA TURBO. */
  94 #define COMP_RATR                       BIT(22)
  95 #define COMP_CMD                        BIT(23)
  96 #define COMP_EFUSE                      BIT(24)
  97 #define COMP_QOS                        BIT(25)
  98 #define COMP_MAC80211           BIT(26)
  99 #define COMP_REGD                       BIT(27)
 100 #define COMP_CHAN                       BIT(28)
 101 #define COMP_USB                        BIT(29)
 102 #define COMP_EASY_CONCURRENT    COMP_USB /* reuse of this bit is OK */
 103 #define COMP_BT_COEXIST                 BIT(30)
 104 #define COMP_IQK                        BIT(31)
 105 #define COMP_TX_REPORT                  BIT_ULL(32)
 106 #define COMP_HALMAC                     BIT_ULL(34)
 107 #define COMP_PHYDM                      BIT_ULL(35)
 108
 109 /*--------------------------------------------------------------
 110  *              Define the rt_print components
 111  *--------------------------------------------------------------
 112  */
 113 /* Define EEPROM and EFUSE  check module bit*/
 114 #define EEPROM_W                        BIT(0)
 115 #define EFUSE_PG                        BIT(1)
 116 #define EFUSE_READ_ALL                  BIT(2)
 117
 118 /* Define init check for module bit*/
 119 #define INIT_EEPROM                     BIT(0)
 120 #define INIT_TXPOWER                    BIT(1)
 121 #define INIT_IQK                        BIT(2)
 122 #define INIT_RF                         BIT(3)
 123
 124 /* Define PHY-BB/RF/MAC check module bit */
 125 #define PHY_BBR                         BIT(0)
 126 #define PHY_BBW                         BIT(1)
 127 #define PHY_RFR                         BIT(2)
 128 #define PHY_RFW                         BIT(3)
 129 #define PHY_MACR                        BIT(4)
 130 #define PHY_MACW                        BIT(5)
 131 #define PHY_ALLR                        BIT(6)
 132 #define PHY_ALLW                        BIT(7)
 133 #define PHY_TXPWR                       BIT(8)
 134 #define PHY_PWRDIFF                     BIT(9)
 135
 136 /* Define Dynamic Mechanism check module bit --> FDM */
 137 #define WA_IOT                          BIT(0)
 138 #define DM_PWDB                         BIT(1)
 139 #define DM_MONITOR                      BIT(2)
 140 #define DM_DIG                          BIT(3)
 141 #define DM_EDCA_TURBO                   BIT(4)
 142
 143 #define DM_PWDB                         BIT(1)
 144
 145 enum dbgp_flag_e {
 146         FQOS = 0,
 147         FTX = 1,
 148         FRX = 2,
 149         FSEC = 3,
 150         FMGNT = 4,
 151         FMLME = 5,
 152         FRESOURCE = 6,
 153         FBEACON = 7,
 154         FISR = 8,
 155         FPHY = 9,
 156         FMP = 10,
 157         FEEPROM = 11,
 158         FPWR = 12,
 159         FDM = 13,
 160         FDBGCTRL = 14,
 161         FC2H = 15,
 162         FBT = 16,
 163         FINIT = 17,
 164         FIOCTL = 18,
 165         DBGP_TYPE_MAX
 166 };
 167
 168 #ifdef CONFIG_RTLWIFI_DEBUG_ST
 169
 170 struct rtl_priv;
 171
 172 __printf(4, 5)
 173 void _rtl_dbg_trace(struct rtl_priv *rtlpriv, u64 comp, int level,
 174                     const char *fmt, ...);
 175
 176 __printf(4, 5)
 177 void _rtl_dbg_print(struct rtl_priv *rtlpriv, u64 comp, int level,
 178                     const char *fmt, ...);
 179
 180 void _rtl_dbg_print_data(struct rtl_priv *rtlpriv, u64 comp, int level,
 181                          const char *titlestring,
 182                          const void *hexdata, int hexdatalen);
 183
 184 #define RT_TRACE(rtlpriv, comp, level, fmt, ...)                        \
 185         _rtl_dbg_trace(rtlpriv, comp, level,                            \
 186                        fmt, ##__VA_ARGS__)
 187
 188 #define RTPRINT(rtlpriv, dbgtype, dbgflag, fmt, ...)                    \
 189         _rtl_dbg_print(rtlpriv, dbgtype, dbgflag, fmt, ##__VA_ARGS__)
 190
 191 #define RT_PRINT_DATA(rtlpriv, _comp, _level, _titlestring, _hexdata,   \
 192                       _hexdatalen)                                      \
 193         _rtl_dbg_print_data(rtlpriv, _comp, _level,                     \
 194                             _titlestring, _hexdata, _hexdatalen)
 195
 196 #else
 197
 198 struct rtl_priv;
 199
 200 __printf(4, 5)
 201 static inline void RT_TRACE(struct rtl_priv *rtlpriv,
 202                             u64 comp, int level,
 203                             const char *fmt, ...)
 204 {
 205 }
 206
 207 __printf(4, 5)
 208 static inline void RTPRINT(struct rtl_priv *rtlpriv,
 209                            int dbgtype, int dbgflag,
 210                            const char *fmt, ...)
 211 {
 212 }
 213
 214 static inline void RT_PRINT_DATA(struct rtl_priv *rtlpriv,
 215                                  u64 comp, int level,
 216                                  const char *titlestring,
 217                                  const void *hexdata, size_t hexdatalen)
 218 {
 219 }
 220
 221 #endif
 222
 223 #ifdef CONFIG_RTLWIFI_DEBUG_ST
 224 void rtl_debug_add_one(struct ieee80211_hw *hw);
 225 void rtl_debug_remove_one(struct ieee80211_hw *hw);
 226 void rtl_debugfs_add_topdir(void);
 227 void rtl_debugfs_remove_topdir(void);
 228 #else
 229 #define rtl_debug_add_one(hw)
 230 #define rtl_debug_remove_one(hw)
 231 #define rtl_debugfs_add_topdir()
 232 #define rtl_debugfs_remove_topdir()
 233 #endif
 234 #endif