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[linux/fpc-iii.git] / drivers / tty / serial / pmac_zilog.c
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1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Driver for PowerMac Z85c30 based ESCC cell found in the
4 * "macio" ASICs of various PowerMac models
5 *
6 * Copyright (C) 2003 Ben. Herrenschmidt (benh@kernel.crashing.org)
8 * Derived from drivers/macintosh/macserial.c by Paul Mackerras
9 * and drivers/serial/sunzilog.c by David S. Miller
11 * Hrm... actually, I ripped most of sunzilog (Thanks David !) and
12 * adapted special tweaks needed for us. I don't think it's worth
13 * merging back those though. The DMA code still has to get in
14 * and once done, I expect that driver to remain fairly stable in
15 * the long term, unless we change the driver model again...
17 * 2004-08-06 Harald Welte <laforge@gnumonks.org>
18 * - Enable BREAK interrupt
19 * - Add support for sysreq
21 * TODO: - Add DMA support
22 * - Defer port shutdown to a few seconds after close
23 * - maybe put something right into uap->clk_divisor
26 #undef DEBUG
27 #undef DEBUG_HARD
28 #undef USE_CTRL_O_SYSRQ
30 #include <linux/module.h>
31 #include <linux/tty.h>
33 #include <linux/tty_flip.h>
34 #include <linux/major.h>
35 #include <linux/string.h>
36 #include <linux/fcntl.h>
37 #include <linux/mm.h>
38 #include <linux/kernel.h>
39 #include <linux/delay.h>
40 #include <linux/init.h>
41 #include <linux/console.h>
42 #include <linux/adb.h>
43 #include <linux/pmu.h>
44 #include <linux/bitops.h>
45 #include <linux/sysrq.h>
46 #include <linux/mutex.h>
47 #include <linux/of_address.h>
48 #include <linux/of_irq.h>
49 #include <asm/sections.h>
50 #include <asm/io.h>
51 #include <asm/irq.h>
53 #ifdef CONFIG_PPC_PMAC
54 #include <asm/prom.h>
55 #include <asm/machdep.h>
56 #include <asm/pmac_feature.h>
57 #include <asm/dbdma.h>
58 #include <asm/macio.h>
59 #else
60 #include <linux/platform_device.h>
61 #define of_machine_is_compatible(x) (0)
62 #endif
64 #if defined (CONFIG_SERIAL_PMACZILOG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
65 #define SUPPORT_SYSRQ
66 #endif
68 #include <linux/serial.h>
69 #include <linux/serial_core.h>
71 #include "pmac_zilog.h"
73 /* Not yet implemented */
74 #undef HAS_DBDMA
76 static char version[] __initdata = "pmac_zilog: 0.6 (Benjamin Herrenschmidt <benh@kernel.crashing.org>)";
77 MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
78 MODULE_DESCRIPTION("Driver for the Mac and PowerMac serial ports.");
79 MODULE_LICENSE("GPL");
81 #ifdef CONFIG_SERIAL_PMACZILOG_TTYS
82 #define PMACZILOG_MAJOR TTY_MAJOR
83 #define PMACZILOG_MINOR 64
84 #define PMACZILOG_NAME "ttyS"
85 #else
86 #define PMACZILOG_MAJOR 204
87 #define PMACZILOG_MINOR 192
88 #define PMACZILOG_NAME "ttyPZ"
89 #endif
91 #define pmz_debug(fmt, arg...) pr_debug("ttyPZ%d: " fmt, uap->port.line, ## arg)
92 #define pmz_error(fmt, arg...) pr_err("ttyPZ%d: " fmt, uap->port.line, ## arg)
93 #define pmz_info(fmt, arg...) pr_info("ttyPZ%d: " fmt, uap->port.line, ## arg)
96 * For the sake of early serial console, we can do a pre-probe
97 * (optional) of the ports at rather early boot time.
99 static struct uart_pmac_port pmz_ports[MAX_ZS_PORTS];
100 static int pmz_ports_count;
102 static struct uart_driver pmz_uart_reg = {
103 .owner = THIS_MODULE,
104 .driver_name = PMACZILOG_NAME,
105 .dev_name = PMACZILOG_NAME,
106 .major = PMACZILOG_MAJOR,
107 .minor = PMACZILOG_MINOR,
112 * Load all registers to reprogram the port
113 * This function must only be called when the TX is not busy. The UART
114 * port lock must be held and local interrupts disabled.
116 static void pmz_load_zsregs(struct uart_pmac_port *uap, u8 *regs)
118 int i;
120 /* Let pending transmits finish. */
121 for (i = 0; i < 1000; i++) {
122 unsigned char stat = read_zsreg(uap, R1);
123 if (stat & ALL_SNT)
124 break;
125 udelay(100);
128 ZS_CLEARERR(uap);
129 zssync(uap);
130 ZS_CLEARFIFO(uap);
131 zssync(uap);
132 ZS_CLEARERR(uap);
134 /* Disable all interrupts. */
135 write_zsreg(uap, R1,
136 regs[R1] & ~(RxINT_MASK | TxINT_ENAB | EXT_INT_ENAB));
138 /* Set parity, sync config, stop bits, and clock divisor. */
139 write_zsreg(uap, R4, regs[R4]);
141 /* Set misc. TX/RX control bits. */
142 write_zsreg(uap, R10, regs[R10]);
144 /* Set TX/RX controls sans the enable bits. */
145 write_zsreg(uap, R3, regs[R3] & ~RxENABLE);
146 write_zsreg(uap, R5, regs[R5] & ~TxENABLE);
148 /* now set R7 "prime" on ESCC */
149 write_zsreg(uap, R15, regs[R15] | EN85C30);
150 write_zsreg(uap, R7, regs[R7P]);
152 /* make sure we use R7 "non-prime" on ESCC */
153 write_zsreg(uap, R15, regs[R15] & ~EN85C30);
155 /* Synchronous mode config. */
156 write_zsreg(uap, R6, regs[R6]);
157 write_zsreg(uap, R7, regs[R7]);
159 /* Disable baud generator. */
160 write_zsreg(uap, R14, regs[R14] & ~BRENAB);
162 /* Clock mode control. */
163 write_zsreg(uap, R11, regs[R11]);
165 /* Lower and upper byte of baud rate generator divisor. */
166 write_zsreg(uap, R12, regs[R12]);
167 write_zsreg(uap, R13, regs[R13]);
169 /* Now rewrite R14, with BRENAB (if set). */
170 write_zsreg(uap, R14, regs[R14]);
172 /* Reset external status interrupts. */
173 write_zsreg(uap, R0, RES_EXT_INT);
174 write_zsreg(uap, R0, RES_EXT_INT);
176 /* Rewrite R3/R5, this time without enables masked. */
177 write_zsreg(uap, R3, regs[R3]);
178 write_zsreg(uap, R5, regs[R5]);
180 /* Rewrite R1, this time without IRQ enabled masked. */
181 write_zsreg(uap, R1, regs[R1]);
183 /* Enable interrupts */
184 write_zsreg(uap, R9, regs[R9]);
188 * We do like sunzilog to avoid disrupting pending Tx
189 * Reprogram the Zilog channel HW registers with the copies found in the
190 * software state struct. If the transmitter is busy, we defer this update
191 * until the next TX complete interrupt. Else, we do it right now.
193 * The UART port lock must be held and local interrupts disabled.
195 static void pmz_maybe_update_regs(struct uart_pmac_port *uap)
197 if (!ZS_REGS_HELD(uap)) {
198 if (ZS_TX_ACTIVE(uap)) {
199 uap->flags |= PMACZILOG_FLAG_REGS_HELD;
200 } else {
201 pmz_debug("pmz: maybe_update_regs: updating\n");
202 pmz_load_zsregs(uap, uap->curregs);
207 static void pmz_interrupt_control(struct uart_pmac_port *uap, int enable)
209 if (enable) {
210 uap->curregs[1] |= INT_ALL_Rx | TxINT_ENAB;
211 if (!ZS_IS_EXTCLK(uap))
212 uap->curregs[1] |= EXT_INT_ENAB;
213 } else {
214 uap->curregs[1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK);
216 write_zsreg(uap, R1, uap->curregs[1]);
219 static bool pmz_receive_chars(struct uart_pmac_port *uap)
221 struct tty_port *port;
222 unsigned char ch, r1, drop, error, flag;
223 int loops = 0;
225 /* Sanity check, make sure the old bug is no longer happening */
226 if (uap->port.state == NULL) {
227 WARN_ON(1);
228 (void)read_zsdata(uap);
229 return false;
231 port = &uap->port.state->port;
233 while (1) {
234 error = 0;
235 drop = 0;
237 r1 = read_zsreg(uap, R1);
238 ch = read_zsdata(uap);
240 if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR)) {
241 write_zsreg(uap, R0, ERR_RES);
242 zssync(uap);
245 ch &= uap->parity_mask;
246 if (ch == 0 && uap->flags & PMACZILOG_FLAG_BREAK) {
247 uap->flags &= ~PMACZILOG_FLAG_BREAK;
250 #if defined(CONFIG_MAGIC_SYSRQ) && defined(CONFIG_SERIAL_CORE_CONSOLE)
251 #ifdef USE_CTRL_O_SYSRQ
252 /* Handle the SysRq ^O Hack */
253 if (ch == '\x0f') {
254 uap->port.sysrq = jiffies + HZ*5;
255 goto next_char;
257 #endif /* USE_CTRL_O_SYSRQ */
258 if (uap->port.sysrq) {
259 int swallow;
260 spin_unlock(&uap->port.lock);
261 swallow = uart_handle_sysrq_char(&uap->port, ch);
262 spin_lock(&uap->port.lock);
263 if (swallow)
264 goto next_char;
266 #endif /* CONFIG_MAGIC_SYSRQ && CONFIG_SERIAL_CORE_CONSOLE */
268 /* A real serial line, record the character and status. */
269 if (drop)
270 goto next_char;
272 flag = TTY_NORMAL;
273 uap->port.icount.rx++;
275 if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR | BRK_ABRT)) {
276 error = 1;
277 if (r1 & BRK_ABRT) {
278 pmz_debug("pmz: got break !\n");
279 r1 &= ~(PAR_ERR | CRC_ERR);
280 uap->port.icount.brk++;
281 if (uart_handle_break(&uap->port))
282 goto next_char;
284 else if (r1 & PAR_ERR)
285 uap->port.icount.parity++;
286 else if (r1 & CRC_ERR)
287 uap->port.icount.frame++;
288 if (r1 & Rx_OVR)
289 uap->port.icount.overrun++;
290 r1 &= uap->port.read_status_mask;
291 if (r1 & BRK_ABRT)
292 flag = TTY_BREAK;
293 else if (r1 & PAR_ERR)
294 flag = TTY_PARITY;
295 else if (r1 & CRC_ERR)
296 flag = TTY_FRAME;
299 if (uap->port.ignore_status_mask == 0xff ||
300 (r1 & uap->port.ignore_status_mask) == 0) {
301 tty_insert_flip_char(port, ch, flag);
303 if (r1 & Rx_OVR)
304 tty_insert_flip_char(port, 0, TTY_OVERRUN);
305 next_char:
306 /* We can get stuck in an infinite loop getting char 0 when the
307 * line is in a wrong HW state, we break that here.
308 * When that happens, I disable the receive side of the driver.
309 * Note that what I've been experiencing is a real irq loop where
310 * I'm getting flooded regardless of the actual port speed.
311 * Something strange is going on with the HW
313 if ((++loops) > 1000)
314 goto flood;
315 ch = read_zsreg(uap, R0);
316 if (!(ch & Rx_CH_AV))
317 break;
320 return true;
321 flood:
322 pmz_interrupt_control(uap, 0);
323 pmz_error("pmz: rx irq flood !\n");
324 return true;
327 static void pmz_status_handle(struct uart_pmac_port *uap)
329 unsigned char status;
331 status = read_zsreg(uap, R0);
332 write_zsreg(uap, R0, RES_EXT_INT);
333 zssync(uap);
335 if (ZS_IS_OPEN(uap) && ZS_WANTS_MODEM_STATUS(uap)) {
336 if (status & SYNC_HUNT)
337 uap->port.icount.dsr++;
339 /* The Zilog just gives us an interrupt when DCD/CTS/etc. change.
340 * But it does not tell us which bit has changed, we have to keep
341 * track of this ourselves.
342 * The CTS input is inverted for some reason. -- paulus
344 if ((status ^ uap->prev_status) & DCD)
345 uart_handle_dcd_change(&uap->port,
346 (status & DCD));
347 if ((status ^ uap->prev_status) & CTS)
348 uart_handle_cts_change(&uap->port,
349 !(status & CTS));
351 wake_up_interruptible(&uap->port.state->port.delta_msr_wait);
354 if (status & BRK_ABRT)
355 uap->flags |= PMACZILOG_FLAG_BREAK;
357 uap->prev_status = status;
360 static void pmz_transmit_chars(struct uart_pmac_port *uap)
362 struct circ_buf *xmit;
364 if (ZS_IS_CONS(uap)) {
365 unsigned char status = read_zsreg(uap, R0);
367 /* TX still busy? Just wait for the next TX done interrupt.
369 * It can occur because of how we do serial console writes. It would
370 * be nice to transmit console writes just like we normally would for
371 * a TTY line. (ie. buffered and TX interrupt driven). That is not
372 * easy because console writes cannot sleep. One solution might be
373 * to poll on enough port->xmit space becoming free. -DaveM
375 if (!(status & Tx_BUF_EMP))
376 return;
379 uap->flags &= ~PMACZILOG_FLAG_TX_ACTIVE;
381 if (ZS_REGS_HELD(uap)) {
382 pmz_load_zsregs(uap, uap->curregs);
383 uap->flags &= ~PMACZILOG_FLAG_REGS_HELD;
386 if (ZS_TX_STOPPED(uap)) {
387 uap->flags &= ~PMACZILOG_FLAG_TX_STOPPED;
388 goto ack_tx_int;
391 /* Under some circumstances, we see interrupts reported for
392 * a closed channel. The interrupt mask in R1 is clear, but
393 * R3 still signals the interrupts and we see them when taking
394 * an interrupt for the other channel (this could be a qemu
395 * bug but since the ESCC doc doesn't specify precsiely whether
396 * R3 interrup status bits are masked by R1 interrupt enable
397 * bits, better safe than sorry). --BenH.
399 if (!ZS_IS_OPEN(uap))
400 goto ack_tx_int;
402 if (uap->port.x_char) {
403 uap->flags |= PMACZILOG_FLAG_TX_ACTIVE;
404 write_zsdata(uap, uap->port.x_char);
405 zssync(uap);
406 uap->port.icount.tx++;
407 uap->port.x_char = 0;
408 return;
411 if (uap->port.state == NULL)
412 goto ack_tx_int;
413 xmit = &uap->port.state->xmit;
414 if (uart_circ_empty(xmit)) {
415 uart_write_wakeup(&uap->port);
416 goto ack_tx_int;
418 if (uart_tx_stopped(&uap->port))
419 goto ack_tx_int;
421 uap->flags |= PMACZILOG_FLAG_TX_ACTIVE;
422 write_zsdata(uap, xmit->buf[xmit->tail]);
423 zssync(uap);
425 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
426 uap->port.icount.tx++;
428 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
429 uart_write_wakeup(&uap->port);
431 return;
433 ack_tx_int:
434 write_zsreg(uap, R0, RES_Tx_P);
435 zssync(uap);
438 /* Hrm... we register that twice, fixme later.... */
439 static irqreturn_t pmz_interrupt(int irq, void *dev_id)
441 struct uart_pmac_port *uap = dev_id;
442 struct uart_pmac_port *uap_a;
443 struct uart_pmac_port *uap_b;
444 int rc = IRQ_NONE;
445 bool push;
446 u8 r3;
448 uap_a = pmz_get_port_A(uap);
449 uap_b = uap_a->mate;
451 spin_lock(&uap_a->port.lock);
452 r3 = read_zsreg(uap_a, R3);
454 #ifdef DEBUG_HARD
455 pmz_debug("irq, r3: %x\n", r3);
456 #endif
457 /* Channel A */
458 push = false;
459 if (r3 & (CHAEXT | CHATxIP | CHARxIP)) {
460 if (!ZS_IS_OPEN(uap_a)) {
461 pmz_debug("ChanA interrupt while not open !\n");
462 goto skip_a;
464 write_zsreg(uap_a, R0, RES_H_IUS);
465 zssync(uap_a);
466 if (r3 & CHAEXT)
467 pmz_status_handle(uap_a);
468 if (r3 & CHARxIP)
469 push = pmz_receive_chars(uap_a);
470 if (r3 & CHATxIP)
471 pmz_transmit_chars(uap_a);
472 rc = IRQ_HANDLED;
474 skip_a:
475 spin_unlock(&uap_a->port.lock);
476 if (push)
477 tty_flip_buffer_push(&uap->port.state->port);
479 if (!uap_b)
480 goto out;
482 spin_lock(&uap_b->port.lock);
483 push = false;
484 if (r3 & (CHBEXT | CHBTxIP | CHBRxIP)) {
485 if (!ZS_IS_OPEN(uap_b)) {
486 pmz_debug("ChanB interrupt while not open !\n");
487 goto skip_b;
489 write_zsreg(uap_b, R0, RES_H_IUS);
490 zssync(uap_b);
491 if (r3 & CHBEXT)
492 pmz_status_handle(uap_b);
493 if (r3 & CHBRxIP)
494 push = pmz_receive_chars(uap_b);
495 if (r3 & CHBTxIP)
496 pmz_transmit_chars(uap_b);
497 rc = IRQ_HANDLED;
499 skip_b:
500 spin_unlock(&uap_b->port.lock);
501 if (push)
502 tty_flip_buffer_push(&uap->port.state->port);
504 out:
505 return rc;
509 * Peek the status register, lock not held by caller
511 static inline u8 pmz_peek_status(struct uart_pmac_port *uap)
513 unsigned long flags;
514 u8 status;
516 spin_lock_irqsave(&uap->port.lock, flags);
517 status = read_zsreg(uap, R0);
518 spin_unlock_irqrestore(&uap->port.lock, flags);
520 return status;
524 * Check if transmitter is empty
525 * The port lock is not held.
527 static unsigned int pmz_tx_empty(struct uart_port *port)
529 unsigned char status;
531 status = pmz_peek_status(to_pmz(port));
532 if (status & Tx_BUF_EMP)
533 return TIOCSER_TEMT;
534 return 0;
538 * Set Modem Control (RTS & DTR) bits
539 * The port lock is held and interrupts are disabled.
540 * Note: Shall we really filter out RTS on external ports or
541 * should that be dealt at higher level only ?
543 static void pmz_set_mctrl(struct uart_port *port, unsigned int mctrl)
545 struct uart_pmac_port *uap = to_pmz(port);
546 unsigned char set_bits, clear_bits;
548 /* Do nothing for irda for now... */
549 if (ZS_IS_IRDA(uap))
550 return;
551 /* We get called during boot with a port not up yet */
552 if (!(ZS_IS_OPEN(uap) || ZS_IS_CONS(uap)))
553 return;
555 set_bits = clear_bits = 0;
557 if (ZS_IS_INTMODEM(uap)) {
558 if (mctrl & TIOCM_RTS)
559 set_bits |= RTS;
560 else
561 clear_bits |= RTS;
563 if (mctrl & TIOCM_DTR)
564 set_bits |= DTR;
565 else
566 clear_bits |= DTR;
568 /* NOTE: Not subject to 'transmitter active' rule. */
569 uap->curregs[R5] |= set_bits;
570 uap->curregs[R5] &= ~clear_bits;
572 write_zsreg(uap, R5, uap->curregs[R5]);
573 pmz_debug("pmz_set_mctrl: set bits: %x, clear bits: %x -> %x\n",
574 set_bits, clear_bits, uap->curregs[R5]);
575 zssync(uap);
579 * Get Modem Control bits (only the input ones, the core will
580 * or that with a cached value of the control ones)
581 * The port lock is held and interrupts are disabled.
583 static unsigned int pmz_get_mctrl(struct uart_port *port)
585 struct uart_pmac_port *uap = to_pmz(port);
586 unsigned char status;
587 unsigned int ret;
589 status = read_zsreg(uap, R0);
591 ret = 0;
592 if (status & DCD)
593 ret |= TIOCM_CAR;
594 if (status & SYNC_HUNT)
595 ret |= TIOCM_DSR;
596 if (!(status & CTS))
597 ret |= TIOCM_CTS;
599 return ret;
603 * Stop TX side. Dealt like sunzilog at next Tx interrupt,
604 * though for DMA, we will have to do a bit more.
605 * The port lock is held and interrupts are disabled.
607 static void pmz_stop_tx(struct uart_port *port)
609 to_pmz(port)->flags |= PMACZILOG_FLAG_TX_STOPPED;
613 * Kick the Tx side.
614 * The port lock is held and interrupts are disabled.
616 static void pmz_start_tx(struct uart_port *port)
618 struct uart_pmac_port *uap = to_pmz(port);
619 unsigned char status;
621 pmz_debug("pmz: start_tx()\n");
623 uap->flags |= PMACZILOG_FLAG_TX_ACTIVE;
624 uap->flags &= ~PMACZILOG_FLAG_TX_STOPPED;
626 status = read_zsreg(uap, R0);
628 /* TX busy? Just wait for the TX done interrupt. */
629 if (!(status & Tx_BUF_EMP))
630 return;
632 /* Send the first character to jump-start the TX done
633 * IRQ sending engine.
635 if (port->x_char) {
636 write_zsdata(uap, port->x_char);
637 zssync(uap);
638 port->icount.tx++;
639 port->x_char = 0;
640 } else {
641 struct circ_buf *xmit = &port->state->xmit;
643 if (uart_circ_empty(xmit))
644 goto out;
645 write_zsdata(uap, xmit->buf[xmit->tail]);
646 zssync(uap);
647 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
648 port->icount.tx++;
650 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
651 uart_write_wakeup(&uap->port);
653 out:
654 pmz_debug("pmz: start_tx() done.\n");
658 * Stop Rx side, basically disable emitting of
659 * Rx interrupts on the port. We don't disable the rx
660 * side of the chip proper though
661 * The port lock is held.
663 static void pmz_stop_rx(struct uart_port *port)
665 struct uart_pmac_port *uap = to_pmz(port);
667 pmz_debug("pmz: stop_rx()()\n");
669 /* Disable all RX interrupts. */
670 uap->curregs[R1] &= ~RxINT_MASK;
671 pmz_maybe_update_regs(uap);
673 pmz_debug("pmz: stop_rx() done.\n");
677 * Enable modem status change interrupts
678 * The port lock is held.
680 static void pmz_enable_ms(struct uart_port *port)
682 struct uart_pmac_port *uap = to_pmz(port);
683 unsigned char new_reg;
685 if (ZS_IS_IRDA(uap))
686 return;
687 new_reg = uap->curregs[R15] | (DCDIE | SYNCIE | CTSIE);
688 if (new_reg != uap->curregs[R15]) {
689 uap->curregs[R15] = new_reg;
691 /* NOTE: Not subject to 'transmitter active' rule. */
692 write_zsreg(uap, R15, uap->curregs[R15]);
697 * Control break state emission
698 * The port lock is not held.
700 static void pmz_break_ctl(struct uart_port *port, int break_state)
702 struct uart_pmac_port *uap = to_pmz(port);
703 unsigned char set_bits, clear_bits, new_reg;
704 unsigned long flags;
706 set_bits = clear_bits = 0;
708 if (break_state)
709 set_bits |= SND_BRK;
710 else
711 clear_bits |= SND_BRK;
713 spin_lock_irqsave(&port->lock, flags);
715 new_reg = (uap->curregs[R5] | set_bits) & ~clear_bits;
716 if (new_reg != uap->curregs[R5]) {
717 uap->curregs[R5] = new_reg;
718 write_zsreg(uap, R5, uap->curregs[R5]);
721 spin_unlock_irqrestore(&port->lock, flags);
724 #ifdef CONFIG_PPC_PMAC
727 * Turn power on or off to the SCC and associated stuff
728 * (port drivers, modem, IR port, etc.)
729 * Returns the number of milliseconds we should wait before
730 * trying to use the port.
732 static int pmz_set_scc_power(struct uart_pmac_port *uap, int state)
734 int delay = 0;
735 int rc;
737 if (state) {
738 rc = pmac_call_feature(
739 PMAC_FTR_SCC_ENABLE, uap->node, uap->port_type, 1);
740 pmz_debug("port power on result: %d\n", rc);
741 if (ZS_IS_INTMODEM(uap)) {
742 rc = pmac_call_feature(
743 PMAC_FTR_MODEM_ENABLE, uap->node, 0, 1);
744 delay = 2500; /* wait for 2.5s before using */
745 pmz_debug("modem power result: %d\n", rc);
747 } else {
748 /* TODO: Make that depend on a timer, don't power down
749 * immediately
751 if (ZS_IS_INTMODEM(uap)) {
752 rc = pmac_call_feature(
753 PMAC_FTR_MODEM_ENABLE, uap->node, 0, 0);
754 pmz_debug("port power off result: %d\n", rc);
756 pmac_call_feature(PMAC_FTR_SCC_ENABLE, uap->node, uap->port_type, 0);
758 return delay;
761 #else
763 static int pmz_set_scc_power(struct uart_pmac_port *uap, int state)
765 return 0;
768 #endif /* !CONFIG_PPC_PMAC */
771 * FixZeroBug....Works around a bug in the SCC receiving channel.
772 * Inspired from Darwin code, 15 Sept. 2000 -DanM
774 * The following sequence prevents a problem that is seen with O'Hare ASICs
775 * (most versions -- also with some Heathrow and Hydra ASICs) where a zero
776 * at the input to the receiver becomes 'stuck' and locks up the receiver.
777 * This problem can occur as a result of a zero bit at the receiver input
778 * coincident with any of the following events:
780 * The SCC is initialized (hardware or software).
781 * A framing error is detected.
782 * The clocking option changes from synchronous or X1 asynchronous
783 * clocking to X16, X32, or X64 asynchronous clocking.
784 * The decoding mode is changed among NRZ, NRZI, FM0, or FM1.
786 * This workaround attempts to recover from the lockup condition by placing
787 * the SCC in synchronous loopback mode with a fast clock before programming
788 * any of the asynchronous modes.
790 static void pmz_fix_zero_bug_scc(struct uart_pmac_port *uap)
792 write_zsreg(uap, 9, ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB);
793 zssync(uap);
794 udelay(10);
795 write_zsreg(uap, 9, (ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB) | NV);
796 zssync(uap);
798 write_zsreg(uap, 4, X1CLK | MONSYNC);
799 write_zsreg(uap, 3, Rx8);
800 write_zsreg(uap, 5, Tx8 | RTS);
801 write_zsreg(uap, 9, NV); /* Didn't we already do this? */
802 write_zsreg(uap, 11, RCBR | TCBR);
803 write_zsreg(uap, 12, 0);
804 write_zsreg(uap, 13, 0);
805 write_zsreg(uap, 14, (LOOPBAK | BRSRC));
806 write_zsreg(uap, 14, (LOOPBAK | BRSRC | BRENAB));
807 write_zsreg(uap, 3, Rx8 | RxENABLE);
808 write_zsreg(uap, 0, RES_EXT_INT);
809 write_zsreg(uap, 0, RES_EXT_INT);
810 write_zsreg(uap, 0, RES_EXT_INT); /* to kill some time */
812 /* The channel should be OK now, but it is probably receiving
813 * loopback garbage.
814 * Switch to asynchronous mode, disable the receiver,
815 * and discard everything in the receive buffer.
817 write_zsreg(uap, 9, NV);
818 write_zsreg(uap, 4, X16CLK | SB_MASK);
819 write_zsreg(uap, 3, Rx8);
821 while (read_zsreg(uap, 0) & Rx_CH_AV) {
822 (void)read_zsreg(uap, 8);
823 write_zsreg(uap, 0, RES_EXT_INT);
824 write_zsreg(uap, 0, ERR_RES);
829 * Real startup routine, powers up the hardware and sets up
830 * the SCC. Returns a delay in ms where you need to wait before
831 * actually using the port, this is typically the internal modem
832 * powerup delay. This routine expect the lock to be taken.
834 static int __pmz_startup(struct uart_pmac_port *uap)
836 int pwr_delay = 0;
838 memset(&uap->curregs, 0, sizeof(uap->curregs));
840 /* Power up the SCC & underlying hardware (modem/irda) */
841 pwr_delay = pmz_set_scc_power(uap, 1);
843 /* Nice buggy HW ... */
844 pmz_fix_zero_bug_scc(uap);
846 /* Reset the channel */
847 uap->curregs[R9] = 0;
848 write_zsreg(uap, 9, ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB);
849 zssync(uap);
850 udelay(10);
851 write_zsreg(uap, 9, 0);
852 zssync(uap);
854 /* Clear the interrupt registers */
855 write_zsreg(uap, R1, 0);
856 write_zsreg(uap, R0, ERR_RES);
857 write_zsreg(uap, R0, ERR_RES);
858 write_zsreg(uap, R0, RES_H_IUS);
859 write_zsreg(uap, R0, RES_H_IUS);
861 /* Setup some valid baud rate */
862 uap->curregs[R4] = X16CLK | SB1;
863 uap->curregs[R3] = Rx8;
864 uap->curregs[R5] = Tx8 | RTS;
865 if (!ZS_IS_IRDA(uap))
866 uap->curregs[R5] |= DTR;
867 uap->curregs[R12] = 0;
868 uap->curregs[R13] = 0;
869 uap->curregs[R14] = BRENAB;
871 /* Clear handshaking, enable BREAK interrupts */
872 uap->curregs[R15] = BRKIE;
874 /* Master interrupt enable */
875 uap->curregs[R9] |= NV | MIE;
877 pmz_load_zsregs(uap, uap->curregs);
879 /* Enable receiver and transmitter. */
880 write_zsreg(uap, R3, uap->curregs[R3] |= RxENABLE);
881 write_zsreg(uap, R5, uap->curregs[R5] |= TxENABLE);
883 /* Remember status for DCD/CTS changes */
884 uap->prev_status = read_zsreg(uap, R0);
886 return pwr_delay;
889 static void pmz_irda_reset(struct uart_pmac_port *uap)
891 unsigned long flags;
893 spin_lock_irqsave(&uap->port.lock, flags);
894 uap->curregs[R5] |= DTR;
895 write_zsreg(uap, R5, uap->curregs[R5]);
896 zssync(uap);
897 spin_unlock_irqrestore(&uap->port.lock, flags);
898 msleep(110);
900 spin_lock_irqsave(&uap->port.lock, flags);
901 uap->curregs[R5] &= ~DTR;
902 write_zsreg(uap, R5, uap->curregs[R5]);
903 zssync(uap);
904 spin_unlock_irqrestore(&uap->port.lock, flags);
905 msleep(10);
909 * This is the "normal" startup routine, using the above one
910 * wrapped with the lock and doing a schedule delay
912 static int pmz_startup(struct uart_port *port)
914 struct uart_pmac_port *uap = to_pmz(port);
915 unsigned long flags;
916 int pwr_delay = 0;
918 pmz_debug("pmz: startup()\n");
920 uap->flags |= PMACZILOG_FLAG_IS_OPEN;
922 /* A console is never powered down. Else, power up and
923 * initialize the chip
925 if (!ZS_IS_CONS(uap)) {
926 spin_lock_irqsave(&port->lock, flags);
927 pwr_delay = __pmz_startup(uap);
928 spin_unlock_irqrestore(&port->lock, flags);
930 sprintf(uap->irq_name, PMACZILOG_NAME"%d", uap->port.line);
931 if (request_irq(uap->port.irq, pmz_interrupt, IRQF_SHARED,
932 uap->irq_name, uap)) {
933 pmz_error("Unable to register zs interrupt handler.\n");
934 pmz_set_scc_power(uap, 0);
935 return -ENXIO;
938 /* Right now, we deal with delay by blocking here, I'll be
939 * smarter later on
941 if (pwr_delay != 0) {
942 pmz_debug("pmz: delaying %d ms\n", pwr_delay);
943 msleep(pwr_delay);
946 /* IrDA reset is done now */
947 if (ZS_IS_IRDA(uap))
948 pmz_irda_reset(uap);
950 /* Enable interrupt requests for the channel */
951 spin_lock_irqsave(&port->lock, flags);
952 pmz_interrupt_control(uap, 1);
953 spin_unlock_irqrestore(&port->lock, flags);
955 pmz_debug("pmz: startup() done.\n");
957 return 0;
960 static void pmz_shutdown(struct uart_port *port)
962 struct uart_pmac_port *uap = to_pmz(port);
963 unsigned long flags;
965 pmz_debug("pmz: shutdown()\n");
967 spin_lock_irqsave(&port->lock, flags);
969 /* Disable interrupt requests for the channel */
970 pmz_interrupt_control(uap, 0);
972 if (!ZS_IS_CONS(uap)) {
973 /* Disable receiver and transmitter */
974 uap->curregs[R3] &= ~RxENABLE;
975 uap->curregs[R5] &= ~TxENABLE;
977 /* Disable break assertion */
978 uap->curregs[R5] &= ~SND_BRK;
979 pmz_maybe_update_regs(uap);
982 spin_unlock_irqrestore(&port->lock, flags);
984 /* Release interrupt handler */
985 free_irq(uap->port.irq, uap);
987 spin_lock_irqsave(&port->lock, flags);
989 uap->flags &= ~PMACZILOG_FLAG_IS_OPEN;
991 if (!ZS_IS_CONS(uap))
992 pmz_set_scc_power(uap, 0); /* Shut the chip down */
994 spin_unlock_irqrestore(&port->lock, flags);
996 pmz_debug("pmz: shutdown() done.\n");
999 /* Shared by TTY driver and serial console setup. The port lock is held
1000 * and local interrupts are disabled.
1002 static void pmz_convert_to_zs(struct uart_pmac_port *uap, unsigned int cflag,
1003 unsigned int iflag, unsigned long baud)
1005 int brg;
1007 /* Switch to external clocking for IrDA high clock rates. That
1008 * code could be re-used for Midi interfaces with different
1009 * multipliers
1011 if (baud >= 115200 && ZS_IS_IRDA(uap)) {
1012 uap->curregs[R4] = X1CLK;
1013 uap->curregs[R11] = RCTRxCP | TCTRxCP;
1014 uap->curregs[R14] = 0; /* BRG off */
1015 uap->curregs[R12] = 0;
1016 uap->curregs[R13] = 0;
1017 uap->flags |= PMACZILOG_FLAG_IS_EXTCLK;
1018 } else {
1019 switch (baud) {
1020 case ZS_CLOCK/16: /* 230400 */
1021 uap->curregs[R4] = X16CLK;
1022 uap->curregs[R11] = 0;
1023 uap->curregs[R14] = 0;
1024 break;
1025 case ZS_CLOCK/32: /* 115200 */
1026 uap->curregs[R4] = X32CLK;
1027 uap->curregs[R11] = 0;
1028 uap->curregs[R14] = 0;
1029 break;
1030 default:
1031 uap->curregs[R4] = X16CLK;
1032 uap->curregs[R11] = TCBR | RCBR;
1033 brg = BPS_TO_BRG(baud, ZS_CLOCK / 16);
1034 uap->curregs[R12] = (brg & 255);
1035 uap->curregs[R13] = ((brg >> 8) & 255);
1036 uap->curregs[R14] = BRENAB;
1038 uap->flags &= ~PMACZILOG_FLAG_IS_EXTCLK;
1041 /* Character size, stop bits, and parity. */
1042 uap->curregs[3] &= ~RxN_MASK;
1043 uap->curregs[5] &= ~TxN_MASK;
1045 switch (cflag & CSIZE) {
1046 case CS5:
1047 uap->curregs[3] |= Rx5;
1048 uap->curregs[5] |= Tx5;
1049 uap->parity_mask = 0x1f;
1050 break;
1051 case CS6:
1052 uap->curregs[3] |= Rx6;
1053 uap->curregs[5] |= Tx6;
1054 uap->parity_mask = 0x3f;
1055 break;
1056 case CS7:
1057 uap->curregs[3] |= Rx7;
1058 uap->curregs[5] |= Tx7;
1059 uap->parity_mask = 0x7f;
1060 break;
1061 case CS8:
1062 default:
1063 uap->curregs[3] |= Rx8;
1064 uap->curregs[5] |= Tx8;
1065 uap->parity_mask = 0xff;
1066 break;
1068 uap->curregs[4] &= ~(SB_MASK);
1069 if (cflag & CSTOPB)
1070 uap->curregs[4] |= SB2;
1071 else
1072 uap->curregs[4] |= SB1;
1073 if (cflag & PARENB)
1074 uap->curregs[4] |= PAR_ENAB;
1075 else
1076 uap->curregs[4] &= ~PAR_ENAB;
1077 if (!(cflag & PARODD))
1078 uap->curregs[4] |= PAR_EVEN;
1079 else
1080 uap->curregs[4] &= ~PAR_EVEN;
1082 uap->port.read_status_mask = Rx_OVR;
1083 if (iflag & INPCK)
1084 uap->port.read_status_mask |= CRC_ERR | PAR_ERR;
1085 if (iflag & (IGNBRK | BRKINT | PARMRK))
1086 uap->port.read_status_mask |= BRK_ABRT;
1088 uap->port.ignore_status_mask = 0;
1089 if (iflag & IGNPAR)
1090 uap->port.ignore_status_mask |= CRC_ERR | PAR_ERR;
1091 if (iflag & IGNBRK) {
1092 uap->port.ignore_status_mask |= BRK_ABRT;
1093 if (iflag & IGNPAR)
1094 uap->port.ignore_status_mask |= Rx_OVR;
1097 if ((cflag & CREAD) == 0)
1098 uap->port.ignore_status_mask = 0xff;
1103 * Set the irda codec on the imac to the specified baud rate.
1105 static void pmz_irda_setup(struct uart_pmac_port *uap, unsigned long *baud)
1107 u8 cmdbyte;
1108 int t, version;
1110 switch (*baud) {
1111 /* SIR modes */
1112 case 2400:
1113 cmdbyte = 0x53;
1114 break;
1115 case 4800:
1116 cmdbyte = 0x52;
1117 break;
1118 case 9600:
1119 cmdbyte = 0x51;
1120 break;
1121 case 19200:
1122 cmdbyte = 0x50;
1123 break;
1124 case 38400:
1125 cmdbyte = 0x4f;
1126 break;
1127 case 57600:
1128 cmdbyte = 0x4e;
1129 break;
1130 case 115200:
1131 cmdbyte = 0x4d;
1132 break;
1133 /* The FIR modes aren't really supported at this point, how
1134 * do we select the speed ? via the FCR on KeyLargo ?
1136 case 1152000:
1137 cmdbyte = 0;
1138 break;
1139 case 4000000:
1140 cmdbyte = 0;
1141 break;
1142 default: /* 9600 */
1143 cmdbyte = 0x51;
1144 *baud = 9600;
1145 break;
1148 /* Wait for transmitter to drain */
1149 t = 10000;
1150 while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0
1151 || (read_zsreg(uap, R1) & ALL_SNT) == 0) {
1152 if (--t <= 0) {
1153 pmz_error("transmitter didn't drain\n");
1154 return;
1156 udelay(10);
1159 /* Drain the receiver too */
1160 t = 100;
1161 (void)read_zsdata(uap);
1162 (void)read_zsdata(uap);
1163 (void)read_zsdata(uap);
1164 mdelay(10);
1165 while (read_zsreg(uap, R0) & Rx_CH_AV) {
1166 read_zsdata(uap);
1167 mdelay(10);
1168 if (--t <= 0) {
1169 pmz_error("receiver didn't drain\n");
1170 return;
1174 /* Switch to command mode */
1175 uap->curregs[R5] |= DTR;
1176 write_zsreg(uap, R5, uap->curregs[R5]);
1177 zssync(uap);
1178 mdelay(1);
1180 /* Switch SCC to 19200 */
1181 pmz_convert_to_zs(uap, CS8, 0, 19200);
1182 pmz_load_zsregs(uap, uap->curregs);
1183 mdelay(1);
1185 /* Write get_version command byte */
1186 write_zsdata(uap, 1);
1187 t = 5000;
1188 while ((read_zsreg(uap, R0) & Rx_CH_AV) == 0) {
1189 if (--t <= 0) {
1190 pmz_error("irda_setup timed out on get_version byte\n");
1191 goto out;
1193 udelay(10);
1195 version = read_zsdata(uap);
1197 if (version < 4) {
1198 pmz_info("IrDA: dongle version %d not supported\n", version);
1199 goto out;
1202 /* Send speed mode */
1203 write_zsdata(uap, cmdbyte);
1204 t = 5000;
1205 while ((read_zsreg(uap, R0) & Rx_CH_AV) == 0) {
1206 if (--t <= 0) {
1207 pmz_error("irda_setup timed out on speed mode byte\n");
1208 goto out;
1210 udelay(10);
1212 t = read_zsdata(uap);
1213 if (t != cmdbyte)
1214 pmz_error("irda_setup speed mode byte = %x (%x)\n", t, cmdbyte);
1216 pmz_info("IrDA setup for %ld bps, dongle version: %d\n",
1217 *baud, version);
1219 (void)read_zsdata(uap);
1220 (void)read_zsdata(uap);
1221 (void)read_zsdata(uap);
1223 out:
1224 /* Switch back to data mode */
1225 uap->curregs[R5] &= ~DTR;
1226 write_zsreg(uap, R5, uap->curregs[R5]);
1227 zssync(uap);
1229 (void)read_zsdata(uap);
1230 (void)read_zsdata(uap);
1231 (void)read_zsdata(uap);
1235 static void __pmz_set_termios(struct uart_port *port, struct ktermios *termios,
1236 struct ktermios *old)
1238 struct uart_pmac_port *uap = to_pmz(port);
1239 unsigned long baud;
1241 pmz_debug("pmz: set_termios()\n");
1243 memcpy(&uap->termios_cache, termios, sizeof(struct ktermios));
1245 /* XXX Check which revs of machines actually allow 1 and 4Mb speeds
1246 * on the IR dongle. Note that the IRTTY driver currently doesn't know
1247 * about the FIR mode and high speed modes. So these are unused. For
1248 * implementing proper support for these, we should probably add some
1249 * DMA as well, at least on the Rx side, which isn't a simple thing
1250 * at this point.
1252 if (ZS_IS_IRDA(uap)) {
1253 /* Calc baud rate */
1254 baud = uart_get_baud_rate(port, termios, old, 1200, 4000000);
1255 pmz_debug("pmz: switch IRDA to %ld bauds\n", baud);
1256 /* Cet the irda codec to the right rate */
1257 pmz_irda_setup(uap, &baud);
1258 /* Set final baud rate */
1259 pmz_convert_to_zs(uap, termios->c_cflag, termios->c_iflag, baud);
1260 pmz_load_zsregs(uap, uap->curregs);
1261 zssync(uap);
1262 } else {
1263 baud = uart_get_baud_rate(port, termios, old, 1200, 230400);
1264 pmz_convert_to_zs(uap, termios->c_cflag, termios->c_iflag, baud);
1265 /* Make sure modem status interrupts are correctly configured */
1266 if (UART_ENABLE_MS(&uap->port, termios->c_cflag)) {
1267 uap->curregs[R15] |= DCDIE | SYNCIE | CTSIE;
1268 uap->flags |= PMACZILOG_FLAG_MODEM_STATUS;
1269 } else {
1270 uap->curregs[R15] &= ~(DCDIE | SYNCIE | CTSIE);
1271 uap->flags &= ~PMACZILOG_FLAG_MODEM_STATUS;
1274 /* Load registers to the chip */
1275 pmz_maybe_update_regs(uap);
1277 uart_update_timeout(port, termios->c_cflag, baud);
1279 pmz_debug("pmz: set_termios() done.\n");
1282 /* The port lock is not held. */
1283 static void pmz_set_termios(struct uart_port *port, struct ktermios *termios,
1284 struct ktermios *old)
1286 struct uart_pmac_port *uap = to_pmz(port);
1287 unsigned long flags;
1289 spin_lock_irqsave(&port->lock, flags);
1291 /* Disable IRQs on the port */
1292 pmz_interrupt_control(uap, 0);
1294 /* Setup new port configuration */
1295 __pmz_set_termios(port, termios, old);
1297 /* Re-enable IRQs on the port */
1298 if (ZS_IS_OPEN(uap))
1299 pmz_interrupt_control(uap, 1);
1301 spin_unlock_irqrestore(&port->lock, flags);
1304 static const char *pmz_type(struct uart_port *port)
1306 struct uart_pmac_port *uap = to_pmz(port);
1308 if (ZS_IS_IRDA(uap))
1309 return "Z85c30 ESCC - Infrared port";
1310 else if (ZS_IS_INTMODEM(uap))
1311 return "Z85c30 ESCC - Internal modem";
1312 return "Z85c30 ESCC - Serial port";
1315 /* We do not request/release mappings of the registers here, this
1316 * happens at early serial probe time.
1318 static void pmz_release_port(struct uart_port *port)
1322 static int pmz_request_port(struct uart_port *port)
1324 return 0;
1327 /* These do not need to do anything interesting either. */
1328 static void pmz_config_port(struct uart_port *port, int flags)
1332 /* We do not support letting the user mess with the divisor, IRQ, etc. */
1333 static int pmz_verify_port(struct uart_port *port, struct serial_struct *ser)
1335 return -EINVAL;
1338 #ifdef CONFIG_CONSOLE_POLL
1340 static int pmz_poll_get_char(struct uart_port *port)
1342 struct uart_pmac_port *uap =
1343 container_of(port, struct uart_pmac_port, port);
1344 int tries = 2;
1346 while (tries) {
1347 if ((read_zsreg(uap, R0) & Rx_CH_AV) != 0)
1348 return read_zsdata(uap);
1349 if (tries--)
1350 udelay(5);
1353 return NO_POLL_CHAR;
1356 static void pmz_poll_put_char(struct uart_port *port, unsigned char c)
1358 struct uart_pmac_port *uap =
1359 container_of(port, struct uart_pmac_port, port);
1361 /* Wait for the transmit buffer to empty. */
1362 while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0)
1363 udelay(5);
1364 write_zsdata(uap, c);
1367 #endif /* CONFIG_CONSOLE_POLL */
1369 static const struct uart_ops pmz_pops = {
1370 .tx_empty = pmz_tx_empty,
1371 .set_mctrl = pmz_set_mctrl,
1372 .get_mctrl = pmz_get_mctrl,
1373 .stop_tx = pmz_stop_tx,
1374 .start_tx = pmz_start_tx,
1375 .stop_rx = pmz_stop_rx,
1376 .enable_ms = pmz_enable_ms,
1377 .break_ctl = pmz_break_ctl,
1378 .startup = pmz_startup,
1379 .shutdown = pmz_shutdown,
1380 .set_termios = pmz_set_termios,
1381 .type = pmz_type,
1382 .release_port = pmz_release_port,
1383 .request_port = pmz_request_port,
1384 .config_port = pmz_config_port,
1385 .verify_port = pmz_verify_port,
1386 #ifdef CONFIG_CONSOLE_POLL
1387 .poll_get_char = pmz_poll_get_char,
1388 .poll_put_char = pmz_poll_put_char,
1389 #endif
1392 #ifdef CONFIG_PPC_PMAC
1395 * Setup one port structure after probing, HW is down at this point,
1396 * Unlike sunzilog, we don't need to pre-init the spinlock as we don't
1397 * register our console before uart_add_one_port() is called
1399 static int __init pmz_init_port(struct uart_pmac_port *uap)
1401 struct device_node *np = uap->node;
1402 const char *conn;
1403 const struct slot_names_prop {
1404 int count;
1405 char name[1];
1406 } *slots;
1407 int len;
1408 struct resource r_ports, r_rxdma, r_txdma;
1411 * Request & map chip registers
1413 if (of_address_to_resource(np, 0, &r_ports))
1414 return -ENODEV;
1415 uap->port.mapbase = r_ports.start;
1416 uap->port.membase = ioremap(uap->port.mapbase, 0x1000);
1418 uap->control_reg = uap->port.membase;
1419 uap->data_reg = uap->control_reg + 0x10;
1422 * Request & map DBDMA registers
1424 #ifdef HAS_DBDMA
1425 if (of_address_to_resource(np, 1, &r_txdma) == 0 &&
1426 of_address_to_resource(np, 2, &r_rxdma) == 0)
1427 uap->flags |= PMACZILOG_FLAG_HAS_DMA;
1428 #else
1429 memset(&r_txdma, 0, sizeof(struct resource));
1430 memset(&r_rxdma, 0, sizeof(struct resource));
1431 #endif
1432 if (ZS_HAS_DMA(uap)) {
1433 uap->tx_dma_regs = ioremap(r_txdma.start, 0x100);
1434 if (uap->tx_dma_regs == NULL) {
1435 uap->flags &= ~PMACZILOG_FLAG_HAS_DMA;
1436 goto no_dma;
1438 uap->rx_dma_regs = ioremap(r_rxdma.start, 0x100);
1439 if (uap->rx_dma_regs == NULL) {
1440 iounmap(uap->tx_dma_regs);
1441 uap->tx_dma_regs = NULL;
1442 uap->flags &= ~PMACZILOG_FLAG_HAS_DMA;
1443 goto no_dma;
1445 uap->tx_dma_irq = irq_of_parse_and_map(np, 1);
1446 uap->rx_dma_irq = irq_of_parse_and_map(np, 2);
1448 no_dma:
1451 * Detect port type
1453 if (of_device_is_compatible(np, "cobalt"))
1454 uap->flags |= PMACZILOG_FLAG_IS_INTMODEM;
1455 conn = of_get_property(np, "AAPL,connector", &len);
1456 if (conn && (strcmp(conn, "infrared") == 0))
1457 uap->flags |= PMACZILOG_FLAG_IS_IRDA;
1458 uap->port_type = PMAC_SCC_ASYNC;
1459 /* 1999 Powerbook G3 has slot-names property instead */
1460 slots = of_get_property(np, "slot-names", &len);
1461 if (slots && slots->count > 0) {
1462 if (strcmp(slots->name, "IrDA") == 0)
1463 uap->flags |= PMACZILOG_FLAG_IS_IRDA;
1464 else if (strcmp(slots->name, "Modem") == 0)
1465 uap->flags |= PMACZILOG_FLAG_IS_INTMODEM;
1467 if (ZS_IS_IRDA(uap))
1468 uap->port_type = PMAC_SCC_IRDA;
1469 if (ZS_IS_INTMODEM(uap)) {
1470 struct device_node* i2c_modem =
1471 of_find_node_by_name(NULL, "i2c-modem");
1472 if (i2c_modem) {
1473 const char* mid =
1474 of_get_property(i2c_modem, "modem-id", NULL);
1475 if (mid) switch(*mid) {
1476 case 0x04 :
1477 case 0x05 :
1478 case 0x07 :
1479 case 0x08 :
1480 case 0x0b :
1481 case 0x0c :
1482 uap->port_type = PMAC_SCC_I2S1;
1484 printk(KERN_INFO "pmac_zilog: i2c-modem detected, id: %d\n",
1485 mid ? (*mid) : 0);
1486 of_node_put(i2c_modem);
1487 } else {
1488 printk(KERN_INFO "pmac_zilog: serial modem detected\n");
1493 * Init remaining bits of "port" structure
1495 uap->port.iotype = UPIO_MEM;
1496 uap->port.irq = irq_of_parse_and_map(np, 0);
1497 uap->port.uartclk = ZS_CLOCK;
1498 uap->port.fifosize = 1;
1499 uap->port.ops = &pmz_pops;
1500 uap->port.type = PORT_PMAC_ZILOG;
1501 uap->port.flags = 0;
1504 * Fixup for the port on Gatwick for which the device-tree has
1505 * missing interrupts. Normally, the macio_dev would contain
1506 * fixed up interrupt info, but we use the device-tree directly
1507 * here due to early probing so we need the fixup too.
1509 if (uap->port.irq == 0 &&
1510 np->parent && np->parent->parent &&
1511 of_device_is_compatible(np->parent->parent, "gatwick")) {
1512 /* IRQs on gatwick are offset by 64 */
1513 uap->port.irq = irq_create_mapping(NULL, 64 + 15);
1514 uap->tx_dma_irq = irq_create_mapping(NULL, 64 + 4);
1515 uap->rx_dma_irq = irq_create_mapping(NULL, 64 + 5);
1518 /* Setup some valid baud rate information in the register
1519 * shadows so we don't write crap there before baud rate is
1520 * first initialized.
1522 pmz_convert_to_zs(uap, CS8, 0, 9600);
1524 return 0;
1528 * Get rid of a port on module removal
1530 static void pmz_dispose_port(struct uart_pmac_port *uap)
1532 struct device_node *np;
1534 np = uap->node;
1535 iounmap(uap->rx_dma_regs);
1536 iounmap(uap->tx_dma_regs);
1537 iounmap(uap->control_reg);
1538 uap->node = NULL;
1539 of_node_put(np);
1540 memset(uap, 0, sizeof(struct uart_pmac_port));
1544 * Called upon match with an escc node in the device-tree.
1546 static int pmz_attach(struct macio_dev *mdev, const struct of_device_id *match)
1548 struct uart_pmac_port *uap;
1549 int i;
1551 /* Iterate the pmz_ports array to find a matching entry
1553 for (i = 0; i < MAX_ZS_PORTS; i++)
1554 if (pmz_ports[i].node == mdev->ofdev.dev.of_node)
1555 break;
1556 if (i >= MAX_ZS_PORTS)
1557 return -ENODEV;
1560 uap = &pmz_ports[i];
1561 uap->dev = mdev;
1562 uap->port.dev = &mdev->ofdev.dev;
1563 dev_set_drvdata(&mdev->ofdev.dev, uap);
1565 /* We still activate the port even when failing to request resources
1566 * to work around bugs in ancient Apple device-trees
1568 if (macio_request_resources(uap->dev, "pmac_zilog"))
1569 printk(KERN_WARNING "%s: Failed to request resource"
1570 ", port still active\n",
1571 uap->node->name);
1572 else
1573 uap->flags |= PMACZILOG_FLAG_RSRC_REQUESTED;
1575 return uart_add_one_port(&pmz_uart_reg, &uap->port);
1579 * That one should not be called, macio isn't really a hotswap device,
1580 * we don't expect one of those serial ports to go away...
1582 static int pmz_detach(struct macio_dev *mdev)
1584 struct uart_pmac_port *uap = dev_get_drvdata(&mdev->ofdev.dev);
1586 if (!uap)
1587 return -ENODEV;
1589 uart_remove_one_port(&pmz_uart_reg, &uap->port);
1591 if (uap->flags & PMACZILOG_FLAG_RSRC_REQUESTED) {
1592 macio_release_resources(uap->dev);
1593 uap->flags &= ~PMACZILOG_FLAG_RSRC_REQUESTED;
1595 dev_set_drvdata(&mdev->ofdev.dev, NULL);
1596 uap->dev = NULL;
1597 uap->port.dev = NULL;
1599 return 0;
1603 static int pmz_suspend(struct macio_dev *mdev, pm_message_t pm_state)
1605 struct uart_pmac_port *uap = dev_get_drvdata(&mdev->ofdev.dev);
1607 if (uap == NULL) {
1608 printk("HRM... pmz_suspend with NULL uap\n");
1609 return 0;
1612 uart_suspend_port(&pmz_uart_reg, &uap->port);
1614 return 0;
1618 static int pmz_resume(struct macio_dev *mdev)
1620 struct uart_pmac_port *uap = dev_get_drvdata(&mdev->ofdev.dev);
1622 if (uap == NULL)
1623 return 0;
1625 uart_resume_port(&pmz_uart_reg, &uap->port);
1627 return 0;
1631 * Probe all ports in the system and build the ports array, we register
1632 * with the serial layer later, so we get a proper struct device which
1633 * allows the tty to attach properly. This is later than it used to be
1634 * but the tty layer really wants it that way.
1636 static int __init pmz_probe(void)
1638 struct device_node *node_p, *node_a, *node_b, *np;
1639 int count = 0;
1640 int rc;
1643 * Find all escc chips in the system
1645 for_each_node_by_name(node_p, "escc") {
1647 * First get channel A/B node pointers
1649 * TODO: Add routines with proper locking to do that...
1651 node_a = node_b = NULL;
1652 for (np = NULL; (np = of_get_next_child(node_p, np)) != NULL;) {
1653 if (strncmp(np->name, "ch-a", 4) == 0)
1654 node_a = of_node_get(np);
1655 else if (strncmp(np->name, "ch-b", 4) == 0)
1656 node_b = of_node_get(np);
1658 if (!node_a && !node_b) {
1659 of_node_put(node_a);
1660 of_node_put(node_b);
1661 printk(KERN_ERR "pmac_zilog: missing node %c for escc %pOF\n",
1662 (!node_a) ? 'a' : 'b', node_p);
1663 continue;
1667 * Fill basic fields in the port structures
1669 if (node_b != NULL) {
1670 pmz_ports[count].mate = &pmz_ports[count+1];
1671 pmz_ports[count+1].mate = &pmz_ports[count];
1673 pmz_ports[count].flags = PMACZILOG_FLAG_IS_CHANNEL_A;
1674 pmz_ports[count].node = node_a;
1675 pmz_ports[count+1].node = node_b;
1676 pmz_ports[count].port.line = count;
1677 pmz_ports[count+1].port.line = count+1;
1680 * Setup the ports for real
1682 rc = pmz_init_port(&pmz_ports[count]);
1683 if (rc == 0 && node_b != NULL)
1684 rc = pmz_init_port(&pmz_ports[count+1]);
1685 if (rc != 0) {
1686 of_node_put(node_a);
1687 of_node_put(node_b);
1688 memset(&pmz_ports[count], 0, sizeof(struct uart_pmac_port));
1689 memset(&pmz_ports[count+1], 0, sizeof(struct uart_pmac_port));
1690 continue;
1692 count += 2;
1694 pmz_ports_count = count;
1696 return 0;
1699 #else
1701 extern struct platform_device scc_a_pdev, scc_b_pdev;
1703 static int __init pmz_init_port(struct uart_pmac_port *uap)
1705 struct resource *r_ports;
1706 int irq;
1708 r_ports = platform_get_resource(uap->pdev, IORESOURCE_MEM, 0);
1709 irq = platform_get_irq(uap->pdev, 0);
1710 if (!r_ports || irq <= 0)
1711 return -ENODEV;
1713 uap->port.mapbase = r_ports->start;
1714 uap->port.membase = (unsigned char __iomem *) r_ports->start;
1715 uap->port.iotype = UPIO_MEM;
1716 uap->port.irq = irq;
1717 uap->port.uartclk = ZS_CLOCK;
1718 uap->port.fifosize = 1;
1719 uap->port.ops = &pmz_pops;
1720 uap->port.type = PORT_PMAC_ZILOG;
1721 uap->port.flags = 0;
1723 uap->control_reg = uap->port.membase;
1724 uap->data_reg = uap->control_reg + 4;
1725 uap->port_type = 0;
1727 pmz_convert_to_zs(uap, CS8, 0, 9600);
1729 return 0;
1732 static int __init pmz_probe(void)
1734 int err;
1736 pmz_ports_count = 0;
1738 pmz_ports[0].port.line = 0;
1739 pmz_ports[0].flags = PMACZILOG_FLAG_IS_CHANNEL_A;
1740 pmz_ports[0].pdev = &scc_a_pdev;
1741 err = pmz_init_port(&pmz_ports[0]);
1742 if (err)
1743 return err;
1744 pmz_ports_count++;
1746 pmz_ports[0].mate = &pmz_ports[1];
1747 pmz_ports[1].mate = &pmz_ports[0];
1748 pmz_ports[1].port.line = 1;
1749 pmz_ports[1].flags = 0;
1750 pmz_ports[1].pdev = &scc_b_pdev;
1751 err = pmz_init_port(&pmz_ports[1]);
1752 if (err)
1753 return err;
1754 pmz_ports_count++;
1756 return 0;
1759 static void pmz_dispose_port(struct uart_pmac_port *uap)
1761 memset(uap, 0, sizeof(struct uart_pmac_port));
1764 static int __init pmz_attach(struct platform_device *pdev)
1766 struct uart_pmac_port *uap;
1767 int i;
1769 /* Iterate the pmz_ports array to find a matching entry */
1770 for (i = 0; i < pmz_ports_count; i++)
1771 if (pmz_ports[i].pdev == pdev)
1772 break;
1773 if (i >= pmz_ports_count)
1774 return -ENODEV;
1776 uap = &pmz_ports[i];
1777 uap->port.dev = &pdev->dev;
1778 platform_set_drvdata(pdev, uap);
1780 return uart_add_one_port(&pmz_uart_reg, &uap->port);
1783 static int __exit pmz_detach(struct platform_device *pdev)
1785 struct uart_pmac_port *uap = platform_get_drvdata(pdev);
1787 if (!uap)
1788 return -ENODEV;
1790 uart_remove_one_port(&pmz_uart_reg, &uap->port);
1792 uap->port.dev = NULL;
1794 return 0;
1797 #endif /* !CONFIG_PPC_PMAC */
1799 #ifdef CONFIG_SERIAL_PMACZILOG_CONSOLE
1801 static void pmz_console_write(struct console *con, const char *s, unsigned int count);
1802 static int __init pmz_console_setup(struct console *co, char *options);
1804 static struct console pmz_console = {
1805 .name = PMACZILOG_NAME,
1806 .write = pmz_console_write,
1807 .device = uart_console_device,
1808 .setup = pmz_console_setup,
1809 .flags = CON_PRINTBUFFER,
1810 .index = -1,
1811 .data = &pmz_uart_reg,
1814 #define PMACZILOG_CONSOLE &pmz_console
1815 #else /* CONFIG_SERIAL_PMACZILOG_CONSOLE */
1816 #define PMACZILOG_CONSOLE (NULL)
1817 #endif /* CONFIG_SERIAL_PMACZILOG_CONSOLE */
1820 * Register the driver, console driver and ports with the serial
1821 * core
1823 static int __init pmz_register(void)
1825 pmz_uart_reg.nr = pmz_ports_count;
1826 pmz_uart_reg.cons = PMACZILOG_CONSOLE;
1829 * Register this driver with the serial core
1831 return uart_register_driver(&pmz_uart_reg);
1834 #ifdef CONFIG_PPC_PMAC
1836 static const struct of_device_id pmz_match[] =
1839 .name = "ch-a",
1842 .name = "ch-b",
1846 MODULE_DEVICE_TABLE (of, pmz_match);
1848 static struct macio_driver pmz_driver = {
1849 .driver = {
1850 .name = "pmac_zilog",
1851 .owner = THIS_MODULE,
1852 .of_match_table = pmz_match,
1854 .probe = pmz_attach,
1855 .remove = pmz_detach,
1856 .suspend = pmz_suspend,
1857 .resume = pmz_resume,
1860 #else
1862 static struct platform_driver pmz_driver = {
1863 .remove = __exit_p(pmz_detach),
1864 .driver = {
1865 .name = "scc",
1869 #endif /* !CONFIG_PPC_PMAC */
1871 static int __init init_pmz(void)
1873 int rc, i;
1874 printk(KERN_INFO "%s\n", version);
1877 * First, we need to do a direct OF-based probe pass. We
1878 * do that because we want serial console up before the
1879 * macio stuffs calls us back, and since that makes it
1880 * easier to pass the proper number of channels to
1881 * uart_register_driver()
1883 if (pmz_ports_count == 0)
1884 pmz_probe();
1887 * Bail early if no port found
1889 if (pmz_ports_count == 0)
1890 return -ENODEV;
1893 * Now we register with the serial layer
1895 rc = pmz_register();
1896 if (rc) {
1897 printk(KERN_ERR
1898 "pmac_zilog: Error registering serial device, disabling pmac_zilog.\n"
1899 "pmac_zilog: Did another serial driver already claim the minors?\n");
1900 /* effectively "pmz_unprobe()" */
1901 for (i=0; i < pmz_ports_count; i++)
1902 pmz_dispose_port(&pmz_ports[i]);
1903 return rc;
1907 * Then we register the macio driver itself
1909 #ifdef CONFIG_PPC_PMAC
1910 return macio_register_driver(&pmz_driver);
1911 #else
1912 return platform_driver_probe(&pmz_driver, pmz_attach);
1913 #endif
1916 static void __exit exit_pmz(void)
1918 int i;
1920 #ifdef CONFIG_PPC_PMAC
1921 /* Get rid of macio-driver (detach from macio) */
1922 macio_unregister_driver(&pmz_driver);
1923 #else
1924 platform_driver_unregister(&pmz_driver);
1925 #endif
1927 for (i = 0; i < pmz_ports_count; i++) {
1928 struct uart_pmac_port *uport = &pmz_ports[i];
1929 #ifdef CONFIG_PPC_PMAC
1930 if (uport->node != NULL)
1931 pmz_dispose_port(uport);
1932 #else
1933 if (uport->pdev != NULL)
1934 pmz_dispose_port(uport);
1935 #endif
1937 /* Unregister UART driver */
1938 uart_unregister_driver(&pmz_uart_reg);
1941 #ifdef CONFIG_SERIAL_PMACZILOG_CONSOLE
1943 static void pmz_console_putchar(struct uart_port *port, int ch)
1945 struct uart_pmac_port *uap =
1946 container_of(port, struct uart_pmac_port, port);
1948 /* Wait for the transmit buffer to empty. */
1949 while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0)
1950 udelay(5);
1951 write_zsdata(uap, ch);
1955 * Print a string to the serial port trying not to disturb
1956 * any possible real use of the port...
1958 static void pmz_console_write(struct console *con, const char *s, unsigned int count)
1960 struct uart_pmac_port *uap = &pmz_ports[con->index];
1961 unsigned long flags;
1963 spin_lock_irqsave(&uap->port.lock, flags);
1965 /* Turn of interrupts and enable the transmitter. */
1966 write_zsreg(uap, R1, uap->curregs[1] & ~TxINT_ENAB);
1967 write_zsreg(uap, R5, uap->curregs[5] | TxENABLE | RTS | DTR);
1969 uart_console_write(&uap->port, s, count, pmz_console_putchar);
1971 /* Restore the values in the registers. */
1972 write_zsreg(uap, R1, uap->curregs[1]);
1973 /* Don't disable the transmitter. */
1975 spin_unlock_irqrestore(&uap->port.lock, flags);
1979 * Setup the serial console
1981 static int __init pmz_console_setup(struct console *co, char *options)
1983 struct uart_pmac_port *uap;
1984 struct uart_port *port;
1985 int baud = 38400;
1986 int bits = 8;
1987 int parity = 'n';
1988 int flow = 'n';
1989 unsigned long pwr_delay;
1992 * XServe's default to 57600 bps
1994 if (of_machine_is_compatible("RackMac1,1")
1995 || of_machine_is_compatible("RackMac1,2")
1996 || of_machine_is_compatible("MacRISC4"))
1997 baud = 57600;
2000 * Check whether an invalid uart number has been specified, and
2001 * if so, search for the first available port that does have
2002 * console support.
2004 if (co->index >= pmz_ports_count)
2005 co->index = 0;
2006 uap = &pmz_ports[co->index];
2007 #ifdef CONFIG_PPC_PMAC
2008 if (uap->node == NULL)
2009 return -ENODEV;
2010 #else
2011 if (uap->pdev == NULL)
2012 return -ENODEV;
2013 #endif
2014 port = &uap->port;
2017 * Mark port as beeing a console
2019 uap->flags |= PMACZILOG_FLAG_IS_CONS;
2022 * Temporary fix for uart layer who didn't setup the spinlock yet
2024 spin_lock_init(&port->lock);
2027 * Enable the hardware
2029 pwr_delay = __pmz_startup(uap);
2030 if (pwr_delay)
2031 mdelay(pwr_delay);
2033 if (options)
2034 uart_parse_options(options, &baud, &parity, &bits, &flow);
2036 return uart_set_options(port, co, baud, parity, bits, flow);
2039 static int __init pmz_console_init(void)
2041 /* Probe ports */
2042 pmz_probe();
2044 if (pmz_ports_count == 0)
2045 return -ENODEV;
2047 /* TODO: Autoprobe console based on OF */
2048 /* pmz_console.index = i; */
2049 register_console(&pmz_console);
2051 return 0;
2054 console_initcall(pmz_console_init);
2055 #endif /* CONFIG_SERIAL_PMACZILOG_CONSOLE */
2057 module_init(init_pmz);
2058 module_exit(exit_pmz);