| blob | d8abf401918ac457a5ba6630df1951787a7c9ee4 |
1 // SPDX-License-Identifier: GPL-2.0+
2 /* Faraday FOTG210 EHCI-like driver
3 *
4 * Copyright (c) 2013 Faraday Technology Corporation
5 *
6 * Author: Yuan-Hsin Chen <yhchen@faraday-tech.com>
7 * Feng-Hsin Chiang <john453@faraday-tech.com>
8 * Po-Yu Chuang <ratbert.chuang@gmail.com>
9 *
10 * Most of code borrowed from the Linux-3.7 EHCI driver
11 */
12 #include <linux/module.h>
13 #include <linux/device.h>
14 #include <linux/dmapool.h>
15 #include <linux/kernel.h>
16 #include <linux/delay.h>
17 #include <linux/ioport.h>
18 #include <linux/sched.h>
19 #include <linux/vmalloc.h>
20 #include <linux/errno.h>
21 #include <linux/init.h>
22 #include <linux/hrtimer.h>
23 #include <linux/list.h>
24 #include <linux/interrupt.h>
25 #include <linux/usb.h>
26 #include <linux/usb/hcd.h>
27 #include <linux/moduleparam.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/debugfs.h>
30 #include <linux/slab.h>
31 #include <linux/uaccess.h>
32 #include <linux/platform_device.h>
33 #include <linux/io.h>
35 #include <asm/byteorder.h>
36 #include <asm/irq.h>
37 #include <asm/unaligned.h>
43 #undef FOTG210_URB_TRACE
44 #define FOTG210_STATS
46 /* magic numbers that can affect system performance */
49 #define FOTG210_TUNE_RL_TT 0
51 #define FOTG210_TUNE_MULT_TT 1
53 /* Some drivers think it's safe to schedule isochronous transfers more than 256
54 * ms into the future (partly as a result of an old bug in the scheduling
55 * code). In an attempt to avoid trouble, we will use a minimum scheduling
56 * length of 512 frames instead of 256.
57 */
60 /* Initial IRQ latency: faster than hw default */
65 /* initial park setting: slower than hw default */
70 /* for link power management(LPM) feature */
75 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
79 #define fotg210_dbg(fotg210, fmt, args...) \
80 dev_dbg(fotg210_to_hcd(fotg210)->self.controller, fmt, ## args)
81 #define fotg210_err(fotg210, fmt, args...) \
82 dev_err(fotg210_to_hcd(fotg210)->self.controller, fmt, ## args)
83 #define fotg210_info(fotg210, fmt, args...) \
84 dev_info(fotg210_to_hcd(fotg210)->self.controller, fmt, ## args)
85 #define fotg210_warn(fotg210, fmt, args...) \
86 dev_warn(fotg210_to_hcd(fotg210)->self.controller, fmt, ## args)
88 /* check the values in the HCSPARAMS register (host controller _Structural_
89 * parameters) see EHCI spec, Table 2-4 for each value
90 */
92 {
97 }
99 /* check the values in the HCCPARAMS register (host controller _Capability_
100 * parameters) see EHCI Spec, Table 2-5 for each value
101 */
103 {
107 params,
110 }
112 static void __maybe_unused
114 {
126 }
128 static void __maybe_unused
130 {
138 }
140 static void __maybe_unused
142 {
172 }
174 static int __maybe_unused
176 {
189 }
191 static int __maybe_unused
193 {
202 }
207 u32 command)
208 {
221 }
224 u32 status)
225 {
228 /* signaling state */
242 }
247 sig,
257 }
259 /* functions have the "wrong" filename when they're output... */
260 #define dbg_status(fotg210, label, status) { \
261 char _buf[80]; \
262 dbg_status_buf(_buf, sizeof(_buf), label, status); \
264 }
266 #define dbg_cmd(fotg210, label, command) { \
267 char _buf[80]; \
268 dbg_command_buf(_buf, sizeof(_buf), label, command); \
270 }
272 #define dbg_port(fotg210, label, port, status) { \
273 char _buf[80]; \
275 dbg_port_buf(_buf, sizeof(_buf), label, port, status));\
276 }
278 /* troubleshooting help: expose state in debugfs */
293 };
300 };
307 };
318 };
321 {
334 }
335 }
338 {
347 /* tries to advance through hw_alt_next */
349 }
353 {
354 u32 scratch;
355 u32 hw_curr;
366 else
374 /* else alt_next points to some other qtd */
375 }
391 /* hc may be modifying the list as we read it ... */
404 }
423 scratch,
431 }
440 done:
443 }
446 {
461 /* dumps a snapshot of the async schedule.
462 * usually empty except for long-term bulk reads, or head.
463 * one QH per line, and TDs we know about
464 */
477 }
481 }
483 /* count tds, get ep direction */
486 {
492 /* count tds, get ep direction */
494 temp++;
502 }
503 }
509 }
511 #define DBG_SCHED_LIMIT 64
513 {
521 __hc32 tag;
538 /* dump a snapshot of the periodic schedule.
539 * iso changes, interrupt usually doesn't.
540 */
563 /* uframe masks */
568 /* don't repeat what follows this qh */
577 }
579 }
580 /* show more info the first time around */
606 }
614 }
619 }
620 #undef DBG_SCHED_LIMIT
623 {
633 }
635 }
638 {
663 }
665 /* Capability Registers */
679 /* FIXME interpret both types of params */
690 /* Operational Registers */
719 }
721 #ifdef FOTG210_STATS
733 #endif
735 done:
739 }
741 static struct debug_buffer
743 {
753 }
756 }
759 {
768 }
775 }
777 out:
779 }
783 {
793 }
794 }
800 out:
803 }
806 {
812 }
815 }
817 {
821 }
824 {
834 }
837 {
839 fill_registers_buffer);
842 }
845 {
849 fotg210_debug_root);
867 file_error:
869 }
872 {
874 }
876 /* handshake - spin reading hc until handshake completes or fails
877 * @ptr: address of hc register to be read
878 * @mask: bits to look at in result of read
879 * @done: value of those bits when handshake succeeds
880 * @usec: timeout in microseconds
881 *
882 * Returns negative errno, or zero on success
883 *
884 * Success happens when the "mask" bits have the specified value (hardware
885 * handshake done). There are two failure modes: "usec" have passed (major
886 * hardware flakeout), or the register reads as all-ones (hardware removed).
887 *
888 * That last failure should_only happen in cases like physical cardbus eject
889 * before driver shutdown. But it also seems to be caused by bugs in cardbus
890 * bridge shutdown: shutting down the bridge before the devices using it.
891 */
894 {
895 u32 result;
905 usec--;
908 }
910 /* Force HC to halt state from unknown (EHCI spec section 2.3).
911 * Must be called with interrupts enabled and the lock not held.
912 */
914 {
915 u32 temp;
919 /* disable any irqs left enabled by previous code */
922 /*
923 * This routine gets called during probe before fotg210->command
924 * has been initialized, so we can't rely on its value.
925 */
936 }
938 /* Reset a non-running (STS_HALT == 1) controller.
939 * Must be called with interrupts enabled and the lock not held.
940 */
942 {
946 /* If the EHCI debug controller is active, special care must be
947 * taken before and after a host controller reset
948 */
969 }
971 /* Idle the controller (turn off the schedules).
972 * Must be called with interrupts enabled and the lock not held.
973 */
975 {
976 u32 temp;
981 /* wait for any schedule enables/disables to take effect */
986 /* then disable anything that's still active */
992 /* hardware can take 16 microframes to turn off ... */
995 }
1004 /* Set a bit in the USBCMD register */
1006 {
1010 /* unblock posted write */
1012 }
1014 /* Clear a bit in the USBCMD register */
1016 {
1020 /* unblock posted write */
1022 }
1024 /* EHCI timer support... Now using hrtimers.
1025 *
1026 * Lots of different events are triggered from fotg210->hrtimer. Whenever
1027 * the timer routine runs, it checks each possible event; events that are
1028 * currently enabled and whose expiration time has passed get handled.
1029 * The set of enabled events is stored as a collection of bitflags in
1030 * fotg210->enabled_hrtimer_events, and they are numbered in order of
1031 * increasing delay values (ranging between 1 ms and 100 ms).
1032 *
1033 * Rather than implementing a sorted list or tree of all pending events,
1034 * we keep track only of the lowest-numbered pending event, in
1035 * fotg210->next_hrtimer_event. Whenever fotg210->hrtimer gets restarted, its
1036 * expiration time is set to the timeout value for this event.
1037 *
1038 * As a result, events might not get handled right away; the actual delay
1039 * could be anywhere up to twice the requested delay. This doesn't
1040 * matter, because none of the events are especially time-critical. The
1041 * ones that matter most all have a delay of 1 ms, so they will be
1042 * handled after 2 ms at most, which is okay. In addition to this, we
1043 * allow for an expiration range of 1 ms.
1044 */
1046 /* Delay lengths for the hrtimer event types.
1047 * Keep this list sorted by delay length, in the same order as
1048 * the event types indexed by enum fotg210_hrtimer_event in fotg210.h.
1049 */
1061 };
1063 /* Enable a pending hrtimer event */
1066 {
1073 /* Track only the lowest-numbered pending event */
1078 }
1079 }
1082 /* Poll the STS_ASS status bit; see when it agrees with CMD_ASE */
1084 {
1087 /* Don't enable anything if the controller isn't running (e.g., died) */
1096 /* Poll again later, but give up after about 20 ms */
1101 }
1104 }
1107 /* The status is up-to-date; restart or stop the schedule as needed */
1115 /* Turn off the schedule after a while */
1117 FOTG210_HRTIMER_DISABLE_ASYNC,
1119 }
1120 }
1121 }
1123 /* Turn off the async schedule after a brief delay */
1125 {
1127 }
1130 /* Poll the STS_PSS status bit; see when it agrees with CMD_PSE */
1132 {
1135 /* Don't do anything if the controller isn't running (e.g., died) */
1144 /* Poll again later, but give up after about 20 ms */
1149 }
1152 }
1155 /* The status is up-to-date; restart or stop the schedule as needed */
1163 /* Turn off the schedule after a while */
1165 FOTG210_HRTIMER_DISABLE_PERIODIC,
1167 }
1168 }
1169 }
1171 /* Turn off the periodic schedule after a brief delay */
1173 {
1175 }
1178 /* Poll the STS_HALT status bit; see when a dead controller stops */
1180 {
1183 /* Give up after a few milliseconds */
1185 /* Try again later */
1189 }
1191 }
1193 /* Clean up the mess */
1199 /* Not in process context, so don't try to reset the controller */
1200 }
1203 /* Handle unlinked interrupt QHs once they are gone from the hardware */
1205 {
1208 /*
1209 * Process all the QHs on the intr_unlink list that were added
1210 * before the current unlink cycle began. The list is in
1211 * temporal order, so stop when we reach the first entry in the
1212 * current cycle. But if the root hub isn't running then
1213 * process all the QHs on the list.
1214 */
1224 }
1226 /* Handle remaining entries later */
1231 }
1233 }
1236 /* Start another free-iTDs/siTDs cycle */
1238 {
1245 }
1246 }
1248 /* Wait for controller to stop using old iTDs and siTDs */
1250 {
1261 }
1265 }
1268 /* Handle lost (or very late) IAA interrupts */
1270 {
1274 /*
1275 * Lost IAA irqs wedge things badly; seen first with a vt8235.
1276 * So we need this watchdog, but must protect it against both
1277 * (a) SMP races against real IAA firing and retriggering, and
1278 * (b) clean HC shutdown, when IAA watchdog was pending.
1279 */
1283 /* If we get here, IAA is *REALLY* late. It's barely
1284 * conceivable that the system is so busy that CMD_IAAD
1285 * is still legitimately set, so let's be sure it's
1286 * clear before we read STS_IAA. (The HC should clear
1287 * CMD_IAAD when it sets STS_IAA.)
1288 */
1291 /*
1292 * If IAA is set here it either legitimately triggered
1293 * after the watchdog timer expired (_way_ late, so we'll
1294 * still count it as lost) ... or a silicon erratum:
1295 * - VIA seems to set IAA without triggering the IRQ;
1296 * - IAAD potentially cleared without setting IAA.
1297 */
1303 }
1308 }
1309 }
1312 /* Enable the I/O watchdog, if appropriate */
1314 {
1315 /* Not needed if the controller isn't running or it's already enabled */
1321 /*
1322 * Isochronous transfers always need the watchdog.
1323 * For other sorts we use it only if the flag is set.
1324 */
1329 }
1332 /* Handler functions for the hrtimer event types.
1333 * Keep this array in the same order as the event types indexed by
1334 * enum fotg210_hrtimer_event in fotg210.h.
1335 */
1347 };
1350 {
1353 ktime_t now;
1364 /*
1365 * Check each pending event. If its time has expired, handle
1366 * the event; otherwise re-enable it.
1367 */
1372 else
1374 }
1378 }
1380 #define fotg210_bus_suspend NULL
1381 #define fotg210_bus_resume NULL
1385 {
1389 /* if reset finished and it's still not enabled -- handoff */
1391 /* with integrated TT, there's nobody to hand it to! */
1394 else
1399 }
1402 /* build "status change" packet (one or two bytes) from HC registers */
1405 {
1408 u32 mask;
1412 /* init status to no-changes */
1415 /* Inform the core about resumes-in-progress by returning
1416 * a non-zero value even if there are no status changes.
1417 */
1421 /* PORT_RESUME from hardware ~= PORT_STAT_C_SUSPEND */
1423 /* no hub change reports (bit 0) for now (power, ...) */
1425 /* port N changes (bit N)? */
1430 /*
1431 * Return status information even for ports with OWNER set.
1432 * Otherwise hub_wq wouldn't see the disconnect event when a
1433 * high-speed device is switched over to the companion
1434 * controller by the user.
1435 */
1442 }
1443 /* FIXME autosuspend idle root hubs */
1446 }
1450 {
1452 u16 temp;
1462 /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */
1469 }
1473 {
1482 /*
1483 * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
1484 * HCS_INDICATOR may say we can change LEDs to off/amber/green.
1485 * (track current state ourselves) ... blink for diagnostics,
1486 * power, "this is the one", etc. EHCI spec supports this.
1487 */
1495 /* no hub-wide feature/status flags */
1499 }
1504 wIndex--;
1508 /*
1509 * Even if OWNER is set, so the port is owned by the
1510 * companion controller, hub_wq needs to be able to clear
1511 * the port-change status bits (especially
1512 * USB_PORT_STAT_C_CONNECTION).
1513 */
1530 /* resume signaling for 20 msec */
1546 /* GetPortStatus clears reset */
1550 }
1555 buf);
1558 /* no hub-wide feature/status flags */
1560 /*cpu_to_le32s ((u32 *) buf); */
1565 wIndex--;
1569 /* wPortChange bits */
1579 /* whoever resumes must GetPortStatus to complete it!! */
1582 /* Remote Wakeup received? */
1584 /* resume signaling for 20 msec */
1587 /* check the port again */
1590 }
1592 /* resume completed? */
1599 /* stop resume signaling */
1603 status_reg);
1612 }
1614 }
1615 }
1617 /* whoever resets must GetPortStatus to complete it!! */
1624 /* force reset to complete */
1627 status_reg);
1628 /* REVISIT: some hardware needs 550+ usec to clear
1629 * this bit; seems too long to spin routinely...
1630 */
1637 }
1639 /* see what we found out */
1642 }
1647 }
1649 /* transfer dedicated ports to the companion hc */
1657 }
1659 /*
1660 * Even if OWNER is set, there's no harm letting hub_wq
1661 * see the wPortStatus values (they should all be 0 except
1662 * for PORT_POWER anyway).
1663 */
1668 }
1672 /* maybe the port was unsuspended without our knowledge */
1681 }
1699 /* no hub-wide feature/status flags */
1703 }
1711 wIndex--;
1720 /* After above check the port must be connected.
1721 * Set appropriate bit thus could put phy into low power
1722 * mode if we have hostpc feature
1723 */
1725 status_reg);
1731 /* line status bits may report this as low speed,
1732 * which can be fine if this root hub has a
1733 * transaction translator built in.
1734 */
1739 /*
1740 * caller must wait, then call GetPortStatus
1741 * usb 2.0 spec says 50 ms resets on root
1742 */
1748 /* For downstream facing ports (these): one hub port is put
1749 * into test mode according to USB2 11.24.2.13, then the hub
1750 * must be reset (which for root hub now means rmmod+modprobe,
1751 * or else system reboot). See EHCI 2.3.9 and 4.14 for info
1752 * about the EHCI-specific stuff.
1753 */
1761 /* Put all enabled ports into suspend */
1766 status_reg);
1779 }
1784 error:
1785 /* "stall" on error */
1787 }
1790 }
1794 {
1796 }
1800 {
1802 }
1804 /* There's basically three types of memory:
1805 * - data used only by the HCD ... kmalloc is fine
1806 * - async and periodic schedules, shared by HC and HCD ... these
1807 * need to use dma_pool or dma_alloc_coherent
1808 * - driver buffers, read/written by HC ... single shot DMA mapped
1809 *
1810 * There's also "register" data (e.g. PCI or SOC), which is memory mapped.
1811 * No memory seen by this driver is pageable.
1812 */
1814 /* Allocate the key transfer structures from the previously allocated pool */
1817 {
1824 }
1827 gfp_t flags)
1828 {
1830 dma_addr_t dma;
1837 }
1841 {
1843 }
1847 {
1848 /* clean qtds first, and know this is not linked */
1852 }
1857 }
1860 gfp_t flags)
1861 {
1863 dma_addr_t dma;
1874 /* dummy td enables safe urb queuing */
1879 }
1880 done:
1882 fail1:
1884 fail:
1887 }
1889 /* The queue heads and transfer descriptors are managed from pools tied
1890 * to each of the "per device" structures.
1891 * This is the initialisation and cleanup code.
1892 */
1895 {
1904 /* DMA consistent memory and pools */
1920 /* shadow periodic table */
1923 }
1925 /* remember to add cleanup code (above) if you add anything here */
1927 {
1930 /* QTDs for control/bulk/intr transfers */
1939 /* QHs for control/bulk/intr transfers */
1952 /* ITD for high speed ISO transfers */
1961 /* Hardware periodic table */
1972 /* software shadow of hardware table */
1974 flags);
1978 fail:
1982 }
1983 /* EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
1984 *
1985 * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
1986 * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
1987 * buffers needed for the larger number). We use one QH per endpoint, queue
1988 * multiple urbs (all three types) per endpoint. URBs may need several qtds.
1989 *
1990 * ISO traffic uses "ISO TD" (itd) records, and (along with
1991 * interrupts) needs careful scheduling. Performance improvements can be
1992 * an ongoing challenge. That's in "ehci-sched.c".
1993 *
1994 * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
1995 * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
1996 * (b) special fields in qh entries or (c) split iso entries. TTs will
1997 * buffer low/full speed data so the host collects it at high speed.
1998 */
2000 /* fill a qtd, returning how much of the buffer we were able to queue up */
2003 {
2007 /* one buffer entry per 4K ... first might be short or unaligned */
2017 /* per-qtd limit: from 16K to 20K (best alignment) */
2026 else
2028 }
2030 /* short packets may only terminate transfers */
2033 }
2038 }
2042 {
2045 /* writes to an active overlay are unsafe */
2051 /* Except for control endpoints, we make hardware maintain data
2052 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
2053 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
2054 * ever clear it.
2055 */
2064 }
2065 }
2068 }
2070 /* if it weren't for a common silicon quirk (writing the dummy into the qh
2071 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
2072 * recovery (including urb dequeue) would need software changes to a QH...
2073 */
2075 {
2083 /*
2084 * first qtd may already be partially processed.
2085 * If we come here during unlink, the QH overlay region
2086 * might have reference to the just unlinked qtd. The
2087 * qtd is updated in qh_completions(). Update the QH
2088 * overlay here.
2089 */
2093 }
2094 }
2098 }
2104 {
2115 }
2119 {
2121 /* If an async split transaction gets an error or is unlinked,
2122 * the TT buffer may be left in an indeterminate state. We
2123 * have to clear the TT buffer.
2124 *
2125 * Note: this routine is never called for Isochronous transfers.
2126 */
2139 }
2140 }
2141 }
2145 {
2148 /* count IN/OUT bytes, not SETUP (even short packets) */
2152 /* don't modify error codes */
2156 /* force cleanup after short read; not always an error */
2160 /* serious "can't proceed" faults reported by the hardware */
2163 /* FIXME "must" disable babbling device's port too */
2165 /* CERR nonzero + halt --> stall */
2169 /* In theory, more than one of the following bits can be set
2170 * since they are sticky and the transaction is retried.
2171 * Which to test first is rather arbitrary.
2172 */
2174 /* fs/ls interrupt xfer missed the complete-split */
2181 /* timeout, bad CRC, wrong PID, etc */
2189 }
2197 }
2200 }
2206 {
2210 /* S-mask in a QH means it's an interrupt urb */
2213 /* ... update hc-wide periodic stats (for usbfs) */
2215 }
2216 }
2221 /* report non-error and short read status as zero */
2225 }
2227 #ifdef FOTG210_URB_TRACE
2233 status,
2235 #endif
2237 /* complete() can reenter this HCD */
2242 }
2246 /* Process and free completed qtds for a qh, returning URBs to drivers.
2247 * Chases up to qh->hw_current. Returns number of completions called,
2248 * indicating how much "real" work we did.
2249 */
2252 {
2258 u8 state;
2264 /* completions (or tasks on other cpus) must never clobber HALT
2265 * till we've gone through and cleaned everything up, even when
2266 * they add urbs to this qh's queue or mark them for unlinking.
2267 *
2268 * NOTE: unlinking expects to be done in queue order.
2269 *
2270 * It's a bug for qh->qh_state to be anything other than
2271 * QH_STATE_IDLE, unless our caller is scan_async() or
2272 * scan_intr().
2273 */
2278 rescan:
2283 /* remove de-activated QTDs from front of queue.
2284 * after faults (including short reads), cleanup this urb
2285 * then let the queue advance.
2286 * if queue is stopped, handles unlinks.
2287 */
2294 /* clean up any state from previous QTD ...*/
2298 last_status);
2299 count++;
2301 }
2304 }
2306 /* ignore urbs submitted during completions we reported */
2310 /* hardware copies qtd out of qh overlay */
2314 /* always clean up qtds the hc de-activated */
2315 retry_xacterr:
2318 /* Report Data Buffer Error: non-fatal but useful */
2327 /* on STALL, error, and short reads this urb must
2328 * complete and all its qtds must be recycled.
2329 */
2332 /* retry transaction errors until we
2333 * reach the software xacterr limit
2334 */
2345 /* reset the token in the qtd and the
2346 * qh overlay (which still contains
2347 * the qtd) so that we pick up from
2348 * where we left off
2349 */
2354 token);
2357 token);
2359 }
2362 /* magic dummy for some short reads; qh won't advance.
2363 * that silicon quirk can kick in with this dummy too.
2364 *
2365 * other short reads won't stop the queue, including
2366 * control transfers (status stage handles that) or
2367 * most other single-qtd reads ... the queue stops if
2368 * URB_SHORT_NOT_OK was set so the driver submitting
2369 * the urbs could clean it up.
2370 */
2375 }
2377 /* stop scanning when we reach qtds the hc is using */
2382 /* scan the whole queue for unlinks whenever it stops */
2386 /* cancel everything if we halt, suspend, etc */
2390 /* this qtd is active; skip it unless a previous qtd
2391 * for its urb faulted, or its urb was canceled.
2392 */
2396 /* qh unlinked; token in overlay may be most current */
2402 /* An unlink may leave an incomplete
2403 * async transaction in the TT buffer.
2404 * We have to clear it.
2405 */
2407 token);
2408 }
2409 }
2411 /* unless we already know the urb's status, collect qtd status
2412 * and update count of bytes transferred. in common short read
2413 * cases with only one data qtd (including control transfers),
2414 * queue processing won't halt. but with two or more qtds (for
2415 * example, with a 32 KB transfer), when the first qtd gets a
2416 * short read the second must be removed by hand.
2417 */
2426 /* As part of low/full-speed endpoint-halt processing
2427 * we must clear the TT buffer (11.17.5).
2428 */
2431 /* The TT's in some hubs malfunction when they
2432 * receive this request following a STALL (they
2433 * stop sending isochronous packets). Since a
2434 * STALL can't leave the TT buffer in a busy
2435 * state (if you believe Figures 11-48 - 11-51
2436 * in the USB 2.0 spec), we won't clear the TT
2437 * buffer in this case. Strictly speaking this
2438 * is a violation of the spec.
2439 */
2443 }
2444 }
2446 /* if we're removing something not at the queue head,
2447 * patch the hardware queue pointer.
2448 */
2453 }
2455 /* remove qtd; it's recycled after possible urb completion */
2459 /* reinit the xacterr counter for the next qtd */
2461 }
2463 /* last urb's completion might still need calling */
2466 count++;
2468 }
2470 /* Do we need to rescan for URBs dequeued during a giveback? */
2472 /* If the QH is already unlinked, do the rescan now. */
2476 /* Otherwise we have to wait until the QH is fully unlinked.
2477 * Our caller will start an unlink if qh->needs_rescan is
2478 * set. But if an unlink has already started, nothing needs
2479 * to be done.
2480 */
2483 }
2485 /* restore original state; caller must unlink or relink */
2488 /* be sure the hardware's done with the qh before refreshing
2489 * it after fault cleanup, or recovering from silicon wrongly
2490 * overlaying the dummy qtd (which reduces DMA chatter).
2491 */
2498 /* We won't refresh a QH that's linked (after the HC
2499 * stopped the queue). That avoids a race:
2500 * - HC reads first part of QH;
2501 * - CPU updates that first part and the token;
2502 * - HC reads rest of that QH, including token
2503 * Result: HC gets an inconsistent image, and then
2504 * DMAs to/from the wrong memory (corrupting it).
2505 *
2506 * That should be rare for interrupt transfers,
2507 * except maybe high bandwidth ...
2508 */
2510 /* Tell the caller to start an unlink */
2513 /* otherwise, unlink already started */
2514 }
2515 }
2518 }
2520 /* high bandwidth multiplier, as encoded in highspeed endpoint descriptors */
2521 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
2522 /* ... and packet size, for any kind of endpoint descriptor */
2523 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
2525 /* reverse of qh_urb_transaction: free a list of TDs.
2526 * used for cleanup after errors, before HC sees an URB's TDs.
2527 */
2530 {
2536 }
2537 }
2539 /* create a list of filled qtds for this URB; won't link into qh.
2540 */
2543 {
2545 dma_addr_t buf;
2548 u32 token;
2552 /*
2553 * URBs map to sequences of QTDs: one logical transaction
2554 */
2563 /* for split transactions, SplitXState initialized to zero */
2568 /* SETUP pid */
2573 /* ... and always at least one more pid */
2583 /* for zero length DATA stages, STATUS is always IN */
2586 }
2588 /*
2589 * data transfer stage: buffer setup
2590 */
2596 /* urb->transfer_buffer_length may be smaller than the
2597 * size of the scatterlist (or vice versa)
2598 */
2604 }
2608 /* else it's already initted to "out" pid (0 << 8) */
2612 /*
2613 * buffer gets wrapped in one or more qtds;
2614 * last one may be "short" (including zero len)
2615 * and may serve as a control status ack
2616 */
2621 maxpacket);
2626 /*
2627 * short reads advance to a "magic" dummy instead of the next
2628 * qtd ... that forces the queue to stop, for manual cleanup.
2629 * (this will usually be overridden later.)
2630 */
2634 /* qh makes control packets use qtd toggle; maybe switch it */
2644 }
2653 }
2655 /*
2656 * unless the caller requires manual cleanup after short reads,
2657 * have the alt_next mechanism keep the queue running after the
2658 * last data qtd (the only one, for control and most other cases).
2659 */
2664 /*
2665 * control requests may need a terminating data "status" ack;
2666 * other OUT ones may need a terminating short packet
2667 * (zero length).
2668 */
2680 }
2690 /* never any data in such packets */
2692 }
2693 }
2695 /* by default, enable interrupt on urb completion */
2700 cleanup:
2703 }
2705 /* Would be best to create all qh's from config descriptors,
2706 * when each interface/altsetting is established. Unlink
2707 * any previous qh and cancel its urbs first; endpoints are
2708 * implicitly reset then (data toggle too).
2709 * That'd mean updating how usbcore talks to HCDs. (2.7?)
2710 */
2713 /* Each QH holds a qtd list; a QH is used for everything except iso.
2714 *
2715 * For interrupt urbs, the scheduler must set the microframe scheduling
2716 * mask(s) each time the QH gets scheduled. For highspeed, that's
2717 * just one microframe in the s-mask. For split interrupt transactions
2718 * there are additional complications: c-mask, maybe FSTNs.
2719 */
2721 gfp_t flags)
2722 {
2733 /*
2734 * init endpoint/device data for this QH
2735 */
2743 /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
2744 * acts like up to 3KB, but is built from smaller packets.
2745 */
2750 }
2752 /* Compute interrupt scheduling parameters just once, and save.
2753 * - allowing for high bandwidth, how many nsec/uframe are used?
2754 * - split transactions need a second CSPLIT uframe; same question
2755 * - splits also need a schedule gap (for full/low speed I/O)
2756 * - qh has a polling interval
2757 *
2758 * For control/bulk requests, the HC or TT handles these.
2759 */
2772 /* NOTE interval 2 or 4 uframes could work.
2773 * But interval 1 scheduling is simpler, and
2774 * includes high bandwidth.
2775 */
2780 }
2784 /* gap is f(FS/LS transfer times) */
2788 /* FIXME this just approximates SPLIT/CSPLIT times */
2795 }
2805 }
2806 }
2807 }
2809 /* support for tt scheduling, and access to toggles */
2812 /* using TT? */
2816 /* FALL THROUGH */
2819 /* EPS 0 means "full" */
2825 }
2830 /* Some Freescale processors have an erratum in which the
2831 * port number in the queue head was 0..N-1 instead of 1..N.
2832 */
2835 else
2838 /* set the address of the TT; for TDI's integrated
2839 * root hub tt, leave it zeroed.
2840 */
2844 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
2857 /* The USB spec says that high speed bulk endpoints
2858 * always use 512 byte maxpacket. But some device
2859 * vendors decided to ignore that, and MSFT is happy
2860 * to help them do so. So now people expect to use
2861 * such nonconformant devices with Linux too; sigh.
2862 */
2868 }
2873 done:
2876 }
2878 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
2880 /* init as live, toggle clear, advance to dummy */
2889 }
2892 {
2896 /* Stop waiting to turn off the async schedule */
2899 /* Don't start the schedule until ASS is 0 */
2902 }
2905 {
2909 /* The async schedule and async_unlink list are supposed to be empty */
2912 /* Don't turn off the schedule until ASS is 1 */
2914 }
2916 /* move qh (and its qtds) onto async queue; maybe enable queue. */
2919 {
2923 /* Don't link a QH if there's a Clear-TT-Buffer pending */
2929 /* clear halt and/or toggle; and maybe recover from silicon quirk */
2932 /* splice right after start */
2943 /* qtd completions reported later by interrupt */
2946 }
2948 /* For control/bulk/interrupt, return QH with these TDs appended.
2949 * Allocates and initializes the QH if necessary.
2950 * Returns null if it can't allocate a QH it needs to.
2951 * If the QH has TDs (urbs) already, that's great.
2952 */
2956 {
2962 /* can't sleep here, we have fotg210->lock... */
2965 }
2971 else
2973 qtd_list);
2975 /* control qh may need patching ... */
2977 /* usb_reset_device() briefly reverts to address 0 */
2980 }
2982 /* just one way to queue requests: swap with the dummy qtd.
2983 * only hc or qh_refresh() ever modify the overlay.
2984 */
2987 dma_addr_t dma;
2988 __hc32 token;
2990 /* to avoid racing the HC, use the dummy td instead of
2991 * the first td of our list (becomes new dummy). both
2992 * tds stay deactivated until we're done, when the
2993 * HC is allowed to fetch the old dummy (4.10.2).
2994 */
3011 /* hc must see the new dummy at list end */
3017 /* let the hc process these next qtds */
3022 }
3023 }
3025 }
3029 {
3037 #ifdef FOTG210_URB_TRACE
3038 {
3049 }
3050 #endif
3056 }
3066 }
3068 /* Control/bulk operations through TTs don't need scheduling,
3069 * the HC and TT handle it when the TT has a buffer ready.
3070 */
3073 done:
3078 }
3082 {
3085 /* Add to the end of the list of QHs waiting for the next IAAD */
3089 else
3093 /* Unlink it from the schedule */
3102 }
3105 {
3106 /*
3107 * Do nothing if an IAA cycle is already running or
3108 * if one will be started shortly.
3109 */
3113 /* Do all the waiting QHs at once */
3117 /* If the controller isn't running, we don't have to wait for it */
3122 /* Otherwise start a new IAA cycle */
3124 /* Make sure the unlinks are all visible to the hardware */
3132 }
3133 }
3135 /* the async qh for the qtds being unlinked are now gone from the HC */
3138 {
3141 /* Process the idle QHs */
3142 restart:
3157 }
3160 /* Start a new IAA cycle if any QHs are waiting for it */
3165 }
3166 }
3169 {
3174 /* Unlink all the async QHs that have been empty for a timer cycle */
3185 else
3187 }
3188 }
3190 /* Start a new IAA cycle if any QHs are waiting for it */
3194 /* QHs that haven't been empty for long enough will be handled later */
3199 }
3200 }
3202 /* makes sure the async qh will become idle */
3203 /* caller must own fotg210->lock */
3207 {
3208 /*
3209 * If the QH isn't linked then there's nothing we can do
3210 * unless we were called during a giveback, in which case
3211 * qh_completions() has to deal with it.
3212 */
3217 }
3221 }
3224 {
3232 rescan:
3233 /* clean any finished work for this qh */
3237 /*
3238 * Unlinks could happen here; completion reporting
3239 * drops the lock. That's why fotg210->qh_scan_next
3240 * always holds the next qh to scan; if the next qh
3241 * gets unlinked then fotg210->qh_scan_next is adjusted
3242 * in single_unlink_async().
3243 */
3253 }
3254 }
3256 /*
3257 * Unlink empty entries, reducing DMA usage as well
3258 * as HCD schedule-scanning costs. Delay for any qh
3259 * we just scanned, there's a not-unusual case that it
3260 * doesn't stay idle for long.
3261 */
3268 }
3269 }
3270 /* EHCI scheduled transaction support: interrupt, iso, split iso
3271 * These are called "periodic" transactions in the EHCI spec.
3272 *
3273 * Note that for interrupt transfers, the QH/QTD manipulation is shared
3274 * with the "asynchronous" transaction support (control/bulk transfers).
3275 * The only real difference is in how interrupt transfers are scheduled.
3276 *
3277 * For ISO, we make an "iso_stream" head to serve the same role as a QH.
3278 * It keeps track of every ITD (or SITD) that's linked, and holds enough
3279 * pre-calculated schedule data to make appending to the queue be quick.
3280 */
3283 /* periodic_next_shadow - return "next" pointer on shadow list
3284 * @periodic: host pointer to qh/itd
3285 * @tag: hardware tag for type of this record
3286 */
3289 {
3297 }
3298 }
3302 {
3304 /* our fotg210_shadow.qh is actually software part */
3307 /* others are hw parts */
3310 }
3311 }
3313 /* caller must hold fotg210->lock */
3316 {
3321 /* find predecessor of "ptr"; hw and shadow lists are in sync */
3328 }
3329 /* an interrupt entry (at list end) could have been shared */
3333 /* update shadow and hardware lists ... the old "next" pointers
3334 * from ptr may still be in use, the caller updates them.
3335 */
3341 }
3343 /* how many of the uframe's 125 usecs are allocated? */
3346 {
3356 /* is it in the S-mask? */
3359 /* ... or C-mask? */
3366 /* case Q_TYPE_FSTN: */
3368 /* for "save place" FSTNs, count the relevant INTR
3369 * bandwidth from the previous frame
3370 */
3383 }
3384 }
3389 }
3392 {
3399 else
3401 }
3403 /* return true iff the device's transaction translator is available
3404 * for a periodic transfer starting at the specified frame, using
3405 * all the uframes in the mask.
3406 */
3409 {
3413 /* note bandwidth wastage: split never follows csplit
3414 * (different dev or endpoint) until the next uframe.
3415 * calling convention doesn't make that distinction.
3416 */
3419 __hc32 type;
3433 u32 mask;
3437 /* "knows" no gap is needed */
3441 }
3445 /* case Q_TYPE_FSTN: */
3450 }
3452 /* collision or error */
3454 }
3455 }
3457 /* no collision */
3459 }
3462 {
3466 /* Stop waiting to turn off the periodic schedule */
3470 /* Don't start the schedule until PSS is 0 */
3473 }
3476 {
3480 /* Don't turn off the schedule until PSS is 1 */
3482 }
3484 /* periodic schedule slots have iso tds (normal or split) first, then a
3485 * sparse tree for active interrupt transfers.
3486 *
3487 * this just links in a qh; caller guarantees uframe masks are set right.
3488 * no FSTN support (yet; fotg210 0.96+)
3489 */
3491 {
3501 /* high bandwidth, or otherwise every microframe */
3511 /* skip the iso nodes at list head */
3519 }
3521 /* sorting each branch by period (slow-->fast)
3522 * enables sharing interior tree nodes
3523 */
3530 }
3531 /* link in this qh, unless some earlier pass did that */
3539 }
3540 }
3544 /* update per-qh bandwidth for usbfs */
3551 /* maybe enable periodic schedule processing */
3554 }
3558 {
3562 /*
3563 * If qh is for a low/full-speed device, simply unlinking it
3564 * could interfere with an ongoing split transaction. To unlink
3565 * it safely would require setting the QH_INACTIVATE bit and
3566 * waiting at least one frame, as described in EHCI 4.12.2.5.
3567 *
3568 * We won't bother with any of this. Instead, we assume that the
3569 * only reason for unlinking an interrupt QH while the current URB
3570 * is still active is to dequeue all the URBs (flush the whole
3571 * endpoint queue).
3572 *
3573 * If rebalancing the periodic schedule is ever implemented, this
3574 * approach will no longer be valid.
3575 */
3577 /* high bandwidth, or otherwise part of every microframe */
3585 /* update per-qh bandwidth for usbfs */
3596 /* qh->qh_next still "live" to HC */
3604 }
3608 {
3609 /* If the QH isn't linked then there's nothing we can do
3610 * unless we were called during a giveback, in which case
3611 * qh_completions() has to deal with it.
3612 */
3617 }
3621 /* Make sure the unlinks are visible before starting the timer */
3624 /*
3625 * The EHCI spec doesn't say how long it takes the controller to
3626 * stop accessing an unlinked interrupt QH. The timer delay is
3627 * 9 uframes; presumably that will be long enough.
3628 */
3631 /* New entries go at the end of the intr_unlink list */
3634 else
3646 }
3647 }
3650 {
3659 /* reschedule QH iff another request is queued */
3664 /* An error here likely indicates handshake failure
3665 * or no space left in the schedule. Neither fault
3666 * should happen often ...
3667 *
3668 * FIXME kill the now-dysfunctional queued urbs
3669 */
3673 }
3675 /* maybe turn off periodic schedule */
3678 }
3682 {
3685 /* complete split running into next frame?
3686 * given FSTN support, we could sometimes check...
3687 */
3691 /* convert "usecs we need" to "max already claimed" */
3694 /* we "know" 2 and 4 uframe intervals were rejected; so
3695 * for period 0, check _every_ microframe in the schedule.
3696 */
3701 uframe);
3704 }
3707 /* just check the specified uframe, at that period */
3714 }
3716 /* success! */
3718 }
3722 {
3735 }
3737 /* Make sure this tt's buffer is also available for CSPLITs.
3738 * We pessimize a bit; probably the typical full speed case
3739 * doesn't need the second CSPLIT.
3740 *
3741 * NOTE: both SPLIT and CSPLIT could be checked in just
3742 * one smart pass...
3743 */
3756 }
3757 done:
3759 }
3761 /* "first fit" scheduling policy used the first time through,
3762 * or when the previous schedule slot can't be re-used.
3763 */
3765 {
3768 __hc32 c_mask;
3776 /* reuse the previous schedule slots, if we can */
3785 }
3787 /* else scan the schedule to find a group of slots such that all
3788 * uframes have enough periodic bandwidth available.
3789 */
3791 /* "normal" case, uframing flexible except with splits */
3803 }
3804 }
3806 /* qh->period == 0 means every uframe */
3811 }
3816 /* reset S-frame and (maybe) C-frame masks */
3825 /* stuff into the periodic schedule */
3827 done:
3829 }
3833 {
3840 /* get endpoint and transfer/schedule data */
3848 }
3853 /* get qh and force any scheduling errors */
3859 }
3864 }
3866 /* then queue the urb's tds to the qh */
3870 /* ... update usbfs periodic stats */
3873 done:
3876 done_not_linked:
3882 }
3885 {
3890 rescan:
3891 /* clean any finished work for this qh */
3895 /*
3896 * Unlinks could happen here; completion reporting
3897 * drops the lock. That's why fotg210->qh_scan_next
3898 * always holds the next qh to scan; if the next qh
3899 * gets unlinked then fotg210->qh_scan_next is adjusted
3900 * in qh_unlink_periodic().
3901 */
3909 }
3910 }
3911 }
3913 /* fotg210_iso_stream ops work with both ITD and SITD */
3916 {
3924 }
3926 }
3931 {
3932 u32 buf1;
3938 /*
3939 * this might be a "high bandwidth" highspeed endpoint,
3940 * as encoded in the ep descriptor's wMaxPacket field
3941 */
3947 else
3959 /* usbfs wants to report the average usecs per frame tied up
3960 * when transfers on this endpoint are scheduled ...
3961 */
3970 }
3979 }
3983 {
3992 else
4005 }
4007 /* if dev->ep[epnum] is a QH, hw is set */
4013 }
4017 }
4019 /* fotg210_iso_sched ops can be ITD-only or SITD-only */
4022 gfp_t mem_flags)
4023 {
4033 }
4038 {
4042 /* how many uframes are needed for these transfers */
4045 /* figure out per-uframe itd fields that we'll need later
4046 * when we fit new itds into the schedule.
4047 */
4051 dma_addr_t buf;
4052 u32 trans;
4065 /* might need to cross a buffer page within a uframe */
4070 }
4071 }
4075 {
4078 /* caller must hold fotg210->lock!*/
4081 }
4085 {
4087 dma_addr_t itd_dma;
4101 else
4104 /* allocate/init ITDs */
4108 /*
4109 * Use iTDs from the free list, but not iTDs that may
4110 * still be in use by the hardware.
4111 */
4120 alloc_itd:
4129 }
4130 }
4134 }
4137 /* temporarily store schedule info in hcpriv */
4141 }
4145 {
4148 /* can't commit more than uframe_periodic_max usec */
4153 /* we know urb->interval is 2^N uframes */
4157 }
4159 /* This scheduler plans almost as far into the future as it has actual
4160 * periodic schedule slots. (Affected by TUNE_FLS, which defaults to
4161 * "as small as possible" to be cache-friendlier.) That limits the size
4162 * transfers you can stream reliably; avoid more than 64 msec per urb.
4163 * Also avoid queue depths of less than fotg210's worst irq latency (affected
4164 * by the per-urb URB_NO_INTERRUPT hint, the log2_irq_thresh module parameter,
4165 * and other factors); or more than about 230 msec total (for portability,
4166 * given FOTG210_TUNE_FLS and the slop). Or, write a smarter scheduler!
4167 */
4173 {
4186 }
4190 /* Typical case: reuse current schedule, stream is still active.
4191 * Hopefully there are no gaps from the host falling behind
4192 * (irq delays etc), but if there are we'll take the next
4193 * slot in the schedule, implicitly assuming URB_ISO_ASAP.
4194 */
4196 u32 excess;
4198 /* For high speed devices, allow scheduling within the
4199 * isochronous scheduling threshold. For full speed devices
4200 * and Intel PCI-based controllers, don't (work around for
4201 * Intel ICH9 bug).
4202 */
4205 else
4208 /* Fell behind (by up to twice the slop amount)?
4209 * We decide based on the time of the last currently-scheduled
4210 * slot, not the time of the next available slot.
4211 */
4216 else
4221 mod);
4224 }
4225 }
4227 /* need to schedule; when's the next (u)frame we could start?
4228 * this is bigger than fotg210->i_thresh allows; scheduling itself
4229 * isn't free, the slop should handle reasonably slow cpus. it
4230 * can also help high bandwidth if the dma and irq loads don't
4231 * jump until after the queue is primed.
4232 */
4238 /* NOTE: assumes URB_ISO_ASAP, to limit complexity/bugs */
4240 /* find a uframe slot with enough bandwidth.
4241 * Early uframes are more precious because full-speed
4242 * iso IN transfers can't use late uframes,
4243 * and therefore they should be allocated last.
4244 */
4248 start--;
4249 /* check schedule: enough space? */
4255 /* no room in the schedule */
4261 }
4262 }
4264 /* Tried to schedule too far into the future? */
4272 }
4276 /* report high speed start in uframes; full speed, in frames */
4281 /* Make sure scan_isoc() sees these */
4286 fail:
4290 }
4294 {
4297 /* it's been recently zeroed */
4306 /* All other fields are filled when scheduling */
4307 }
4312 {
4324 /* iso_frame_desc[].offset must be strictly increasing */
4331 }
4332 }
4336 {
4342 /* skip any iso nodes which might belong to previous microframes */
4350 }
4358 }
4360 /* fit urb's itds into the selected schedule slot; activate as needed */
4363 {
4380 }
4382 /* fill iTDs uframe by uframe */
4385 /* ASSERT: we have all necessary itds */
4387 /* ASSERT: no itds for this endpoint in this uframe */
4395 }
4404 packet++;
4406 /* link completed itds into the schedule */
4410 itd);
4412 }
4413 }
4416 /* don't need that schedule data any more */
4422 }
4424 #define ISO_ERRS (FOTG210_ISOC_BUF_ERR | FOTG210_ISOC_BABBLE |\
4425 FOTG210_ISOC_XACTERR)
4427 /* Process and recycle a completed ITD. Return true iff its urb completed,
4428 * and hence its completion callback probably added things to the hardware
4429 * schedule.
4430 *
4431 * Note that we carefully avoid recycling this descriptor until after any
4432 * completion callback runs, so that it won't be reused quickly. That is,
4433 * assuming (a) no more than two urbs per frame on this endpoint, and also
4434 * (b) only this endpoint's completions submit URBs. It seems some silicon
4435 * corrupts things if you reuse completed descriptors very quickly...
4436 */
4438 {
4441 u32 t;
4448 /* for each uframe with a packet */
4458 /* report transfer status */
4470 /* HC need not update length with this error */
4475 }
4481 /* URB was too late */
4483 }
4484 }
4486 /* handle completion now? */
4490 /* ASSERT: it's really the last itd for this urb
4491 * list_for_each_entry (itd, &stream->td_list, itd_list)
4492 * BUG_ON (itd->urb == urb);
4493 */
4495 /* give urb back to the driver; completion often (re)submits */
4511 }
4513 done:
4516 /* Add to the end of the free list for later reuse */
4519 /* Recycle the iTDs when the pipeline is empty (ep no longer in use) */
4524 }
4527 }
4530 gfp_t mem_flags)
4531 {
4536 /* Get iso_stream head */
4541 }
4544 USB_PORT_STAT_HIGH_SPEED)) {
4548 }
4550 #ifdef FOTG210_URB_TRACE
4558 stream);
4559 #endif
4561 /* allocate ITDs w/o locking anything */
4566 }
4568 /* schedule ... need to lock */
4573 }
4580 else
4582 done_not_linked:
4584 done:
4586 }
4590 {
4596 /* scan each element in frame's queue for completions */
4606 /* If this ITD is still active, leave it for
4607 * later processing ... check the next entry.
4608 * No need to check for activity unless the
4609 * frame is current.
4610 */
4617 }
4625 }
4626 }
4628 /* Take finished ITDs out of the schedule
4629 * and process them: recycle, maybe report
4630 * URB completion. HC won't cache the
4631 * pointer for much longer, if at all.
4632 */
4643 /* FALL THROUGH */
4646 /* End of the iTDs and siTDs */
4649 }
4651 /* assume completion callbacks modify the queue */
4654 }
4656 }
4659 {
4664 /*
4665 * When running, scan from last scan point up to "now"
4666 * else clean up by scanning everything that's left.
4667 * Touches as few pages as possible: cache-friendly.
4668 */
4676 }
4686 /* Stop when we have reached the current frame */
4690 }
4692 }
4694 /* Display / Set uframe_periodic_max
4695 */
4698 {
4705 }
4710 {
4716 ssize_t ret;
4724 uframe_periodic_max);
4726 }
4730 /*
4731 * lock, so that our checking does not race with possible periodic
4732 * bandwidth allocation through submitting new urbs.
4733 */
4736 /*
4737 * for request to decrease max periodic bandwidth, we have to check
4738 * every microframe in the schedule to see whether the decrease is
4739 * possible.
4740 */
4748 uframe));
4752 "cannot decrease uframe_periodic_max because periodic bandwidth is already allocated (%u > %u)\n",
4755 }
4756 }
4758 /* increasing is always ok */
4770 out_unlock:
4773 }
4778 {
4782 }
4785 {
4789 }
4790 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
4791 * The firmware seems to think that powering off is a wakeup event!
4792 * This routine turns off remote wakeup and everything else, on all ports.
4793 */
4795 {
4799 }
4801 /* Halt HC, turn off all ports, and let the BIOS use the companion controllers.
4802 * Must be called with interrupts enabled and the lock not held.
4803 */
4805 {
4812 }
4814 /* fotg210_shutdown kick in for silicon on any bus (not just pci, etc).
4815 * This forcibly disables dma and IRQs, helping kexec and other cases
4816 * where the next system software may expect clean state.
4817 */
4819 {
4831 }
4833 /* fotg210_work is called from some interrupts, timers, and so on.
4834 * it calls driver completion functions, after dropping fotg210->lock.
4835 */
4837 {
4838 /* another CPU may drop fotg210->lock during a schedule scan while
4839 * it reports urb completions. this flag guards against bogus
4840 * attempts at re-entrant schedule scanning.
4841 */
4845 }
4848 rescan:
4860 /* the IO watchdog guards against hardware or driver bugs that
4861 * misplace IRQs, and should let us run completely without IRQs.
4862 * such lossage has been observed on both VT6202 and VT8235.
4863 */
4865 }
4867 /* Called when the fotg210_hcd module is removed.
4868 */
4870 {
4875 /* no more interrupts ... */
4889 /* root hub is shut down separately (first, when possible) */
4895 #ifdef FOTG210_STATS
4901 #endif
4905 }
4907 /* one-time init, only for memory state */
4909 {
4911 u32 temp;
4913 u32 hcc_params;
4918 /*
4919 * keep io watchdog by default, those good HCDs could turn off it later
4920 */
4929 /*
4930 * by default set standard 80% (== 100 usec/uframe) max periodic
4931 * bandwidth as required by USB 2.0
4932 */
4935 /*
4936 * hw default: 1K periodic list heads, one per frame.
4937 * periodic_size can shrink by USBCMD update if hcc_params allows.
4938 */
4944 /* periodic schedule size can be smaller than default */
4957 }
4958 }
4963 /* controllers may cache some of the periodic schedule ... */
4966 /*
4967 * dedicate a qh for the async ring head, since we couldn't unlink
4968 * a 'real' qh without stopping the async schedule [4.8]. use it
4969 * as the 'reclamation list head' too.
4970 * its dummy is used in hw_alt_next of many tds, to prevent the qh
4971 * from automatically advancing to the next td after short reads.
4972 */
4982 /* clear interrupt enables, set irq latency */
4987 /* HW default park == 3, on hardware that supports it (like
4988 * NVidia and ALI silicon), maximizes throughput on the async
4989 * schedule by avoiding QH fetches between transfers.
4990 *
4991 * With fast usb storage devices and NForce2, "park" seems to
4992 * make problems: throughput reduction (!), data errors...
4993 */
4998 }
5000 }
5002 /* periodic schedule size can be smaller than default */
5005 }
5008 /* Accept arbitrarily long scatter-gather lists */
5012 }
5014 /* start HC running; it's halted, hcd_fotg210_init() has been run (once) */
5016 {
5018 u32 temp;
5019 u32 hcc_params;
5023 /* EHCI spec section 4.1 */
5030 /*
5031 * hcc_params controls whether fotg210->regs->segment must (!!!)
5032 * be used; it constrains QH/ITD/SITD and QTD locations.
5033 * dma_pool consistent memory always uses segment zero.
5034 * streaming mappings for I/O buffers, like pci_map_single(),
5035 * can return segments above 4GB, if the device allows.
5036 *
5037 * NOTE: the dma mask is visible through dev->dma_mask, so
5038 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
5039 * Scsi_Host.highmem_io, and so forth. It's readonly to all
5040 * host side drivers though.
5041 */
5044 /*
5045 * Philips, Intel, and maybe others need CMD_RUN before the
5046 * root hub will detect new devices (why?); NEC doesn't
5047 */
5053 /*
5054 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
5055 * are explicitly handed to companion controller(s), so no TT is
5056 * involved with the root hub. (Except where one is integrated,
5057 * and there's no companion controller unless maybe for USB OTG.)
5058 *
5059 * Turning on the CF flag will transfer ownership of all ports
5060 * from the companions to the EHCI controller. If any of the
5061 * companions are in the middle of a port reset at the time, it
5062 * could cause trouble. Write-locking ehci_cf_port_reset_rwsem
5063 * guarantees that no resets are in progress. After we set CF,
5064 * a short delay lets the hardware catch up; new resets shouldn't
5065 * be started before the port switching actions could complete.
5066 */
5069 /* unblock posted writes */
5085 /* GRR this is run-once init(), being done every time the HC starts.
5086 * So long as they're part of class devices, we can't do it init()
5087 * since the class device isn't created that early.
5088 */
5093 }
5096 {
5106 /* cache this readonly data; minimize chip reads */
5112 /* data structure init */
5124 }
5127 {
5136 /* e.g. cardbus physical eject */
5140 }
5142 /*
5143 * We don't use STS_FLR, but some controllers don't like it to
5144 * remain on, so mask it out along with the other status bits.
5145 */
5148 /* Shared IRQ? */
5153 }
5155 /* clear (just) interrupts */
5160 /* unrequested/ignored: Frame List Rollover */
5163 /* INT, ERR, and IAA interrupt rates can be throttled */
5165 /* normal [4.15.1.2] or error [4.15.1.1] completion */
5169 else
5172 }
5174 /* complete the unlinking of some qh [4.15.2.3] */
5177 /* Turn off the IAA watchdog */
5181 /*
5182 * Mild optimization: Allow another IAAD to reset the
5183 * hrtimer, if one occurs before the next expiration.
5184 * In theory we could always cancel the hrtimer, but
5185 * tests show that about half the time it will be reset
5186 * for some other event anyway.
5187 */
5191 /* guard against (alleged) silicon errata */
5199 }
5201 /* remote wakeup [4.3.1] */
5206 /* kick root hub later */
5209 /* resume root hub? */
5221 /* start 20 msec resume signaling from this port,
5222 * and make hub_wq collect PORT_STAT_C_SUSPEND to
5223 * stop that signaling. Use 5 ms extra for safety,
5224 * like usb_port_resume() does.
5225 */
5230 }
5231 }
5233 /* PCI errors [4.15.2.4] */
5238 dead:
5241 /* Don't let the controller do anything more */
5250 /* Handle completions when the controller stops */
5252 }
5260 }
5262 /* non-error returns are a promise to giveback() the urb later
5263 * we drop ownership so next owner (or urb unlink) can get it
5264 *
5265 * urb + dev is in hcd.self.controller.urb_list
5266 * we're queueing TDs onto software and hardware lists
5267 *
5268 * hcd-specific init for hcpriv hasn't been done yet
5269 *
5270 * NOTE: control, bulk, and interrupt share the same code to append TDs
5271 * to a (possibly active) QH, and the same QH scanning code.
5272 */
5274 gfp_t mem_flags)
5275 {
5283 /* qh_completions() code doesn't handle all the fault cases
5284 * in multi-TD control transfers. Even 1KB is rare anyway.
5285 */
5288 /* FALLTHROUGH */
5289 /* case PIPE_BULK: */
5302 }
5303 }
5305 /* remove from hardware lists
5306 * completions normally happen asynchronously
5307 */
5310 {
5322 /* case PIPE_CONTROL: */
5323 /* case PIPE_BULK:*/
5335 /* already started */
5338 /* QH might be waiting for a Clear-TT-Buffer */
5341 }
5360 }
5364 /* itd... */
5366 /* wait till next completion, do it then. */
5367 /* completion irqs can wait up to 1024 msec, */
5369 }
5370 done:
5373 }
5375 /* bulk qh holds the data toggle */
5379 {
5384 /* ASSERT: any requests/urbs are being unlinked */
5385 /* ASSERT: nobody can be submitting urbs for this any more */
5387 rescan:
5393 /* endpoints can be iso streams. for now, we don't
5394 * accelerate iso completions ... so spin a while.
5395 */
5402 /* BUG_ON(!list_empty(&stream->free_list)); */
5405 }
5416 /* periodic qh self-unlinks on empty, and a COMPLETING qh
5417 * may already be unlinked.
5418 */
5421 /* FALL THROUGH */
5424 idle_timeout:
5434 }
5435 /* fall through */
5437 /* caller was supposed to have unlinked any requests;
5438 * that's not our job. just leak this memory.
5439 */
5444 }
5445 done:
5448 }
5452 {
5466 /* For Bulk and Interrupt endpoints we maintain the toggle state
5467 * in the hardware; the toggle bits in udev aren't used at all.
5468 * When an endpoint is reset by usb_clear_halt() we must reset
5469 * the toggle bit in the QH.
5470 */
5478 /* The toggle value in the QH can't be updated
5479 * while the QH is active. Unlink it now;
5480 * re-linking will call qh_refresh().
5481 */
5484 else
5486 }
5487 }
5489 }
5492 {
5497 }
5499 /* The EHCI in ChipIdea HDRC cannot be a separate module or device,
5500 * because its registers (and irq) are shared between host/gadget/otg
5501 * functions and in order to facilitate role switching we cannot
5502 * give the fotg210 driver exclusive access to those.
5503 */
5513 /*
5514 * generic hardware linkage
5515 */
5519 /*
5520 * basic lifecycle operations
5521 */
5527 /*
5528 * managing i/o requests and associated device resources
5529 */
5535 /*
5536 * scheduling support
5537 */
5540 /*
5541 * root hub support
5542 */
5552 };
5555 {
5556 u32 value;
5565 }
5567 /**
5568 * fotg210_hcd_probe - initialize faraday FOTG210 HCDs
5569 *
5570 * Allocates basic resources for this USB host controller, and
5571 * then invokes the start() method for the HCD associated with it
5572 * through the hotplug entry's driver_data.
5573 */
5575 {
5593 }
5603 }
5612 }
5631 }
5636 failed:
5638 fail_create_hcd:
5641 }
5643 /**
5644 * fotg210_hcd_remove - shutdown processing for EHCI HCDs
5645 * @dev: USB Host Controller being removed
5646 *
5647 */
5649 {
5660 }
5665 },
5668 };
5671 {
5681 pr_warn("Warning! fotg210_hcd should always be loaded before uhci_hcd and ohci_hcd, not after\n");
5692 }
5699 clean:
5702 err_debug:
5705 }
5709 {
5713 }