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Linux 4.16.11
[linux/fpc-iii.git] / drivers / usb / host / isp116x-hcd.c
blob5f9234b9cf7b5f5ca85fc5a2a406fc26244d4054
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * ISP116x HCD (Host Controller Driver) for USB.
4 *
5 * Derived from the SL811 HCD, rewritten for ISP116x.
6 * Copyright (C) 2005 Olav Kongas <ok@artecdesign.ee>
7 *
8 * Portions:
9 * Copyright (C) 2004 Psion Teklogix (for NetBook PRO)
10 * Copyright (C) 2004 David Brownell
11 *
12 * Periodic scheduling is based on Roman's OHCI code
13 * Copyright (C) 1999 Roman Weissgaerber
14 *
15 */
16
17 /*
18 * The driver basically works. A number of people have used it with a range
19 * of devices.
20 *
21 * The driver passes all usbtests 1-14.
22 *
23 * Suspending/resuming of root hub via sysfs works. Remote wakeup works too.
24 * And suspending/resuming of platform device works too. Suspend/resume
25 * via HCD operations vector is not implemented.
26 *
27 * Iso transfer support is not implemented. Adding this would include
28 * implementing recovery from the failure to service the processed ITL
29 * fifo ram in time, which will involve chip reset.
30 *
31 * TODO:
32 + More testing of suspend/resume.
33 */
34
35 /*
36 ISP116x chips require certain delays between accesses to its
37 registers. The following timing options exist.
38
39 1. Configure your memory controller (the best)
40 2. Implement platform-specific delay function possibly
41 combined with configuring the memory controller; see
42 include/linux/usb-isp116x.h for more info. Some broken
43 memory controllers line LH7A400 SMC need this. Also,
44 uncomment for that to work the following
45 USE_PLATFORM_DELAY macro.
46 3. Use ndelay (easiest, poorest). For that, uncomment
47 the following USE_NDELAY macro.
48 */
49 #define USE_PLATFORM_DELAY
50 //#define USE_NDELAY
51
52 //#define DEBUG
53 //#define VERBOSE
54 /* Transfer descriptors. See dump_ptd() for printout format */
55 //#define PTD_TRACE
56 /* enqueuing/finishing log of urbs */
57 //#define URB_TRACE
58
59 #include <linux/module.h>
60 #include <linux/delay.h>
61 #include <linux/debugfs.h>
62 #include <linux/seq_file.h>
63 #include <linux/errno.h>
64 #include <linux/list.h>
65 #include <linux/slab.h>
66 #include <linux/usb.h>
67 #include <linux/usb/isp116x.h>
68 #include <linux/usb/hcd.h>
69 #include <linux/platform_device.h>
70
71 #include <asm/io.h>
72 #include <asm/irq.h>
73 #include <asm/byteorder.h>
74
75 #include "isp116x.h"
76
77 #define DRIVER_VERSION "03 Nov 2005"
78 #define DRIVER_DESC "ISP116x USB Host Controller Driver"
79
80 MODULE_DESCRIPTION(DRIVER_DESC);
81 MODULE_LICENSE("GPL");
82
83 static const char hcd_name[] = "isp116x-hcd";
84
85 /*-----------------------------------------------------------------*/
86
87 /*
88 Write len bytes to fifo, pad till 32-bit boundary
89 */
90 static void write_ptddata_to_fifo(struct isp116x *isp116x, void *buf, int len)
91 {
92 u8 *dp = (u8 *) buf;
93 u16 *dp2 = (u16 *) buf;
94 u16 w;
95 int quot = len % 4;
96
97 /* buffer is already in 'usb data order', which is LE. */
98 /* When reading buffer as u16, we have to take care byte order */
99 /* doesn't get mixed up */
100
101 if ((unsigned long)dp2 & 1) {
102 /* not aligned */
103 for (; len > 1; len -= 2) {
104 w = *dp++;
105 w |= *dp++ << 8;
106 isp116x_raw_write_data16(isp116x, w);
107 }
108 if (len)
109 isp116x_write_data16(isp116x, (u16) * dp);
110 } else {
111 /* aligned */
112 for (; len > 1; len -= 2) {
113 /* Keep byte order ! */
114 isp116x_raw_write_data16(isp116x, cpu_to_le16(*dp2++));
115 }
116
117 if (len)
118 isp116x_write_data16(isp116x, 0xff & *((u8 *) dp2));
119 }
120 if (quot == 1 || quot == 2)
121 isp116x_raw_write_data16(isp116x, 0);
122 }
123
124 /*
125 Read len bytes from fifo and then read till 32-bit boundary.
126 */
127 static void read_ptddata_from_fifo(struct isp116x *isp116x, void *buf, int len)
128 {
129 u8 *dp = (u8 *) buf;
130 u16 *dp2 = (u16 *) buf;
131 u16 w;
132 int quot = len % 4;
133
134 /* buffer is already in 'usb data order', which is LE. */
135 /* When reading buffer as u16, we have to take care byte order */
136 /* doesn't get mixed up */
137
138 if ((unsigned long)dp2 & 1) {
139 /* not aligned */
140 for (; len > 1; len -= 2) {
141 w = isp116x_raw_read_data16(isp116x);
142 *dp++ = w & 0xff;
143 *dp++ = (w >> 8) & 0xff;
144 }
145
146 if (len)
147 *dp = 0xff & isp116x_read_data16(isp116x);
148 } else {
149 /* aligned */
150 for (; len > 1; len -= 2) {
151 /* Keep byte order! */
152 *dp2++ = le16_to_cpu(isp116x_raw_read_data16(isp116x));
153 }
154
155 if (len)
156 *(u8 *) dp2 = 0xff & isp116x_read_data16(isp116x);
157 }
158 if (quot == 1 || quot == 2)
159 isp116x_raw_read_data16(isp116x);
160 }
161
162 /*
163 Write ptd's and data for scheduled transfers into
164 the fifo ram. Fifo must be empty and ready.
165 */
166 static void pack_fifo(struct isp116x *isp116x)
167 {
168 struct isp116x_ep *ep;
169 struct ptd *ptd;
170 int buflen = isp116x->atl_last_dir == PTD_DIR_IN
171 ? isp116x->atl_bufshrt : isp116x->atl_buflen;
172
173 isp116x_write_reg16(isp116x, HCuPINT, HCuPINT_AIIEOT);
174 isp116x_write_reg16(isp116x, HCXFERCTR, buflen);
175 isp116x_write_addr(isp116x, HCATLPORT | ISP116x_WRITE_OFFSET);
176 for (ep = isp116x->atl_active; ep; ep = ep->active) {
177 ptd = &ep->ptd;
178 dump_ptd(ptd);
179 dump_ptd_out_data(ptd, ep->data);
180 isp116x_write_data16(isp116x, ptd->count);
181 isp116x_write_data16(isp116x, ptd->mps);
182 isp116x_write_data16(isp116x, ptd->len);
183 isp116x_write_data16(isp116x, ptd->faddr);
184 buflen -= sizeof(struct ptd);
185 /* Skip writing data for last IN PTD */
186 if (ep->active || (isp116x->atl_last_dir != PTD_DIR_IN)) {
187 write_ptddata_to_fifo(isp116x, ep->data, ep->length);
188 buflen -= ALIGN(ep->length, 4);
189 }
190 }
191 BUG_ON(buflen);
192 }
193
194 /*
195 Read the processed ptd's and data from fifo ram back to
196 URBs' buffers. Fifo must be full and done
197 */
198 static void unpack_fifo(struct isp116x *isp116x)
199 {
200 struct isp116x_ep *ep;
201 struct ptd *ptd;
202 int buflen = isp116x->atl_last_dir == PTD_DIR_IN
203 ? isp116x->atl_buflen : isp116x->atl_bufshrt;
204
205 isp116x_write_reg16(isp116x, HCuPINT, HCuPINT_AIIEOT);
206 isp116x_write_reg16(isp116x, HCXFERCTR, buflen);
207 isp116x_write_addr(isp116x, HCATLPORT);
208 for (ep = isp116x->atl_active; ep; ep = ep->active) {
209 ptd = &ep->ptd;
210 ptd->count = isp116x_read_data16(isp116x);
211 ptd->mps = isp116x_read_data16(isp116x);
212 ptd->len = isp116x_read_data16(isp116x);
213 ptd->faddr = isp116x_read_data16(isp116x);
214 buflen -= sizeof(struct ptd);
215 /* Skip reading data for last Setup or Out PTD */
216 if (ep->active || (isp116x->atl_last_dir == PTD_DIR_IN)) {
217 read_ptddata_from_fifo(isp116x, ep->data, ep->length);
218 buflen -= ALIGN(ep->length, 4);
219 }
220 dump_ptd(ptd);
221 dump_ptd_in_data(ptd, ep->data);
222 }
223 BUG_ON(buflen);
224 }
225
226 /*---------------------------------------------------------------*/
227
228 /*
229 Set up PTD's.
230 */
231 static void preproc_atl_queue(struct isp116x *isp116x)
232 {
233 struct isp116x_ep *ep;
234 struct urb *urb;
235 struct ptd *ptd;
236 u16 len;
237
238 for (ep = isp116x->atl_active; ep; ep = ep->active) {
239 u16 toggle = 0, dir = PTD_DIR_SETUP;
240
241 BUG_ON(list_empty(&ep->hep->urb_list));
242 urb = container_of(ep->hep->urb_list.next,
243 struct urb, urb_list);
244 ptd = &ep->ptd;
245 len = ep->length;
246 ep->data = (unsigned char *)urb->transfer_buffer
247 + urb->actual_length;
248
249 switch (ep->nextpid) {
250 case USB_PID_IN:
251 toggle = usb_gettoggle(urb->dev, ep->epnum, 0);
252 dir = PTD_DIR_IN;
253 break;
254 case USB_PID_OUT:
255 toggle = usb_gettoggle(urb->dev, ep->epnum, 1);
256 dir = PTD_DIR_OUT;
257 break;
258 case USB_PID_SETUP:
259 len = sizeof(struct usb_ctrlrequest);
260 ep->data = urb->setup_packet;
261 break;
262 case USB_PID_ACK:
263 toggle = 1;
264 len = 0;
265 dir = (urb->transfer_buffer_length
266 && usb_pipein(urb->pipe))
267 ? PTD_DIR_OUT : PTD_DIR_IN;
268 break;
269 default:
270 ERR("%s %d: ep->nextpid %d\n", __func__, __LINE__,
271 ep->nextpid);
272 BUG();
273 }
274
275 ptd->count = PTD_CC_MSK | PTD_ACTIVE_MSK | PTD_TOGGLE(toggle);
276 ptd->mps = PTD_MPS(ep->maxpacket)
277 | PTD_SPD(urb->dev->speed == USB_SPEED_LOW)
278 | PTD_EP(ep->epnum);
279 ptd->len = PTD_LEN(len) | PTD_DIR(dir);
280 ptd->faddr = PTD_FA(usb_pipedevice(urb->pipe));
281 if (!ep->active) {
282 ptd->mps |= PTD_LAST_MSK;
283 isp116x->atl_last_dir = dir;
284 }
285 isp116x->atl_bufshrt = sizeof(struct ptd) + isp116x->atl_buflen;
286 isp116x->atl_buflen = isp116x->atl_bufshrt + ALIGN(len, 4);
287 }
288 }
289
290 /*
291 Take done or failed requests out of schedule. Give back
292 processed urbs.
293 */
294 static void finish_request(struct isp116x *isp116x, struct isp116x_ep *ep,
295 struct urb *urb, int status)
296 __releases(isp116x->lock) __acquires(isp116x->lock)
297 {
298 unsigned i;
299
300 ep->error_count = 0;
301
302 if (usb_pipecontrol(urb->pipe))
303 ep->nextpid = USB_PID_SETUP;
304
305 urb_dbg(urb, "Finish");
306
307 usb_hcd_unlink_urb_from_ep(isp116x_to_hcd(isp116x), urb);
308 spin_unlock(&isp116x->lock);
309 usb_hcd_giveback_urb(isp116x_to_hcd(isp116x), urb, status);
310 spin_lock(&isp116x->lock);
311
312 /* take idle endpoints out of the schedule */
313 if (!list_empty(&ep->hep->urb_list))
314 return;
315
316 /* async deschedule */
317 if (!list_empty(&ep->schedule)) {
318 list_del_init(&ep->schedule);
319 return;
320 }
321
322 /* periodic deschedule */
323 DBG("deschedule qh%d/%p branch %d\n", ep->period, ep, ep->branch);
324 for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) {
325 struct isp116x_ep *temp;
326 struct isp116x_ep **prev = &isp116x->periodic[i];
327
328 while (*prev && ((temp = *prev) != ep))
329 prev = &temp->next;
330 if (*prev)
331 *prev = ep->next;
332 isp116x->load[i] -= ep->load;
333 }
334 ep->branch = PERIODIC_SIZE;
335 isp116x_to_hcd(isp116x)->self.bandwidth_allocated -=
336 ep->load / ep->period;
337
338 /* switch irq type? */
339 if (!--isp116x->periodic_count) {
340 isp116x->irqenb &= ~HCuPINT_SOF;
341 isp116x->irqenb |= HCuPINT_ATL;
342 }
343 }
344
345 /*
346 Analyze transfer results, handle partial transfers and errors
347 */
348 static void postproc_atl_queue(struct isp116x *isp116x)
349 {
350 struct isp116x_ep *ep;
351 struct urb *urb;
352 struct usb_device *udev;
353 struct ptd *ptd;
354 int short_not_ok;
355 int status;
356 u8 cc;
357
358 for (ep = isp116x->atl_active; ep; ep = ep->active) {
359 BUG_ON(list_empty(&ep->hep->urb_list));
360 urb =
361 container_of(ep->hep->urb_list.next, struct urb, urb_list);
362 udev = urb->dev;
363 ptd = &ep->ptd;
364 cc = PTD_GET_CC(ptd);
365 short_not_ok = 1;
366 status = -EINPROGRESS;
367
368 /* Data underrun is special. For allowed underrun
369 we clear the error and continue as normal. For
370 forbidden underrun we finish the DATA stage
371 immediately while for control transfer,
372 we do a STATUS stage. */
373 if (cc == TD_DATAUNDERRUN) {
374 if (!(urb->transfer_flags & URB_SHORT_NOT_OK) ||
375 usb_pipecontrol(urb->pipe)) {
376 DBG("Allowed or control data underrun\n");
377 cc = TD_CC_NOERROR;
378 short_not_ok = 0;
379 } else {
380 ep->error_count = 1;
381 usb_settoggle(udev, ep->epnum,
382 ep->nextpid == USB_PID_OUT,
383 PTD_GET_TOGGLE(ptd));
384 urb->actual_length += PTD_GET_COUNT(ptd);
385 status = cc_to_error[TD_DATAUNDERRUN];
386 goto done;
387 }
388 }
389
390 if (cc != TD_CC_NOERROR && cc != TD_NOTACCESSED
391 && (++ep->error_count >= 3 || cc == TD_CC_STALL
392 || cc == TD_DATAOVERRUN)) {
393 status = cc_to_error[cc];
394 if (ep->nextpid == USB_PID_ACK)
395 ep->nextpid = 0;
396 goto done;
397 }
398 /* According to usb spec, zero-length Int transfer signals
399 finishing of the urb. Hey, does this apply only
400 for IN endpoints? */
401 if (usb_pipeint(urb->pipe) && !PTD_GET_LEN(ptd)) {
402 status = 0;
403 goto done;
404 }
405
406 /* Relax after previously failed, but later succeeded
407 or correctly NAK'ed retransmission attempt */
408 if (ep->error_count
409 && (cc == TD_CC_NOERROR || cc == TD_NOTACCESSED))
410 ep->error_count = 0;
411
412 /* Take into account idiosyncracies of the isp116x chip
413 regarding toggle bit for failed transfers */
414 if (ep->nextpid == USB_PID_OUT)
415 usb_settoggle(udev, ep->epnum, 1, PTD_GET_TOGGLE(ptd)
416 ^ (ep->error_count > 0));
417 else if (ep->nextpid == USB_PID_IN)
418 usb_settoggle(udev, ep->epnum, 0, PTD_GET_TOGGLE(ptd)
419 ^ (ep->error_count > 0));
420
421 switch (ep->nextpid) {
422 case USB_PID_IN:
423 case USB_PID_OUT:
424 urb->actual_length += PTD_GET_COUNT(ptd);
425 if (PTD_GET_ACTIVE(ptd)
426 || (cc != TD_CC_NOERROR && cc < 0x0E))
427 break;
428 if (urb->transfer_buffer_length != urb->actual_length) {
429 if (short_not_ok)
430 break;
431 } else {
432 if (urb->transfer_flags & URB_ZERO_PACKET
433 && ep->nextpid == USB_PID_OUT
434 && !(PTD_GET_COUNT(ptd) % ep->maxpacket)) {
435 DBG("Zero packet requested\n");
436 break;
437 }
438 }
439 /* All data for this URB is transferred, let's finish */
440 if (usb_pipecontrol(urb->pipe))
441 ep->nextpid = USB_PID_ACK;
442 else
443 status = 0;
444 break;
445 case USB_PID_SETUP:
446 if (PTD_GET_ACTIVE(ptd)
447 || (cc != TD_CC_NOERROR && cc < 0x0E))
448 break;
449 if (urb->transfer_buffer_length == urb->actual_length)
450 ep->nextpid = USB_PID_ACK;
451 else if (usb_pipeout(urb->pipe)) {
452 usb_settoggle(udev, 0, 1, 1);
453 ep->nextpid = USB_PID_OUT;
454 } else {
455 usb_settoggle(udev, 0, 0, 1);
456 ep->nextpid = USB_PID_IN;
457 }
458 break;
459 case USB_PID_ACK:
460 if (PTD_GET_ACTIVE(ptd)
461 || (cc != TD_CC_NOERROR && cc < 0x0E))
462 break;
463 status = 0;
464 ep->nextpid = 0;
465 break;
466 default:
467 BUG();
468 }
469
470 done:
471 if (status != -EINPROGRESS || urb->unlinked)
472 finish_request(isp116x, ep, urb, status);
473 }
474 }
475
476 /*
477 Scan transfer lists, schedule transfers, send data off
478 to chip.
479 */
480 static void start_atl_transfers(struct isp116x *isp116x)
481 {
482 struct isp116x_ep *last_ep = NULL, *ep;
483 struct urb *urb;
484 u16 load = 0;
485 int len, index, speed, byte_time;
486
487 if (atomic_read(&isp116x->atl_finishing))
488 return;
489
490 if (!HC_IS_RUNNING(isp116x_to_hcd(isp116x)->state))
491 return;
492
493 /* FIFO not empty? */
494 if (isp116x_read_reg16(isp116x, HCBUFSTAT) & HCBUFSTAT_ATL_FULL)
495 return;
496
497 isp116x->atl_active = NULL;
498 isp116x->atl_buflen = isp116x->atl_bufshrt = 0;
499
500 /* Schedule int transfers */
501 if (isp116x->periodic_count) {
502 isp116x->fmindex = index =
503 (isp116x->fmindex + 1) & (PERIODIC_SIZE - 1);
504 load = isp116x->load[index];
505 if (load) {
506 /* Bring all int transfers for this frame
507 into the active queue */
508 isp116x->atl_active = last_ep =
509 isp116x->periodic[index];
510 while (last_ep->next)
511 last_ep = (last_ep->active = last_ep->next);
512 last_ep->active = NULL;
513 }
514 }
515
516 /* Schedule control/bulk transfers */
517 list_for_each_entry(ep, &isp116x->async, schedule) {
518 urb = container_of(ep->hep->urb_list.next,
519 struct urb, urb_list);
520 speed = urb->dev->speed;
521 byte_time = speed == USB_SPEED_LOW
522 ? BYTE_TIME_LOWSPEED : BYTE_TIME_FULLSPEED;
523
524 if (ep->nextpid == USB_PID_SETUP) {
525 len = sizeof(struct usb_ctrlrequest);
526 } else if (ep->nextpid == USB_PID_ACK) {
527 len = 0;
528 } else {
529 /* Find current free length ... */
530 len = (MAX_LOAD_LIMIT - load) / byte_time;
531
532 /* ... then limit it to configured max size ... */
533 len = min(len, speed == USB_SPEED_LOW ?
534 MAX_TRANSFER_SIZE_LOWSPEED :
535 MAX_TRANSFER_SIZE_FULLSPEED);
536
537 /* ... and finally cut to the multiple of MaxPacketSize,
538 or to the real length if there's enough room. */
539 if (len <
540 (urb->transfer_buffer_length -
541 urb->actual_length)) {
542 len -= len % ep->maxpacket;
543 if (!len)
544 continue;
545 } else
546 len = urb->transfer_buffer_length -
547 urb->actual_length;
548 BUG_ON(len < 0);
549 }
550
551 load += len * byte_time;
552 if (load > MAX_LOAD_LIMIT)
553 break;
554
555 ep->active = NULL;
556 ep->length = len;
557 if (last_ep)
558 last_ep->active = ep;
559 else
560 isp116x->atl_active = ep;
561 last_ep = ep;
562 }
563
564 /* Avoid starving of endpoints */
565 if ((&isp116x->async)->next != (&isp116x->async)->prev)
566 list_move(&isp116x->async, (&isp116x->async)->next);
567
568 if (isp116x->atl_active) {
569 preproc_atl_queue(isp116x);
570 pack_fifo(isp116x);
571 }
572 }
573
574 /*
575 Finish the processed transfers
576 */
577 static void finish_atl_transfers(struct isp116x *isp116x)
578 {
579 if (!isp116x->atl_active)
580 return;
581 /* Fifo not ready? */
582 if (!(isp116x_read_reg16(isp116x, HCBUFSTAT) & HCBUFSTAT_ATL_DONE))
583 return;
584
585 atomic_inc(&isp116x->atl_finishing);
586 unpack_fifo(isp116x);
587 postproc_atl_queue(isp116x);
588 atomic_dec(&isp116x->atl_finishing);
589 }
590
591 static irqreturn_t isp116x_irq(struct usb_hcd *hcd)
592 {
593 struct isp116x *isp116x = hcd_to_isp116x(hcd);
594 u16 irqstat;
595 irqreturn_t ret = IRQ_NONE;
596
597 spin_lock(&isp116x->lock);
598 isp116x_write_reg16(isp116x, HCuPINTENB, 0);
599 irqstat = isp116x_read_reg16(isp116x, HCuPINT);
600 isp116x_write_reg16(isp116x, HCuPINT, irqstat);
601
602 if (irqstat & (HCuPINT_ATL | HCuPINT_SOF)) {
603 ret = IRQ_HANDLED;
604 finish_atl_transfers(isp116x);
605 }
606
607 if (irqstat & HCuPINT_OPR) {
608 u32 intstat = isp116x_read_reg32(isp116x, HCINTSTAT);
609 isp116x_write_reg32(isp116x, HCINTSTAT, intstat);
610 if (intstat & HCINT_UE) {
611 ERR("Unrecoverable error, HC is dead!\n");
612 /* IRQ's are off, we do no DMA,
613 perfectly ready to die ... */
614 hcd->state = HC_STATE_HALT;
615 usb_hc_died(hcd);
616 ret = IRQ_HANDLED;
617 goto done;
618 }
619 if (intstat & HCINT_RHSC)
620 /* When root hub or any of its ports is going
621 to come out of suspend, it may take more
622 than 10ms for status bits to stabilize. */
623 mod_timer(&hcd->rh_timer, jiffies
624 + msecs_to_jiffies(20) + 1);
625 if (intstat & HCINT_RD) {
626 DBG("---- remote wakeup\n");
627 usb_hcd_resume_root_hub(hcd);
628 }
629 irqstat &= ~HCuPINT_OPR;
630 ret = IRQ_HANDLED;
631 }
632
633 if (irqstat & (HCuPINT_ATL | HCuPINT_SOF)) {
634 start_atl_transfers(isp116x);
635 }
636
637 isp116x_write_reg16(isp116x, HCuPINTENB, isp116x->irqenb);
638 done:
639 spin_unlock(&isp116x->lock);
640 return ret;
641 }
642
643 /*-----------------------------------------------------------------*/
644
645 /* usb 1.1 says max 90% of a frame is available for periodic transfers.
646 * this driver doesn't promise that much since it's got to handle an
647 * IRQ per packet; irq handling latencies also use up that time.
648 */
649
650 /* out of 1000 us */
651 #define MAX_PERIODIC_LOAD 600
652 static int balance(struct isp116x *isp116x, u16 period, u16 load)
653 {
654 int i, branch = -ENOSPC;
655
656 /* search for the least loaded schedule branch of that period
657 which has enough bandwidth left unreserved. */
658 for (i = 0; i < period; i++) {
659 if (branch < 0 || isp116x->load[branch] > isp116x->load[i]) {
660 int j;
661
662 for (j = i; j < PERIODIC_SIZE; j += period) {
663 if ((isp116x->load[j] + load)
664 > MAX_PERIODIC_LOAD)
665 break;
666 }
667 if (j < PERIODIC_SIZE)
668 continue;
669 branch = i;
670 }
671 }
672 return branch;
673 }
674
675 /* NB! ALL the code above this point runs with isp116x->lock
676 held, irqs off
677 */
678
679 /*-----------------------------------------------------------------*/
680
681 static int isp116x_urb_enqueue(struct usb_hcd *hcd,
682 struct urb *urb,
683 gfp_t mem_flags)
684 {
685 struct isp116x *isp116x = hcd_to_isp116x(hcd);
686 struct usb_device *udev = urb->dev;
687 unsigned int pipe = urb->pipe;
688 int is_out = !usb_pipein(pipe);
689 int type = usb_pipetype(pipe);
690 int epnum = usb_pipeendpoint(pipe);
691 struct usb_host_endpoint *hep = urb->ep;
692 struct isp116x_ep *ep = NULL;
693 unsigned long flags;
694 int i;
695 int ret = 0;
696
697 urb_dbg(urb, "Enqueue");
698
699 if (type == PIPE_ISOCHRONOUS) {
700 ERR("Isochronous transfers not supported\n");
701 urb_dbg(urb, "Refused to enqueue");
702 return -ENXIO;
703 }
704 /* avoid all allocations within spinlocks: request or endpoint */
705 if (!hep->hcpriv) {
706 ep = kzalloc(sizeof *ep, mem_flags);
707 if (!ep)
708 return -ENOMEM;
709 }
710
711 spin_lock_irqsave(&isp116x->lock, flags);
712 if (!HC_IS_RUNNING(hcd->state)) {
713 kfree(ep);
714 ret = -ENODEV;
715 goto fail_not_linked;
716 }
717 ret = usb_hcd_link_urb_to_ep(hcd, urb);
718 if (ret) {
719 kfree(ep);
720 goto fail_not_linked;
721 }
722
723 if (hep->hcpriv)
724 ep = hep->hcpriv;
725 else {
726 INIT_LIST_HEAD(&ep->schedule);
727 ep->udev = udev;
728 ep->epnum = epnum;
729 ep->maxpacket = usb_maxpacket(udev, urb->pipe, is_out);
730 usb_settoggle(udev, epnum, is_out, 0);
731
732 if (type == PIPE_CONTROL) {
733 ep->nextpid = USB_PID_SETUP;
734 } else if (is_out) {
735 ep->nextpid = USB_PID_OUT;
736 } else {
737 ep->nextpid = USB_PID_IN;
738 }
739
740 if (urb->interval) {
741 /*
742 With INT URBs submitted, the driver works with SOF
743 interrupt enabled and ATL interrupt disabled. After
744 the PTDs are written to fifo ram, the chip starts
745 fifo processing and usb transfers after the next
746 SOF and continues until the transfers are finished
747 (succeeded or failed) or the frame ends. Therefore,
748 the transfers occur only in every second frame,
749 while fifo reading/writing and data processing
750 occur in every other second frame. */
751 if (urb->interval < 2)
752 urb->interval = 2;
753 if (urb->interval > 2 * PERIODIC_SIZE)
754 urb->interval = 2 * PERIODIC_SIZE;
755 ep->period = urb->interval >> 1;
756 ep->branch = PERIODIC_SIZE;
757 ep->load = usb_calc_bus_time(udev->speed,
758 !is_out,
759 (type == PIPE_ISOCHRONOUS),
760 usb_maxpacket(udev, pipe,
761 is_out)) /
762 1000;
763 }
764 hep->hcpriv = ep;
765 ep->hep = hep;
766 }
767
768 /* maybe put endpoint into schedule */
769 switch (type) {
770 case PIPE_CONTROL:
771 case PIPE_BULK:
772 if (list_empty(&ep->schedule))
773 list_add_tail(&ep->schedule, &isp116x->async);
774 break;
775 case PIPE_INTERRUPT:
776 urb->interval = ep->period;
777 ep->length = min_t(u32, ep->maxpacket,
778 urb->transfer_buffer_length);
779
780 /* urb submitted for already existing endpoint */
781 if (ep->branch < PERIODIC_SIZE)
782 break;
783
784 ep->branch = ret = balance(isp116x, ep->period, ep->load);
785 if (ret < 0)
786 goto fail;
787 ret = 0;
788
789 urb->start_frame = (isp116x->fmindex & (PERIODIC_SIZE - 1))
790 + ep->branch;
791
792 /* sort each schedule branch by period (slow before fast)
793 to share the faster parts of the tree without needing
794 dummy/placeholder nodes */
795 DBG("schedule qh%d/%p branch %d\n", ep->period, ep, ep->branch);
796 for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) {
797 struct isp116x_ep **prev = &isp116x->periodic[i];
798 struct isp116x_ep *here = *prev;
799
800 while (here && ep != here) {
801 if (ep->period > here->period)
802 break;
803 prev = &here->next;
804 here = *prev;
805 }
806 if (ep != here) {
807 ep->next = here;
808 *prev = ep;
809 }
810 isp116x->load[i] += ep->load;
811 }
812 hcd->self.bandwidth_allocated += ep->load / ep->period;
813
814 /* switch over to SOFint */
815 if (!isp116x->periodic_count++) {
816 isp116x->irqenb &= ~HCuPINT_ATL;
817 isp116x->irqenb |= HCuPINT_SOF;
818 isp116x_write_reg16(isp116x, HCuPINTENB,
819 isp116x->irqenb);
820 }
821 }
822
823 urb->hcpriv = hep;
824 start_atl_transfers(isp116x);
825
826 fail:
827 if (ret)
828 usb_hcd_unlink_urb_from_ep(hcd, urb);
829 fail_not_linked:
830 spin_unlock_irqrestore(&isp116x->lock, flags);
831 return ret;
832 }
833
834 /*
835 Dequeue URBs.
836 */
837 static int isp116x_urb_dequeue(struct usb_hcd *hcd, struct urb *urb,
838 int status)
839 {
840 struct isp116x *isp116x = hcd_to_isp116x(hcd);
841 struct usb_host_endpoint *hep;
842 struct isp116x_ep *ep, *ep_act;
843 unsigned long flags;
844 int rc;
845
846 spin_lock_irqsave(&isp116x->lock, flags);
847 rc = usb_hcd_check_unlink_urb(hcd, urb, status);
848 if (rc)
849 goto done;
850
851 hep = urb->hcpriv;
852 ep = hep->hcpriv;
853 WARN_ON(hep != ep->hep);
854
855 /* In front of queue? */
856 if (ep->hep->urb_list.next == &urb->urb_list)
857 /* active? */
858 for (ep_act = isp116x->atl_active; ep_act;
859 ep_act = ep_act->active)
860 if (ep_act == ep) {
861 VDBG("dequeue, urb %p active; wait for irq\n",
862 urb);
863 urb = NULL;
864 break;
865 }
866
867 if (urb)
868 finish_request(isp116x, ep, urb, status);
869 done:
870 spin_unlock_irqrestore(&isp116x->lock, flags);
871 return rc;
872 }
873
874 static void isp116x_endpoint_disable(struct usb_hcd *hcd,
875 struct usb_host_endpoint *hep)
876 {
877 int i;
878 struct isp116x_ep *ep = hep->hcpriv;
879
880 if (!ep)
881 return;
882
883 /* assume we'd just wait for the irq */
884 for (i = 0; i < 100 && !list_empty(&hep->urb_list); i++)
885 msleep(3);
886 if (!list_empty(&hep->urb_list))
887 WARNING("ep %p not empty?\n", ep);
888
889 kfree(ep);
890 hep->hcpriv = NULL;
891 }
892
893 static int isp116x_get_frame(struct usb_hcd *hcd)
894 {
895 struct isp116x *isp116x = hcd_to_isp116x(hcd);
896 u32 fmnum;
897 unsigned long flags;
898
899 spin_lock_irqsave(&isp116x->lock, flags);
900 fmnum = isp116x_read_reg32(isp116x, HCFMNUM);
901 spin_unlock_irqrestore(&isp116x->lock, flags);
902 return (int)fmnum;
903 }
904
905 /*
906 Adapted from ohci-hub.c. Currently we don't support autosuspend.
907 */
908 static int isp116x_hub_status_data(struct usb_hcd *hcd, char *buf)
909 {
910 struct isp116x *isp116x = hcd_to_isp116x(hcd);
911 int ports, i, changed = 0;
912 unsigned long flags;
913
914 if (!HC_IS_RUNNING(hcd->state))
915 return -ESHUTDOWN;
916
917 /* Report no status change now, if we are scheduled to be
918 called later */
919 if (timer_pending(&hcd->rh_timer))
920 return 0;
921
922 ports = isp116x->rhdesca & RH_A_NDP;
923 spin_lock_irqsave(&isp116x->lock, flags);
924 isp116x->rhstatus = isp116x_read_reg32(isp116x, HCRHSTATUS);
925 if (isp116x->rhstatus & (RH_HS_LPSC | RH_HS_OCIC))
926 buf[0] = changed = 1;
927 else
928 buf[0] = 0;
929
930 for (i = 0; i < ports; i++) {
931 u32 status = isp116x_read_reg32(isp116x, i ? HCRHPORT2 : HCRHPORT1);
932
933 if (status & (RH_PS_CSC | RH_PS_PESC | RH_PS_PSSC
934 | RH_PS_OCIC | RH_PS_PRSC)) {
935 changed = 1;
936 buf[0] |= 1 << (i + 1);
937 }
938 }
939 spin_unlock_irqrestore(&isp116x->lock, flags);
940 return changed;
941 }
942
943 static void isp116x_hub_descriptor(struct isp116x *isp116x,
944 struct usb_hub_descriptor *desc)
945 {
946 u32 reg = isp116x->rhdesca;
947
948 desc->bDescriptorType = USB_DT_HUB;
949 desc->bDescLength = 9;
950 desc->bHubContrCurrent = 0;
951 desc->bNbrPorts = (u8) (reg & 0x3);
952 /* Power switching, device type, overcurrent. */
953 desc->wHubCharacteristics = cpu_to_le16((u16) ((reg >> 8) &
954 (HUB_CHAR_LPSM |
955 HUB_CHAR_COMPOUND |
956 HUB_CHAR_OCPM)));
957 desc->bPwrOn2PwrGood = (u8) ((reg >> 24) & 0xff);
958 /* ports removable, and legacy PortPwrCtrlMask */
959 desc->u.hs.DeviceRemovable[0] = 0;
960 desc->u.hs.DeviceRemovable[1] = ~0;
961 }
962
963 /* Perform reset of a given port.
964 It would be great to just start the reset and let the
965 USB core to clear the reset in due time. However,
966 root hub ports should be reset for at least 50 ms, while
967 our chip stays in reset for about 10 ms. I.e., we must
968 repeatedly reset it ourself here.
969 */
970 static inline void root_port_reset(struct isp116x *isp116x, unsigned port)
971 {
972 u32 tmp;
973 unsigned long flags, t;
974
975 /* Root hub reset should be 50 ms, but some devices
976 want it even longer. */
977 t = jiffies + msecs_to_jiffies(100);
978
979 while (time_before(jiffies, t)) {
980 spin_lock_irqsave(&isp116x->lock, flags);
981 /* spin until any current reset finishes */
982 for (;;) {
983 tmp = isp116x_read_reg32(isp116x, port ?
984 HCRHPORT2 : HCRHPORT1);
985 if (!(tmp & RH_PS_PRS))
986 break;
987 udelay(500);
988 }
989 /* Don't reset a disconnected port */
990 if (!(tmp & RH_PS_CCS)) {
991 spin_unlock_irqrestore(&isp116x->lock, flags);
992 break;
993 }
994 /* Reset lasts 10ms (claims datasheet) */
995 isp116x_write_reg32(isp116x, port ? HCRHPORT2 :
996 HCRHPORT1, (RH_PS_PRS));
997 spin_unlock_irqrestore(&isp116x->lock, flags);
998 msleep(10);
999 }
1000 }
1001
1002 /* Adapted from ohci-hub.c */
1003 static int isp116x_hub_control(struct usb_hcd *hcd,
1004 u16 typeReq,
1005 u16 wValue, u16 wIndex, char *buf, u16 wLength)
1006 {
1007 struct isp116x *isp116x = hcd_to_isp116x(hcd);
1008 int ret = 0;
1009 unsigned long flags;
1010 int ports = isp116x->rhdesca & RH_A_NDP;
1011 u32 tmp = 0;
1012
1013 switch (typeReq) {
1014 case ClearHubFeature:
1015 DBG("ClearHubFeature: ");
1016 switch (wValue) {
1017 case C_HUB_OVER_CURRENT:
1018 DBG("C_HUB_OVER_CURRENT\n");
1019 spin_lock_irqsave(&isp116x->lock, flags);
1020 isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_OCIC);
1021 spin_unlock_irqrestore(&isp116x->lock, flags);
1022 /* fall through */
1023 case C_HUB_LOCAL_POWER:
1024 DBG("C_HUB_LOCAL_POWER\n");
1025 break;
1026 default:
1027 goto error;
1028 }
1029 break;
1030 case SetHubFeature:
1031 DBG("SetHubFeature: ");
1032 switch (wValue) {
1033 case C_HUB_OVER_CURRENT:
1034 case C_HUB_LOCAL_POWER:
1035 DBG("C_HUB_OVER_CURRENT or C_HUB_LOCAL_POWER\n");
1036 break;
1037 default:
1038 goto error;
1039 }
1040 break;
1041 case GetHubDescriptor:
1042 DBG("GetHubDescriptor\n");
1043 isp116x_hub_descriptor(isp116x,
1044 (struct usb_hub_descriptor *)buf);
1045 break;
1046 case GetHubStatus:
1047 DBG("GetHubStatus\n");
1048 *(__le32 *) buf = 0;
1049 break;
1050 case GetPortStatus:
1051 DBG("GetPortStatus\n");
1052 if (!wIndex || wIndex > ports)
1053 goto error;
1054 spin_lock_irqsave(&isp116x->lock, flags);
1055 tmp = isp116x_read_reg32(isp116x, (--wIndex) ? HCRHPORT2 : HCRHPORT1);
1056 spin_unlock_irqrestore(&isp116x->lock, flags);
1057 *(__le32 *) buf = cpu_to_le32(tmp);
1058 DBG("GetPortStatus: port[%d] %08x\n", wIndex + 1, tmp);
1059 break;
1060 case ClearPortFeature:
1061 DBG("ClearPortFeature: ");
1062 if (!wIndex || wIndex > ports)
1063 goto error;
1064 wIndex--;
1065
1066 switch (wValue) {
1067 case USB_PORT_FEAT_ENABLE:
1068 DBG("USB_PORT_FEAT_ENABLE\n");
1069 tmp = RH_PS_CCS;
1070 break;
1071 case USB_PORT_FEAT_C_ENABLE:
1072 DBG("USB_PORT_FEAT_C_ENABLE\n");
1073 tmp = RH_PS_PESC;
1074 break;
1075 case USB_PORT_FEAT_SUSPEND:
1076 DBG("USB_PORT_FEAT_SUSPEND\n");
1077 tmp = RH_PS_POCI;
1078 break;
1079 case USB_PORT_FEAT_C_SUSPEND:
1080 DBG("USB_PORT_FEAT_C_SUSPEND\n");
1081 tmp = RH_PS_PSSC;
1082 break;
1083 case USB_PORT_FEAT_POWER:
1084 DBG("USB_PORT_FEAT_POWER\n");
1085 tmp = RH_PS_LSDA;
1086 break;
1087 case USB_PORT_FEAT_C_CONNECTION:
1088 DBG("USB_PORT_FEAT_C_CONNECTION\n");
1089 tmp = RH_PS_CSC;
1090 break;
1091 case USB_PORT_FEAT_C_OVER_CURRENT:
1092 DBG("USB_PORT_FEAT_C_OVER_CURRENT\n");
1093 tmp = RH_PS_OCIC;
1094 break;
1095 case USB_PORT_FEAT_C_RESET:
1096 DBG("USB_PORT_FEAT_C_RESET\n");
1097 tmp = RH_PS_PRSC;
1098 break;
1099 default:
1100 goto error;
1101 }
1102 spin_lock_irqsave(&isp116x->lock, flags);
1103 isp116x_write_reg32(isp116x, wIndex
1104 ? HCRHPORT2 : HCRHPORT1, tmp);
1105 spin_unlock_irqrestore(&isp116x->lock, flags);
1106 break;
1107 case SetPortFeature:
1108 DBG("SetPortFeature: ");
1109 if (!wIndex || wIndex > ports)
1110 goto error;
1111 wIndex--;
1112 switch (wValue) {
1113 case USB_PORT_FEAT_SUSPEND:
1114 DBG("USB_PORT_FEAT_SUSPEND\n");
1115 spin_lock_irqsave(&isp116x->lock, flags);
1116 isp116x_write_reg32(isp116x, wIndex
1117 ? HCRHPORT2 : HCRHPORT1, RH_PS_PSS);
1118 spin_unlock_irqrestore(&isp116x->lock, flags);
1119 break;
1120 case USB_PORT_FEAT_POWER:
1121 DBG("USB_PORT_FEAT_POWER\n");
1122 spin_lock_irqsave(&isp116x->lock, flags);
1123 isp116x_write_reg32(isp116x, wIndex
1124 ? HCRHPORT2 : HCRHPORT1, RH_PS_PPS);
1125 spin_unlock_irqrestore(&isp116x->lock, flags);
1126 break;
1127 case USB_PORT_FEAT_RESET:
1128 DBG("USB_PORT_FEAT_RESET\n");
1129 root_port_reset(isp116x, wIndex);
1130 break;
1131 default:
1132 goto error;
1133 }
1134 break;
1135
1136 default:
1137 error:
1138 /* "protocol stall" on error */
1139 DBG("PROTOCOL STALL\n");
1140 ret = -EPIPE;
1141 }
1142 return ret;
1143 }
1144
1145 /*-----------------------------------------------------------------*/
1146
1147 #ifdef CONFIG_DEBUG_FS
1148
1149 static void dump_irq(struct seq_file *s, char *label, u16 mask)
1150 {
1151 seq_printf(s, "%s %04x%s%s%s%s%s%s\n", label, mask,
1152 mask & HCuPINT_CLKRDY ? " clkrdy" : "",
1153 mask & HCuPINT_SUSP ? " susp" : "",
1154 mask & HCuPINT_OPR ? " opr" : "",
1155 mask & HCuPINT_AIIEOT ? " eot" : "",
1156 mask & HCuPINT_ATL ? " atl" : "",
1157 mask & HCuPINT_SOF ? " sof" : "");
1158 }
1159
1160 static void dump_int(struct seq_file *s, char *label, u32 mask)
1161 {
1162 seq_printf(s, "%s %08x%s%s%s%s%s%s%s\n", label, mask,
1163 mask & HCINT_MIE ? " MIE" : "",
1164 mask & HCINT_RHSC ? " rhsc" : "",
1165 mask & HCINT_FNO ? " fno" : "",
1166 mask & HCINT_UE ? " ue" : "",
1167 mask & HCINT_RD ? " rd" : "",
1168 mask & HCINT_SF ? " sof" : "", mask & HCINT_SO ? " so" : "");
1169 }
1170
1171 static int isp116x_show_dbg(struct seq_file *s, void *unused)
1172 {
1173 struct isp116x *isp116x = s->private;
1174
1175 seq_printf(s, "%s\n%s version %s\n",
1176 isp116x_to_hcd(isp116x)->product_desc, hcd_name,
1177 DRIVER_VERSION);
1178
1179 if (HC_IS_SUSPENDED(isp116x_to_hcd(isp116x)->state)) {
1180 seq_printf(s, "HCD is suspended\n");
1181 return 0;
1182 }
1183 if (!HC_IS_RUNNING(isp116x_to_hcd(isp116x)->state)) {
1184 seq_printf(s, "HCD not running\n");
1185 return 0;
1186 }
1187
1188 spin_lock_irq(&isp116x->lock);
1189 dump_irq(s, "hc_irq_enable", isp116x_read_reg16(isp116x, HCuPINTENB));
1190 dump_irq(s, "hc_irq_status", isp116x_read_reg16(isp116x, HCuPINT));
1191 dump_int(s, "hc_int_enable", isp116x_read_reg32(isp116x, HCINTENB));
1192 dump_int(s, "hc_int_status", isp116x_read_reg32(isp116x, HCINTSTAT));
1193 isp116x_show_regs_seq(isp116x, s);
1194 spin_unlock_irq(&isp116x->lock);
1195 seq_printf(s, "\n");
1196
1197 return 0;
1198 }
1199
1200 static int isp116x_open_seq(struct inode *inode, struct file *file)
1201 {
1202 return single_open(file, isp116x_show_dbg, inode->i_private);
1203 }
1204
1205 static const struct file_operations isp116x_debug_fops = {
1206 .open = isp116x_open_seq,
1207 .read = seq_read,
1208 .llseek = seq_lseek,
1209 .release = single_release,
1210 };
1211
1212 static int create_debug_file(struct isp116x *isp116x)
1213 {
1214 isp116x->dentry = debugfs_create_file(hcd_name,
1215 S_IRUGO, NULL, isp116x,
1216 &isp116x_debug_fops);
1217 if (!isp116x->dentry)
1218 return -ENOMEM;
1219 return 0;
1220 }
1221
1222 static void remove_debug_file(struct isp116x *isp116x)
1223 {
1224 debugfs_remove(isp116x->dentry);
1225 }
1226
1227 #else
1228
1229 #define create_debug_file(d) 0
1230 #define remove_debug_file(d) do{}while(0)
1231
1232 #endif /* CONFIG_DEBUG_FS */
1233
1234 /*-----------------------------------------------------------------*/
1235
1236 /*
1237 Software reset - can be called from any contect.
1238 */
1239 static int isp116x_sw_reset(struct isp116x *isp116x)
1240 {
1241 int retries = 15;
1242 unsigned long flags;
1243 int ret = 0;
1244
1245 spin_lock_irqsave(&isp116x->lock, flags);
1246 isp116x_write_reg16(isp116x, HCSWRES, HCSWRES_MAGIC);
1247 isp116x_write_reg32(isp116x, HCCMDSTAT, HCCMDSTAT_HCR);
1248 while (--retries) {
1249 /* It usually resets within 1 ms */
1250 mdelay(1);
1251 if (!(isp116x_read_reg32(isp116x, HCCMDSTAT) & HCCMDSTAT_HCR))
1252 break;
1253 }
1254 if (!retries) {
1255 ERR("Software reset timeout\n");
1256 ret = -ETIME;
1257 }
1258 spin_unlock_irqrestore(&isp116x->lock, flags);
1259 return ret;
1260 }
1261
1262 static int isp116x_reset(struct usb_hcd *hcd)
1263 {
1264 struct isp116x *isp116x = hcd_to_isp116x(hcd);
1265 unsigned long t;
1266 u16 clkrdy = 0;
1267 int ret, timeout = 15 /* ms */ ;
1268
1269 ret = isp116x_sw_reset(isp116x);
1270 if (ret)
1271 return ret;
1272
1273 t = jiffies + msecs_to_jiffies(timeout);
1274 while (time_before_eq(jiffies, t)) {
1275 msleep(4);
1276 spin_lock_irq(&isp116x->lock);
1277 clkrdy = isp116x_read_reg16(isp116x, HCuPINT) & HCuPINT_CLKRDY;
1278 spin_unlock_irq(&isp116x->lock);
1279 if (clkrdy)
1280 break;
1281 }
1282 if (!clkrdy) {
1283 ERR("Clock not ready after %dms\n", timeout);
1284 /* After sw_reset the clock won't report to be ready, if
1285 H_WAKEUP pin is high. */
1286 ERR("Please make sure that the H_WAKEUP pin is pulled low!\n");
1287 ret = -ENODEV;
1288 }
1289 return ret;
1290 }
1291
1292 static void isp116x_stop(struct usb_hcd *hcd)
1293 {
1294 struct isp116x *isp116x = hcd_to_isp116x(hcd);
1295 unsigned long flags;
1296 u32 val;
1297
1298 spin_lock_irqsave(&isp116x->lock, flags);
1299 isp116x_write_reg16(isp116x, HCuPINTENB, 0);
1300
1301 /* Switch off ports' power, some devices don't come up
1302 after next 'insmod' without this */
1303 val = isp116x_read_reg32(isp116x, HCRHDESCA);
1304 val &= ~(RH_A_NPS | RH_A_PSM);
1305 isp116x_write_reg32(isp116x, HCRHDESCA, val);
1306 isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_LPS);
1307 spin_unlock_irqrestore(&isp116x->lock, flags);
1308
1309 isp116x_sw_reset(isp116x);
1310 }
1311
1312 /*
1313 Configure the chip. The chip must be successfully reset by now.
1314 */
1315 static int isp116x_start(struct usb_hcd *hcd)
1316 {
1317 struct isp116x *isp116x = hcd_to_isp116x(hcd);
1318 struct isp116x_platform_data *board = isp116x->board;
1319 u32 val;
1320 unsigned long flags;
1321
1322 spin_lock_irqsave(&isp116x->lock, flags);
1323
1324 /* clear interrupt status and disable all interrupt sources */
1325 isp116x_write_reg16(isp116x, HCuPINT, 0xff);
1326 isp116x_write_reg16(isp116x, HCuPINTENB, 0);
1327
1328 val = isp116x_read_reg16(isp116x, HCCHIPID);
1329 if ((val & HCCHIPID_MASK) != HCCHIPID_MAGIC) {
1330 ERR("Invalid chip ID %04x\n", val);
1331 spin_unlock_irqrestore(&isp116x->lock, flags);
1332 return -ENODEV;
1333 }
1334
1335 /* To be removed in future */
1336 hcd->uses_new_polling = 1;
1337
1338 isp116x_write_reg16(isp116x, HCITLBUFLEN, ISP116x_ITL_BUFSIZE);
1339 isp116x_write_reg16(isp116x, HCATLBUFLEN, ISP116x_ATL_BUFSIZE);
1340
1341 /* ----- HW conf */
1342 val = HCHWCFG_INT_ENABLE | HCHWCFG_DBWIDTH(1);
1343 if (board->sel15Kres)
1344 val |= HCHWCFG_15KRSEL;
1345 /* Remote wakeup won't work without working clock */
1346 if (board->remote_wakeup_enable)
1347 val |= HCHWCFG_CLKNOTSTOP;
1348 if (board->oc_enable)
1349 val |= HCHWCFG_ANALOG_OC;
1350 if (board->int_act_high)
1351 val |= HCHWCFG_INT_POL;
1352 if (board->int_edge_triggered)
1353 val |= HCHWCFG_INT_TRIGGER;
1354 isp116x_write_reg16(isp116x, HCHWCFG, val);
1355
1356 /* ----- Root hub conf */
1357 val = (25 << 24) & RH_A_POTPGT;
1358 /* AN10003_1.pdf recommends RH_A_NPS (no power switching) to
1359 be always set. Yet, instead, we request individual port
1360 power switching. */
1361 val |= RH_A_PSM;
1362 /* Report overcurrent per port */
1363 val |= RH_A_OCPM;
1364 isp116x_write_reg32(isp116x, HCRHDESCA, val);
1365 isp116x->rhdesca = isp116x_read_reg32(isp116x, HCRHDESCA);
1366
1367 val = RH_B_PPCM;
1368 isp116x_write_reg32(isp116x, HCRHDESCB, val);
1369 isp116x->rhdescb = isp116x_read_reg32(isp116x, HCRHDESCB);
1370
1371 val = 0;
1372 if (board->remote_wakeup_enable) {
1373 if (!device_can_wakeup(hcd->self.controller))
1374 device_init_wakeup(hcd->self.controller, 1);
1375 val |= RH_HS_DRWE;
1376 }
1377 isp116x_write_reg32(isp116x, HCRHSTATUS, val);
1378 isp116x->rhstatus = isp116x_read_reg32(isp116x, HCRHSTATUS);
1379
1380 isp116x_write_reg32(isp116x, HCFMINTVL, 0x27782edf);
1381
1382 hcd->state = HC_STATE_RUNNING;
1383
1384 /* Set up interrupts */
1385 isp116x->intenb = HCINT_MIE | HCINT_RHSC | HCINT_UE;
1386 if (board->remote_wakeup_enable)
1387 isp116x->intenb |= HCINT_RD;
1388 isp116x->irqenb = HCuPINT_ATL | HCuPINT_OPR; /* | HCuPINT_SUSP; */
1389 isp116x_write_reg32(isp116x, HCINTENB, isp116x->intenb);
1390 isp116x_write_reg16(isp116x, HCuPINTENB, isp116x->irqenb);
1391
1392 /* Go operational */
1393 val = HCCONTROL_USB_OPER;
1394 if (board->remote_wakeup_enable)
1395 val |= HCCONTROL_RWE;
1396 isp116x_write_reg32(isp116x, HCCONTROL, val);
1397
1398 /* Disable ports to avoid race in device enumeration */
1399 isp116x_write_reg32(isp116x, HCRHPORT1, RH_PS_CCS);
1400 isp116x_write_reg32(isp116x, HCRHPORT2, RH_PS_CCS);
1401
1402 isp116x_show_regs_log(isp116x);
1403 spin_unlock_irqrestore(&isp116x->lock, flags);
1404 return 0;
1405 }
1406
1407 #ifdef CONFIG_PM
1408
1409 static int isp116x_bus_suspend(struct usb_hcd *hcd)
1410 {
1411 struct isp116x *isp116x = hcd_to_isp116x(hcd);
1412 unsigned long flags;
1413 u32 val;
1414 int ret = 0;
1415
1416 spin_lock_irqsave(&isp116x->lock, flags);
1417 val = isp116x_read_reg32(isp116x, HCCONTROL);
1418
1419 switch (val & HCCONTROL_HCFS) {
1420 case HCCONTROL_USB_OPER:
1421 spin_unlock_irqrestore(&isp116x->lock, flags);
1422 val &= (~HCCONTROL_HCFS & ~HCCONTROL_RWE);
1423 val |= HCCONTROL_USB_SUSPEND;
1424 if (hcd->self.root_hub->do_remote_wakeup)
1425 val |= HCCONTROL_RWE;
1426 /* Wait for usb transfers to finish */
1427 msleep(2);
1428 spin_lock_irqsave(&isp116x->lock, flags);
1429 isp116x_write_reg32(isp116x, HCCONTROL, val);
1430 spin_unlock_irqrestore(&isp116x->lock, flags);
1431 /* Wait for devices to suspend */
1432 msleep(5);
1433 break;
1434 case HCCONTROL_USB_RESUME:
1435 isp116x_write_reg32(isp116x, HCCONTROL,
1436 (val & ~HCCONTROL_HCFS) |
1437 HCCONTROL_USB_RESET);
1438 /* fall through */
1439 case HCCONTROL_USB_RESET:
1440 ret = -EBUSY;
1441 /* fall through */
1442 default: /* HCCONTROL_USB_SUSPEND */
1443 spin_unlock_irqrestore(&isp116x->lock, flags);
1444 break;
1445 }
1446
1447 return ret;
1448 }
1449
1450 static int isp116x_bus_resume(struct usb_hcd *hcd)
1451 {
1452 struct isp116x *isp116x = hcd_to_isp116x(hcd);
1453 u32 val;
1454
1455 msleep(5);
1456 spin_lock_irq(&isp116x->lock);
1457
1458 val = isp116x_read_reg32(isp116x, HCCONTROL);
1459 switch (val & HCCONTROL_HCFS) {
1460 case HCCONTROL_USB_SUSPEND:
1461 val &= ~HCCONTROL_HCFS;
1462 val |= HCCONTROL_USB_RESUME;
1463 isp116x_write_reg32(isp116x, HCCONTROL, val);
1464 case HCCONTROL_USB_RESUME:
1465 break;
1466 case HCCONTROL_USB_OPER:
1467 spin_unlock_irq(&isp116x->lock);
1468 return 0;
1469 default:
1470 /* HCCONTROL_USB_RESET: this may happen, when during
1471 suspension the HC lost power. Reinitialize completely */
1472 spin_unlock_irq(&isp116x->lock);
1473 DBG("Chip has been reset while suspended. Reinit from scratch.\n");
1474 isp116x_reset(hcd);
1475 isp116x_start(hcd);
1476 isp116x_hub_control(hcd, SetPortFeature,
1477 USB_PORT_FEAT_POWER, 1, NULL, 0);
1478 if ((isp116x->rhdesca & RH_A_NDP) == 2)
1479 isp116x_hub_control(hcd, SetPortFeature,
1480 USB_PORT_FEAT_POWER, 2, NULL, 0);
1481 return 0;
1482 }
1483
1484 val = isp116x->rhdesca & RH_A_NDP;
1485 while (val--) {
1486 u32 stat =
1487 isp116x_read_reg32(isp116x, val ? HCRHPORT2 : HCRHPORT1);
1488 /* force global, not selective, resume */
1489 if (!(stat & RH_PS_PSS))
1490 continue;
1491 DBG("%s: Resuming port %d\n", __func__, val);
1492 isp116x_write_reg32(isp116x, RH_PS_POCI, val
1493 ? HCRHPORT2 : HCRHPORT1);
1494 }
1495 spin_unlock_irq(&isp116x->lock);
1496
1497 hcd->state = HC_STATE_RESUMING;
1498 msleep(USB_RESUME_TIMEOUT);
1499
1500 /* Go operational */
1501 spin_lock_irq(&isp116x->lock);
1502 val = isp116x_read_reg32(isp116x, HCCONTROL);
1503 isp116x_write_reg32(isp116x, HCCONTROL,
1504 (val & ~HCCONTROL_HCFS) | HCCONTROL_USB_OPER);
1505 spin_unlock_irq(&isp116x->lock);
1506 hcd->state = HC_STATE_RUNNING;
1507
1508 return 0;
1509 }
1510
1511 #else
1512
1513 #define isp116x_bus_suspend NULL
1514 #define isp116x_bus_resume NULL
1515
1516 #endif
1517
1518 static const struct hc_driver isp116x_hc_driver = {
1519 .description = hcd_name,
1520 .product_desc = "ISP116x Host Controller",
1521 .hcd_priv_size = sizeof(struct isp116x),
1522
1523 .irq = isp116x_irq,
1524 .flags = HCD_USB11,
1525
1526 .reset = isp116x_reset,
1527 .start = isp116x_start,
1528 .stop = isp116x_stop,
1529
1530 .urb_enqueue = isp116x_urb_enqueue,
1531 .urb_dequeue = isp116x_urb_dequeue,
1532 .endpoint_disable = isp116x_endpoint_disable,
1533
1534 .get_frame_number = isp116x_get_frame,
1535
1536 .hub_status_data = isp116x_hub_status_data,
1537 .hub_control = isp116x_hub_control,
1538 .bus_suspend = isp116x_bus_suspend,
1539 .bus_resume = isp116x_bus_resume,
1540 };
1541
1542 /*----------------------------------------------------------------*/
1543
1544 static int isp116x_remove(struct platform_device *pdev)
1545 {
1546 struct usb_hcd *hcd = platform_get_drvdata(pdev);
1547 struct isp116x *isp116x;
1548 struct resource *res;
1549
1550 if (!hcd)
1551 return 0;
1552 isp116x = hcd_to_isp116x(hcd);
1553 remove_debug_file(isp116x);
1554 usb_remove_hcd(hcd);
1555
1556 iounmap(isp116x->data_reg);
1557 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1558 release_mem_region(res->start, 2);
1559 iounmap(isp116x->addr_reg);
1560 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1561 release_mem_region(res->start, 2);
1562
1563 usb_put_hcd(hcd);
1564 return 0;
1565 }
1566
1567 static int isp116x_probe(struct platform_device *pdev)
1568 {
1569 struct usb_hcd *hcd;
1570 struct isp116x *isp116x;
1571 struct resource *addr, *data, *ires;
1572 void __iomem *addr_reg;
1573 void __iomem *data_reg;
1574 int irq;
1575 int ret = 0;
1576 unsigned long irqflags;
1577
1578 if (usb_disabled())
1579 return -ENODEV;
1580
1581 if (pdev->num_resources < 3) {
1582 ret = -ENODEV;
1583 goto err1;
1584 }
1585
1586 data = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1587 addr = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1588 ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1589
1590 if (!addr || !data || !ires) {
1591 ret = -ENODEV;
1592 goto err1;
1593 }
1594
1595 irq = ires->start;
1596 irqflags = ires->flags & IRQF_TRIGGER_MASK;
1597
1598 if (pdev->dev.dma_mask) {
1599 DBG("DMA not supported\n");
1600 ret = -EINVAL;
1601 goto err1;
1602 }
1603
1604 if (!request_mem_region(addr->start, 2, hcd_name)) {
1605 ret = -EBUSY;
1606 goto err1;
1607 }
1608 addr_reg = ioremap(addr->start, resource_size(addr));
1609 if (addr_reg == NULL) {
1610 ret = -ENOMEM;
1611 goto err2;
1612 }
1613 if (!request_mem_region(data->start, 2, hcd_name)) {
1614 ret = -EBUSY;
1615 goto err3;
1616 }
1617 data_reg = ioremap(data->start, resource_size(data));
1618 if (data_reg == NULL) {
1619 ret = -ENOMEM;
1620 goto err4;
1621 }
1622
1623 /* allocate and initialize hcd */
1624 hcd = usb_create_hcd(&isp116x_hc_driver, &pdev->dev, dev_name(&pdev->dev));
1625 if (!hcd) {
1626 ret = -ENOMEM;
1627 goto err5;
1628 }
1629 /* this rsrc_start is bogus */
1630 hcd->rsrc_start = addr->start;
1631 isp116x = hcd_to_isp116x(hcd);
1632 isp116x->data_reg = data_reg;
1633 isp116x->addr_reg = addr_reg;
1634 spin_lock_init(&isp116x->lock);
1635 INIT_LIST_HEAD(&isp116x->async);
1636 isp116x->board = dev_get_platdata(&pdev->dev);
1637
1638 if (!isp116x->board) {
1639 ERR("Platform data structure not initialized\n");
1640 ret = -ENODEV;
1641 goto err6;
1642 }
1643 if (isp116x_check_platform_delay(isp116x)) {
1644 ERR("USE_PLATFORM_DELAY defined, but delay function not "
1645 "implemented.\n");
1646 ERR("See comments in drivers/usb/host/isp116x-hcd.c\n");
1647 ret = -ENODEV;
1648 goto err6;
1649 }
1650
1651 ret = usb_add_hcd(hcd, irq, irqflags);
1652 if (ret)
1653 goto err6;
1654
1655 device_wakeup_enable(hcd->self.controller);
1656
1657 ret = create_debug_file(isp116x);
1658 if (ret) {
1659 ERR("Couldn't create debugfs entry\n");
1660 goto err7;
1661 }
1662
1663 return 0;
1664
1665 err7:
1666 usb_remove_hcd(hcd);
1667 err6:
1668 usb_put_hcd(hcd);
1669 err5:
1670 iounmap(data_reg);
1671 err4:
1672 release_mem_region(data->start, 2);
1673 err3:
1674 iounmap(addr_reg);
1675 err2:
1676 release_mem_region(addr->start, 2);
1677 err1:
1678 ERR("init error, %d\n", ret);
1679 return ret;
1680 }
1681
1682 #ifdef CONFIG_PM
1683 /*
1684 Suspend of platform device
1685 */
1686 static int isp116x_suspend(struct platform_device *dev, pm_message_t state)
1687 {
1688 VDBG("%s: state %x\n", __func__, state.event);
1689 return 0;
1690 }
1691
1692 /*
1693 Resume platform device
1694 */
1695 static int isp116x_resume(struct platform_device *dev)
1696 {
1697 VDBG("%s\n", __func__);
1698 return 0;
1699 }
1700
1701 #else
1702
1703 #define isp116x_suspend NULL
1704 #define isp116x_resume NULL
1705
1706 #endif
1707
1708 /* work with hotplug and coldplug */
1709 MODULE_ALIAS("platform:isp116x-hcd");
1710
1711 static struct platform_driver isp116x_driver = {
1712 .probe = isp116x_probe,
1713 .remove = isp116x_remove,
1714 .suspend = isp116x_suspend,
1715 .resume = isp116x_resume,
1716 .driver = {
1717 .name = hcd_name,
1718 },
1719 };
1720
1721 module_platform_driver(isp116x_driver);
Linux with added FPC-III support